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2017-03-26.2

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untagged-83a648386d4da3db578a

Mono Color

• ba5f34f827 Narrowed view to the centre 80% of a frame. Thomas Harte 2017-06-11 17:24:32 -04:00
• 84d2feb2e6 Cleaned up and implemented fast-tape hack. I've decided it'd be better to test some other software, potentially to give multiple issues to think about, rather than sitting around with just the one. Thomas Harte 2017-06-11 16:42:49 -04:00
• d12e50eb02 Corrected "should I adjust history?" tests. Thomas Harte 2017-06-11 16:41:34 -04:00
• c2bc9a8c62 Ensured no namespace collision in double-include guards. Thomas Harte 2017-06-11 16:41:15 -04:00
• d910a4fd38 Adjusted to signal an interrupt during the refresh cycle rather than weirdly just afterwards. Which cuts video timing down by 4 cycles a line. There still might be a problem here somewhere though, as I'm getting 206 cycles/line and the internet states it should be 207. Thomas Harte 2017-06-11 13:32:20 -04:00
• db30f53ab0 Added the capacity to back-date interrupt line changes within a machine cycle, so that machines which time themselves entirely within perform_machine_cycle can still be cycle accurate on those changes. Thomas Harte 2017-06-11 13:31:02 -04:00
• 50be3a24fe Sought to ensure that Mode 1 interrupts aren't happening early. Which they seem not to be. Thomas Harte 2017-06-11 13:30:08 -04:00
• 256ba4028b Rejigged to eliminate semi-duplication of the is-a-file test. Thomas Harte 2017-06-08 21:52:13 -04:00
• b07af2660d Adjusted to make sure that the very end of a tape is properly measured. Thomas Harte 2017-06-08 21:33:35 -04:00
• bc0d70b2f7 Added: a shout-out when the tape has been exhausted. Thomas Harte 2017-06-08 21:32:27 -04:00
• c6e48dfd56 Given that a final gap is semantically part of describing tape contents, ensured one formally appears before declaring that the tape has ended. Thomas Harte 2017-06-08 21:31:54 -04:00
• c775db50ef Ensured no out-of-bounds accesses. Thomas Harte 2017-06-08 21:31:03 -04:00
• ee4c8b5ad2 Ensured final byte plays out. Thomas Harte 2017-06-08 19:51:49 -04:00
• d8b76e31c3 Added and improved the is-this-ZX80-stuff test. It seems some bytes are going missing in the to->from tape conversion. Thomas Harte 2017-06-08 19:49:18 -04:00
• 7e10c7f9d8 Relocated the ZX80/81 concept of a 'file' out from Tape into Data, given that it's an exact duplicate of memory. Thomas Harte 2017-06-08 19:09:51 -04:00
• c47128f433 Widened tolerances and ensured zero bits aren't prematurely discarded. Thomas Harte 2017-06-07 17:50:03 -04:00
• 8aab9acc10 Eliminated use of the zero level; now definitively returns a low/high input. Thomas Harte 2017-06-07 17:39:29 -04:00
• 350b36df25 Wired in an attempted usage of the new tape parser. Thomas Harte 2017-06-07 17:30:53 -04:00
• dbd2944c13 Took an initial run at the ZX80/81 parser. Thomas Harte 2017-06-07 17:27:05 -04:00
• 4603fa6f24 Extended explicitly to support a token of lookahead, which is pretty much what was on offer anyway. Also corrected instance variable names, as per better adoption of C++ norms. Thomas Harte 2017-06-07 17:21:57 -04:00
• 60300851ea Started sketching out a tape parser for ZX80 and '81 files. I think this'll help me to verify whether the .O input is working. Thomas Harte 2017-06-07 10:12:13 -04:00
• 58312ea2b7 Updated to new standardisation on curly bracket placement. Thomas Harte 2017-06-07 10:05:43 -04:00
• cb534d8b85 Corrected comment. Thomas Harte 2017-06-07 10:05:16 -04:00
• 5626d35bc4 Tried flipping the bit meaning; decided at least to leave it in full-byte form. Thomas Harte 2017-06-06 18:38:05 -04:00
• 4677cebf40 Rejigged to correct: spaces go after bits, not after bytes. Thomas Harte 2017-06-06 18:29:15 -04:00
• 7399f3d798 Caveman debugging in place, it looks like this file is returning nonsense. Thomas Harte 2017-06-06 18:18:55 -04:00
• faeecf7665 Made sure that there's nothing but silence at the end of the tape, even if the .O file is too long. Thomas Harte 2017-06-06 18:16:47 -04:00
• 63e0802f4e Ensured tape input appears on the returned value. Thomas Harte 2017-06-06 18:16:27 -04:00
• e3ee9604a5 Added comments. Thomas Harte 2017-06-06 18:01:33 -04:00
• 8c66e1d99d Factored out ZX80/81 video and rejigged to ensure it will keep ticking over irrespective of whether the machine is supplying data. Thomas Harte 2017-06-06 17:53:23 -04:00
• b55579c348 Fixed usage of flush: the subclass version is definitively used. Thomas Harte 2017-06-06 17:52:44 -04:00
• ca9e8aecd6 Made a seemingly unsuccessful attempt to add tape input. Thomas Harte 2017-06-06 10:13:32 -04:00
• cc4cb45e9d Implemented keyboard input and ensured that the signal generated is marked as composite, putting the colour-suppression ball into the CRT's court. Thomas Harte 2017-06-06 09:25:18 -04:00
• ebbf6e6133 Surprisingly, I think this may actually be the correct output: stopped throwing away the I part of the refresh register and flipped black and white. Thomas Harte 2017-06-06 09:03:09 -04:00
• cba07dec7e Doubled up to display all eight pixels. To confirm that they are the wrong pixels. Thomas Harte 2017-06-06 08:59:00 -04:00
• 6f7037b2b1 Made an initial stab at outputting half the correct pixels. Thomas Harte 2017-06-06 08:55:07 -04:00
• ef4b2f963d Probably more-or-less corrected. But this is all a bit too interdependent. Thomas Harte 2017-06-05 23:52:56 -04:00
• 97f3ff03b6 Restored white background and attempted to correct output timing deficiencies. Incomplete success. Thomas Harte 2017-06-05 23:50:04 -04:00
• 2fbc7a2869 Made a very basic attempt at getting something that at least demarcates proper graphics output. Thomas Harte 2017-06-05 23:32:49 -04:00
• 4983718df7 Got to outputting something to the CRT. Should be just proper syncs and a paper background. It's not synchronising properly, so something is amiss in my timing. Thomas Harte 2017-06-05 10:47:42 -04:00
• 23ca00fd9a Added memory fuzzing as a way to verify state being written by the Z80. Eventually discovered the HALT problem as fixed in the last commit, so have stripped away the caveman stuff again. Thomas Harte 2017-06-05 10:36:07 -04:00
• 3df6eba237 Fixed: my HALT line wasn't actually halting. NOPs followed, but the PC just kept counting. Thomas Harte 2017-06-05 10:35:03 -04:00
• 893f61b490 Attempted specifically to reproduce the 1kb ZX80 memory map in the hope of getting compact lines and in case mirroring is why I'm getting completely empty video reads. Still no action. Thomas Harte 2017-06-05 09:38:49 -04:00
• e940e02126 Added a short circuit to set_interrupt_line, mostly to make breakpoints slightly more convenient to place. Thomas Harte 2017-06-05 09:37:19 -04:00
• 7e3a46c33e [Re]discovered that sync may also be a product of the interrupt cycle. So started looking into that. Thomas Harte 2017-06-04 21:54:55 -04:00
• 7f743c6fb0 Got explicit about permitted type conversions. Thomas Harte 2017-06-04 18:40:59 -04:00
• 73654d51dd Wired up actually to run. Thomas Harte 2017-06-04 18:37:13 -04:00
• 096551ab3e Made a first attempt to hash out the ZX80's bus. Video output isn't yet going though. Can't seem to find clarity on whether horizontal sync is really programmatic. Let's see. Thomas Harte 2017-06-04 18:32:23 -04:00
• c485c460f7 Imported the ZX80 and 81 system ROMs (though not publicly), added enough code to post their contents into C++ world. Thomas Harte 2017-06-04 18:08:35 -04:00
• b0a7c58287 Fixed project to point to the XIB I actually want to keep; fixed that XIB to have the correct contents. Thomas Harte 2017-06-04 17:57:37 -04:00
• d2637123c4 Added necessary support to get as far as an empty window when attempting to load a piece of ZX80 software. Thomas Harte 2017-06-04 17:55:19 -04:00
• 02b7c3d1b0 Added the necessary wiring to get into a ZX80/81-oriented part of the static analyser, which could in principle post a ZX80 target. Thomas Harte 2017-06-04 17:04:06 -04:00
• 8c1769f157 Made a quick attempt at serialising from ZX80 .O to waves. Thomas Harte 2017-06-04 16:59:26 -04:00
• 655809517c Ensured that there is a subclass of file that is entrusted to load .O/.80 files, and that the code routes such files to it, noting that it should consider whether a ZX80 is required. Thomas Harte 2017-06-04 16:37:03 -04:00
• 2190f60a89 Reinstated manual-by-stealth secondary usage of the Zexall test as a benchmarking tool. Thomas Harte 2017-06-04 15:46:35 -04:00
• 18faebc93c Merge pull request #130 from TomHarte/Bits35 Thomas Harte 2017-06-04 15:42:22 -04:00
• 0eebfdb4cc Expanded emulation of memptr, though still incomplete. Reverted zexall tests to zexdoc. Will probably leave memptr until I've an emulated machine as test suites seem to exist, but they're machine-dependant, so figuring out how to isolate them from an architecture will be a lot easier if and when I have functioning machines. Thomas Harte 2017-06-04 15:39:37 -04:00
• 7811374b0f Started sneaking in memptr emulation, hopefully to get to a working BIT (hl). Thomas Harte 2017-06-04 15:07:07 -04:00
• a2f01b4a46 Corrected CPx bit 3 and 5 flags. I think only BIT n, (HL) with the famous MEMPTR reliance is preventing a complete pass by Zexall now. Thomas Harte 2017-06-04 14:59:18 -04:00
• f5c910beb7 Fixed LDIR/LDDR bit 3/5 flags. This seems once again to satisfy FUSE. Thomas Harte 2017-06-04 14:18:04 -04:00
• 4e014ca748 Ensured BIT takes bits 5 and 3 from the computed address if used on indexed pages. That seems to cover 97 failures out of 100? Thomas Harte 2017-06-04 14:13:38 -04:00
• 87095b0578 Undid consciously discard for bits 3 and 5 in the FUSE tests. Back to 100 failures. Thomas Harte 2017-06-04 14:04:26 -04:00
• fba6ac2b4c Merge pull request #129 from TomHarte/TestMachineCommonality Thomas Harte 2017-06-03 22:27:55 -04:00
• 1a811b1ab1 Eliminated the function call inherent to every decode, and also moved the fixed table of operations into a non-templated base class. Thomas Harte 2017-06-03 22:19:35 -04:00
• c26349624c This, of course, should be inline to gain any benefit from the slightly-tortured private implementation. Thomas Harte 2017-06-03 22:00:57 -04:00
• b642d9f712 Eliminates the 6502's specialised jam handler in favour of the generic trap handler, and simplifies the lookup costs of that as it's otherwise doubling execution costs. Thomas Harte 2017-06-03 21:54:42 -04:00
• fd6623b5a5 Attempted to bring a common hierarchy to the Z80 and 6502 test machines, particularly with a view to eliminating the special-case Jam stuff on the 6502. Thomas Harte 2017-06-03 21:22:16 -04:00
• 0b2a3f18bc Merge pull request #128 from TomHarte/Scheduling Thomas Harte 2017-06-03 20:32:39 -04:00
• b304c3a4b9 Eliminated the 6502's reliance on the micro-op scheduler. Thomas Harte 2017-06-03 20:30:07 -04:00
• 3ceef2005b Pulled the Z80 from the MicroOpScheduler inheritance tree as it barely uses the thing, and that allows me to make the MicroOp structure private. Thomas Harte 2017-06-03 19:17:34 -04:00
• 0f438f524b Merge pull request #124 from TomHarte/Z80 Thomas Harte 2017-06-03 19:11:21 -04:00
• 24c84ca6f5 Commented out as-yet-unimplemented features. Thomas Harte 2017-06-03 19:10:23 -04:00
• 7898f643ac Added bus request/acknowledge logic. Thomas Harte 2017-06-03 19:09:47 -04:00
• 7bd45d308a Error was simply failure of the interrupt-mode setter. Fixed. Thomas Harte 2017-06-03 18:58:13 -04:00
• b3da16911f Tweaked timing of mode 0, per contradictory information. Wrote a failing test of mode 2. Thomas Harte 2017-06-03 18:42:54 -04:00
• e52892f75b Added a test of interrupt mode 1. Thomas Harte 2017-06-03 18:16:13 -04:00
• 8c41a0f0ed Added a test to confirm interrupts are disabled, and a response to the interrupt cycle within the all-RAM machine. Thomas Harte 2017-06-03 17:53:44 -04:00
• 3e9212aaff Plumbed through to allow interrupt tests, wrote an NMI test, corrected the error revealed. Thomas Harte 2017-06-03 17:41:45 -04:00
• a2ec902773 Made an attempt at implementing all three modes of IRQ. Thomas Harte 2017-06-03 17:07:05 -04:00
• 1c0130fd02 Cleaned up with a macro, and decided to make absolutely sure that DecodeOperation is functioning as intended by removing the MoveToNextProgram from fetch-decode-execute. Thomas Harte 2017-06-03 12:19:25 -04:00
• 3e3d6f97f4 Edged towards being able to implement interrupt mode 0: created a special-case micro-op for incrementing the PC, and formalised that DecodeOperation is a terminal operation. Thomas Harte 2017-06-03 12:16:21 -04:00
• 9c3bda0111 Attempted to round out NMI handling. Thomas Harte 2017-06-03 11:30:12 -04:00
• d14902700a Minor syntax and wiring fixes. Thomas Harte 2017-06-01 22:33:05 -04:00
• c95c32a9fe Implemented the reset line program and disabled fictitious automatic power-on reset for the Z80 test machine. Thomas Harte 2017-06-01 22:31:04 -04:00
• 35e045d7a7 Made a first attempt at the correct segue into the three main kinds of interrupt, though the programs aren't written yet. So undefined behaviour would abound were an interrupt to occur. But it lets me figure out what effect the check has on performance. I hope little. Thomas Harte 2017-06-01 22:16:22 -04:00
• 084e1f3d51 Added a latching of interrupt status before each bus operation, and reset and power-on inputs. Thomas Harte 2017-06-01 21:40:08 -04:00
• 5b43cefb85 Started filling an appropriate mask variable with the interrupt request status right now. Which is step one towards implementing interrupts. Thomas Harte 2017-06-01 20:34:52 -04:00
• aab637c9e7 Made check_address_for_trap inlineable. Thomas Harte 2017-06-01 18:28:34 -04:00
• 7d9b197383 Pulled the .get() call for fetch-decode-execute out of the main loop. Thomas Harte 2017-06-01 18:28:04 -04:00
• c9dd267ec1 Sketched an interface for signalling interrupts and pulled out some of the repetition in flag setting from ADD/ADC/SUB/SBC/CP. Thomas Harte 2017-05-31 22:51:32 -04:00
• a5254989f8 Rewired the Z80 not to use the program queue, as it's not proven a useful abstraction in practice and doing so yields an immediate 22% speed increase. Thomas Harte 2017-05-31 20:15:56 -04:00
• 494ce073b5 Tests having been fixed by instating proper Z80 cycle counting, removed caveman logging. Thomas Harte 2017-05-31 19:58:57 -04:00
• b99e4210ba Eliminated pointless abstraction; I ended up going indirect on instruction pages rather than scheduling methods. Thomas Harte 2017-05-31 19:57:03 -04:00
• d3b74cbc91 Set proper initial value for number_of_cycles_. Thomas Harte 2017-05-31 19:55:51 -04:00
• 5ff73faf48 Ensured Zexall can pass. Thomas Harte 2017-05-31 19:55:06 -04:00
• 2f7f11e2e5 Added diagnosis props. Thomas Harte 2017-05-31 06:54:25 -04:00
• 5119997122 Made an attempt, flawed so far, to find a neat way for processor subclasses to offer bus management as an inline function. Thomas Harte 2017-05-30 22:41:23 -04:00
• b5c1773d59 Eliminated another conditional. Albeit a very predictable one. Thomas Harte 2017-05-30 22:15:43 -04:00
• dfb5057342 Moved repetition group conditions explicitly into the switch statement. Thomas Harte 2017-05-30 22:12:10 -04:00
• 7bddd294c9 Resolved an unpredictable conditional and temporarily disabled the Zexalltest as part of the default suite, since it takes so long to run. Thomas Harte 2017-05-30 21:03:02 -04:00