 Adrian Conlon
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284158247b
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Fix up 6502 test classes
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2026-03-31 21:52:20 +01:00 |
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Adrian Conlon
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bb626b9e9e
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Simplify some memory update calls
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2026-03-27 18:19:08 +00:00 |
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Adrian Conlon
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47baff3740
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Correct some 8080 timing mistakes
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2026-03-27 18:16:09 +00:00 |
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Adrian Conlon
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c587da19c4
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Interesting. At best agressive inlining had zero effect and may have slowed things down slightly
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2026-03-27 18:15:02 +00:00 |
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Adrian Conlon
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290f7583c5
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Correct region mis-label
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2026-03-27 18:14:24 +00:00 |
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Adrian Conlon
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98448b0524
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Small consistency changes for LR35902 core
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2026-03-21 12:44:19 +00:00 |
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Adrian Conlon
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45a57eea86
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Coupld of small readability changes
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2026-03-21 09:49:09 +00:00 |
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Adrian Conlon
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0029427d6f
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Fix 8080 implementation to be closer to Z80
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2026-03-21 09:48:35 +00:00 |
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Adrian Conlon
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dcd98e5eb7
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Simplify Z80 IM2 implementation
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2026-03-20 09:55:40 +00:00 |
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Adrian Conlon
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a8ef9aa7db
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simplification and unification of build stuff
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2026-02-16 11:15:58 +00:00 |
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Adrian Conlon
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e1bf58afbc
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More sharing of concepts between all Intel style processors
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2026-01-03 23:17:30 +00:00 |
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Adrian Conlon
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810d05a50e
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tidy the intel op-code decoder a little
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2025-11-27 16:49:44 +00:00 |
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Adrian Conlon
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1dfd9621a1
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Share some more common code between Intel style procesors
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2025-10-15 19:46:10 +01:00 |
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Adrian Conlon
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33fce45cc8
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Some performance updates
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2025-10-13 17:36:32 +01:00 |
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Adrian Conlon
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ceacac4741
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Fix up some oddities in the EightBit library
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2025-10-06 13:44:31 +01:00 |
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Adrian Conlon
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3ca62c908c
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Simplify Z80 pn-handling a little
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2025-09-11 08:34:24 +01:00 |
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Adrian Conlon
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2bd50e5cd2
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Fix the single step checker a little
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2025-08-25 23:57:52 +01:00 |
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Adrian Conlon
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17a2b99d6c
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Remove all cycle accurate processing
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2025-08-25 23:56:27 +01:00 |
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Adrian Conlon
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1779d1dc40
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Intel processors all seem to act slightly differently with regards to HALT
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2025-08-17 12:03:51 +01:00 |
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Adrian Conlon
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c67e376d4f
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Add support for checking deferred EI correctness
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2025-08-14 14:57:51 +01:00 |
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Adrian Conlon
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4da07a8fa2
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Correct interrupt flag checks in Gameboy checker
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2025-08-14 11:18:02 +01:00 |
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Adrian Conlon
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a4e704fef4
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I give up. This is probably more compatible with Intel derived processors
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2025-08-13 19:03:25 +01:00 |
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Adrian Conlon
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7951abde00
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Add support for "Gameboy Doctor" log checker.
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2025-08-13 14:01:14 +01:00 |
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Adrian Conlon
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eb23fbe44c
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Correction: the least significant bit is *not* zeroed by an IM 2 interrupt
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2025-08-12 17:19:55 +01:00 |
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Adrian Conlon
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e96a51342a
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Remove unneeded "using"
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2025-08-12 08:28:08 +01:00 |
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Adrian Conlon
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25ca534186
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The EI instructions is actually a deferred instruction
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2025-08-10 21:47:15 +01:00 |
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Adrian Conlon
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d4775cb266
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Correct assertion failure during refresh cycle
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2025-08-10 12:52:48 +01:00 |
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Adrian Conlon
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558da38f12
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Note commonality between Intel-style processors
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2025-08-10 12:43:34 +01:00 |
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Adrian Conlon
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2e1573b016
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Add support for sub-M-cycle accuracy. Not sure how useful this is!
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2025-08-10 11:32:53 +01:00 |
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Adrian Conlon
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072e38f6ee
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Add a couple of debug assertions
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2025-08-09 15:10:27 +01:00 |
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Adrian Conlon
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b40224b5af
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Correct IM 2 indirection
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2025-08-09 14:52:41 +01:00 |
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Adrian Conlon
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f1febd480e
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Sort out interrupt timing (I think)
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2025-08-09 13:29:57 +01:00 |
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Adrian Conlon
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e8a1e7dc6e
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Sort out Z80/Spectrum pin handling (again!)
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2025-08-08 21:47:48 +01:00 |
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Adrian Conlon
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199d0a77b1
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Disable interrups as the first act of INT handling
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2025-08-08 00:03:21 +01:00 |
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Adrian Conlon
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41be64ad99
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Simplfy interrupts on Z80
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2025-08-07 19:05:41 +01:00 |
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Adrian Conlon
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d332c57e47
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Simplify Z80 port handling
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2025-08-07 09:56:25 +01:00 |
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Adrian Conlon
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3a8e379efd
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Align with Z80 implementation
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2025-08-07 09:42:52 +01:00 |
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Adrian Conlon
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ed6c7968bd
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Remove effectively impossible to use methods
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2025-08-07 09:42:23 +01:00 |
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Adrian Conlon
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14e4132d34
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Small consistency change
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2025-08-06 16:54:14 +01:00 |
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Adrian Conlon
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350483fcec
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Catch another couple of Z80 timing issues
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2025-08-05 00:14:05 +01:00 |
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Adrian Conlon
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796042acdf
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Simplfy intel processor interations
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2025-08-04 19:47:40 +01:00 |
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Adrian Conlon
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52ea4b3acd
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Last trivial Z80 update
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2025-08-04 18:19:40 +01:00 |
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Adrian Conlon
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9d208de9bb
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Explicitly state order of operations in code, rather than relying upon RAII etc. (for speed. Much faster)
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2025-08-04 15:47:26 +01:00 |
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Adrian Conlon
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319190b7a5
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More Z80 cycle simplifications and fixes
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2025-08-03 21:55:24 +01:00 |
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Adrian Conlon
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6a32d0269d
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Fix the Z80 checker, so that all cycle actions are checked.
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2025-08-03 21:54:05 +01:00 |
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Adrian Conlon
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3ccd9c45ca
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Adjusted for the latest single-step Z80 tests. Simplify memory update access.
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2025-08-02 17:49:18 +01:00 |
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Adrian Conlon
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bfc2355337
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Correct RRD/RLD timing and XHTL ordering (according to latest Z80 single step tests)
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2025-08-02 12:26:53 +01:00 |
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Adrian Conlon
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6143a9d285
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Hack to allow single step tests to completely work: disable IO area triggers.
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2025-08-01 22:59:00 +01:00 |
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Adrian Conlon
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bb63211f17
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Fix event names
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2025-08-01 22:57:38 +01:00 |
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Adrian Conlon
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60ef099208
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Tidy some inconsistencies in various emulation
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2025-08-01 15:01:20 +01:00 |
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