2013-08-01 09:20:35 +00:00
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//===- IntrinsicsAArch64.td - Defines AArch64 intrinsics -----------*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines all of the AArch64-specific intrinsics.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Advanced SIMD (NEON)
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let TargetPrefix = "aarch64" in { // All intrinsics start with "llvm.aarch64.".
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// Vector Absolute Compare (Floating Point)
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2013-09-24 02:47:27 +00:00
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def int_aarch64_neon_vacgeq :
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Intrinsic<[llvm_v2i64_ty], [llvm_v2f64_ty, llvm_v2f64_ty], [IntrNoMem]>;
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def int_aarch64_neon_vacgtq :
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Intrinsic<[llvm_v2i64_ty], [llvm_v2f64_ty, llvm_v2f64_ty], [IntrNoMem]>;
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2013-08-01 09:20:35 +00:00
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2013-11-14 02:44:13 +00:00
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// Vector saturating accumulate
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def int_aarch64_neon_suqadd : Neon_2Arg_Intrinsic;
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def int_aarch64_neon_usqadd : Neon_2Arg_Intrinsic;
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// Vector Bitwise reverse
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def int_aarch64_neon_rbit : Neon_1Arg_Intrinsic;
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// Vector extract and narrow
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def int_aarch64_neon_xtn :
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Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
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// Vector floating-point convert
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def int_aarch64_neon_frintn : Neon_1Arg_Intrinsic;
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def int_aarch64_neon_fsqrt : Neon_1Arg_Intrinsic;
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def int_aarch64_neon_fcvtxn :
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Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
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def int_aarch64_neon_fcvtns :
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Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
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def int_aarch64_neon_fcvtnu :
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Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
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def int_aarch64_neon_fcvtps :
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Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
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def int_aarch64_neon_fcvtpu :
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Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
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def int_aarch64_neon_fcvtms :
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Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
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def int_aarch64_neon_fcvtmu :
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Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
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def int_aarch64_neon_fcvtas :
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Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
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def int_aarch64_neon_fcvtau :
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Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
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2013-11-26 22:17:37 +00:00
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def int_aarch64_neon_fcvtzs :
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Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
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def int_aarch64_neon_fcvtzu :
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Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
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2013-11-14 02:44:13 +00:00
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2013-08-01 09:20:35 +00:00
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// Vector maxNum (Floating Point)
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def int_aarch64_neon_vmaxnm : Neon_2Arg_Intrinsic;
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// Vector minNum (Floating Point)
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def int_aarch64_neon_vminnm : Neon_2Arg_Intrinsic;
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// Vector Pairwise maxNum (Floating Point)
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def int_aarch64_neon_vpmaxnm : Neon_2Arg_Intrinsic;
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// Vector Pairwise minNum (Floating Point)
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def int_aarch64_neon_vpminnm : Neon_2Arg_Intrinsic;
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2013-11-15 23:32:10 +00:00
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// Vector Multiply Extended and Scalar Multiply Extended (Floating Point)
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def int_aarch64_neon_vmulx :
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Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>, LLVMMatchType<0>]>;
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Inplement aarch64 neon instructions in AdvSIMD(shift). About 24 shift instructions:
sshr,ushr,ssra,usra,srshr,urshr,srsra,ursra,sri,shl,sli,sqshlu,sqshl,uqshl,shrn,sqrshrun,sqshrn,uqshr,sqrshrn,uqrshrn,sshll,ushll
and 4 convert instructions:
scvtf,ucvtf,fcvtzs,fcvtzu
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189925 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 09:28:24 +00:00
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class Neon_N2V_Intrinsic
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: Intrinsic<[llvm_anyvector_ty], [LLVMMatchType<0>, llvm_i32_ty],
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[IntrNoMem]>;
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class Neon_N3V_Intrinsic
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: Intrinsic<[llvm_anyvector_ty],
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[LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty],
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[IntrNoMem]>;
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class Neon_N2V_Narrow_Intrinsic
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: Intrinsic<[llvm_anyvector_ty],
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[LLVMExtendedElementVectorType<0>, llvm_i32_ty],
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[IntrNoMem]>;
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// Vector rounding shift right by immediate (Signed)
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def int_aarch64_neon_vsrshr : Neon_N2V_Intrinsic;
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def int_aarch64_neon_vurshr : Neon_N2V_Intrinsic;
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def int_aarch64_neon_vsqshlu : Neon_N2V_Intrinsic;
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def int_aarch64_neon_vsri : Neon_N3V_Intrinsic;
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def int_aarch64_neon_vsli : Neon_N3V_Intrinsic;
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def int_aarch64_neon_vsqshrun : Neon_N2V_Narrow_Intrinsic;
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def int_aarch64_neon_vrshrn : Neon_N2V_Narrow_Intrinsic;
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def int_aarch64_neon_vsqrshrun : Neon_N2V_Narrow_Intrinsic;
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def int_aarch64_neon_vsqshrn : Neon_N2V_Narrow_Intrinsic;
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def int_aarch64_neon_vuqshrn : Neon_N2V_Narrow_Intrinsic;
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def int_aarch64_neon_vsqrshrn : Neon_N2V_Narrow_Intrinsic;
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def int_aarch64_neon_vuqrshrn : Neon_N2V_Narrow_Intrinsic;
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2013-09-24 02:47:27 +00:00
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2013-10-05 08:22:10 +00:00
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// Vector across
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class Neon_Across_Intrinsic
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: Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
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class Neon_2Arg_Across_Float_Intrinsic
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: Intrinsic<[llvm_anyvector_ty], [llvm_v4f32_ty], [IntrNoMem]>;
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def int_aarch64_neon_saddlv : Neon_Across_Intrinsic;
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def int_aarch64_neon_uaddlv : Neon_Across_Intrinsic;
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def int_aarch64_neon_smaxv : Neon_Across_Intrinsic;
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def int_aarch64_neon_umaxv : Neon_Across_Intrinsic;
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def int_aarch64_neon_sminv : Neon_Across_Intrinsic;
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def int_aarch64_neon_uminv : Neon_Across_Intrinsic;
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def int_aarch64_neon_vaddv : Neon_Across_Intrinsic;
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def int_aarch64_neon_vmaxv : Neon_Across_Intrinsic;
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def int_aarch64_neon_vminv : Neon_Across_Intrinsic;
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def int_aarch64_neon_vmaxnmv : Neon_Across_Intrinsic;
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def int_aarch64_neon_vminnmv : Neon_Across_Intrinsic;
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2013-11-14 01:57:32 +00:00
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// Vector Table Lookup.
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def int_aarch64_neon_vtbl1 :
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Intrinsic<[llvm_anyvector_ty],
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[llvm_anyvector_ty, LLVMMatchType<0>], [IntrNoMem]>;
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def int_aarch64_neon_vtbl2 :
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Intrinsic<[llvm_anyvector_ty],
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[llvm_anyvector_ty, LLVMMatchType<1>, LLVMMatchType<0>],
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[IntrNoMem]>;
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def int_aarch64_neon_vtbl3 :
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Intrinsic<[llvm_anyvector_ty],
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[llvm_anyvector_ty, LLVMMatchType<1>, LLVMMatchType<1>,
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LLVMMatchType<0>], [IntrNoMem]>;
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def int_aarch64_neon_vtbl4 :
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Intrinsic<[llvm_anyvector_ty],
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[llvm_anyvector_ty, LLVMMatchType<1>, LLVMMatchType<1>,
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LLVMMatchType<1>, LLVMMatchType<0>], [IntrNoMem]>;
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// Vector Table Extension.
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// Some elements of the destination vector may not be updated, so the original
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// value of that vector is passed as the first argument. The next 1-4
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// arguments after that are the table.
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def int_aarch64_neon_vtbx1 :
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Intrinsic<[llvm_anyvector_ty],
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[LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<0>],
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[IntrNoMem]>;
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def int_aarch64_neon_vtbx2 :
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Intrinsic<[llvm_anyvector_ty],
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[LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<1>,
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LLVMMatchType<0>], [IntrNoMem]>;
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def int_aarch64_neon_vtbx3 :
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Intrinsic<[llvm_anyvector_ty],
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[LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<1>,
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LLVMMatchType<1>, LLVMMatchType<0>], [IntrNoMem]>;
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def int_aarch64_neon_vtbx4 :
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Intrinsic<[llvm_anyvector_ty],
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[LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<1>,
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LLVMMatchType<1>, LLVMMatchType<1>, LLVMMatchType<0>],
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[IntrNoMem]>;
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2013-11-18 06:31:53 +00:00
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// Vector Load/store
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def int_aarch64_neon_vld1x2 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>],
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[llvm_ptr_ty, llvm_i32_ty],
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[IntrReadArgMem]>;
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def int_aarch64_neon_vld1x3 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
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LLVMMatchType<0>],
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[llvm_ptr_ty, llvm_i32_ty],
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[IntrReadArgMem]>;
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def int_aarch64_neon_vld1x4 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
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LLVMMatchType<0>, LLVMMatchType<0>],
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[llvm_ptr_ty, llvm_i32_ty],
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[IntrReadArgMem]>;
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def int_aarch64_neon_vst1x2 : Intrinsic<[],
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[llvm_ptr_ty, llvm_anyvector_ty,
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LLVMMatchType<0>, llvm_i32_ty],
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[IntrReadWriteArgMem]>;
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def int_aarch64_neon_vst1x3 : Intrinsic<[],
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[llvm_ptr_ty, llvm_anyvector_ty,
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LLVMMatchType<0>, LLVMMatchType<0>,
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llvm_i32_ty], [IntrReadWriteArgMem]>;
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def int_aarch64_neon_vst1x4 : Intrinsic<[],
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[llvm_ptr_ty, llvm_anyvector_ty,
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LLVMMatchType<0>, LLVMMatchType<0>,
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LLVMMatchType<0>, llvm_i32_ty],
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[IntrReadWriteArgMem]>;
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2013-09-24 02:47:27 +00:00
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// Scalar Add
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def int_aarch64_neon_vaddds :
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Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
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def int_aarch64_neon_vadddu :
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Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
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// Scalar Sub
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def int_aarch64_neon_vsubds :
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Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
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def int_aarch64_neon_vsubdu :
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Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
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// Scalar Shift
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// Scalar Shift Left
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def int_aarch64_neon_vshlds :
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Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
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def int_aarch64_neon_vshldu :
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Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
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// Scalar Saturating Shift Left
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def int_aarch64_neon_vqshls : Neon_2Arg_Intrinsic;
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def int_aarch64_neon_vqshlu : Neon_2Arg_Intrinsic;
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// Scalar Shift Rouding Left
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def int_aarch64_neon_vrshlds :
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Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
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def int_aarch64_neon_vrshldu :
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Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
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// Scalar Saturating Rounding Shift Left
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def int_aarch64_neon_vqrshls : Neon_2Arg_Intrinsic;
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def int_aarch64_neon_vqrshlu : Neon_2Arg_Intrinsic;
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// Scalar Reduce Pairwise Add.
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def int_aarch64_neon_vpadd :
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Intrinsic<[llvm_v1i64_ty], [llvm_v2i64_ty],[IntrNoMem]>;
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def int_aarch64_neon_vpfadd :
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Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>;
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def int_aarch64_neon_vpfaddq :
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Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
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// Scalar Reduce Pairwise Floating Point Max/Min.
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def int_aarch64_neon_vpmax :
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Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>;
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def int_aarch64_neon_vpmaxq :
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Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
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def int_aarch64_neon_vpmin :
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Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>;
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def int_aarch64_neon_vpminq :
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Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
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// Scalar Reduce Pairwise Floating Point Maxnm/Minnm.
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def int_aarch64_neon_vpfmaxnm :
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Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>;
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def int_aarch64_neon_vpfmaxnmq :
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Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
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def int_aarch64_neon_vpfminnm :
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Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>;
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def int_aarch64_neon_vpfminnmq :
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Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
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2013-10-08 20:43:30 +00:00
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// Scalar Signed Integer Convert To Floating-point
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def int_aarch64_neon_vcvtf32_s32 :
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2013-11-15 21:28:10 +00:00
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Intrinsic<[llvm_float_ty], [llvm_v1i32_ty], [IntrNoMem]>;
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2013-10-08 20:43:30 +00:00
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def int_aarch64_neon_vcvtf64_s64 :
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2013-11-15 21:28:10 +00:00
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Intrinsic<[llvm_double_ty], [llvm_v1i64_ty], [IntrNoMem]>;
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2013-10-08 20:43:30 +00:00
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// Scalar Unsigned Integer Convert To Floating-point
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def int_aarch64_neon_vcvtf32_u32 :
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2013-11-15 21:28:10 +00:00
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Intrinsic<[llvm_float_ty], [llvm_v1i32_ty], [IntrNoMem]>;
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2013-10-08 20:43:30 +00:00
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def int_aarch64_neon_vcvtf64_u64 :
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2013-11-15 21:28:10 +00:00
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Intrinsic<[llvm_double_ty], [llvm_v1i64_ty], [IntrNoMem]>;
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2013-10-08 22:09:04 +00:00
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// Scalar Floating-point Reciprocal Exponent
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def int_aarch64_neon_vrecpx : Neon_1Arg_Intrinsic;
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2013-10-14 14:37:20 +00:00
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2013-10-30 15:19:37 +00:00
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class Neon_Cmp_Intrinsic
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: Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty, llvm_anyvector_ty],
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[IntrNoMem]>;
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2013-10-14 14:37:20 +00:00
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2013-10-30 15:19:37 +00:00
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// Scalar Compare Equal
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def int_aarch64_neon_vceq : Neon_Cmp_Intrinsic;
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2013-10-14 14:37:20 +00:00
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2013-10-30 15:19:37 +00:00
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// Scalar Compare Greater-Than or Equal
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def int_aarch64_neon_vcge : Neon_Cmp_Intrinsic;
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def int_aarch64_neon_vchs : Neon_Cmp_Intrinsic;
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2013-10-14 14:37:20 +00:00
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2013-10-30 15:19:37 +00:00
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// Scalar Compare Less-Than or Equal
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def int_aarch64_neon_vclez : Neon_Cmp_Intrinsic;
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2013-10-14 14:37:20 +00:00
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// Scalar Compare Less-Than
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2013-10-30 15:19:37 +00:00
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def int_aarch64_neon_vcltz : Neon_Cmp_Intrinsic;
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2013-10-14 14:37:20 +00:00
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// Scalar Compare Greater-Than
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2013-10-30 15:19:37 +00:00
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def int_aarch64_neon_vcgt : Neon_Cmp_Intrinsic;
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def int_aarch64_neon_vchi : Neon_Cmp_Intrinsic;
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2013-10-14 14:37:20 +00:00
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// Scalar Compare Bitwise Test Bits
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2013-10-30 15:19:37 +00:00
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def int_aarch64_neon_vtstd : Neon_Cmp_Intrinsic;
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// Scalar Floating-point Absolute Compare Greater Than Or Equal
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def int_aarch64_neon_vcage : Neon_Cmp_Intrinsic;
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// Scalar Floating-point Absolute Compare Greater Than
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def int_aarch64_neon_vcagt : Neon_Cmp_Intrinsic;
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2013-10-14 14:37:20 +00:00
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2013-10-16 16:09:02 +00:00
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// Scalar Signed Saturating Accumulated of Unsigned Value
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def int_aarch64_neon_vuqadd : Neon_2Arg_Intrinsic;
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2013-10-16 16:30:10 +00:00
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// Scalar Unsigned Saturating Accumulated of Signed Value
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2013-10-16 16:09:02 +00:00
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def int_aarch64_neon_vsqadd : Neon_2Arg_Intrinsic;
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2013-10-16 21:04:34 +00:00
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// Scalar Absolute Value
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def int_aarch64_neon_vabs :
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Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty], [IntrNoMem]>;
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2013-10-16 21:04:39 +00:00
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// Scalar Negate Value
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def int_aarch64_neon_vneg :
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Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty], [IntrNoMem]>;
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2013-10-17 18:12:29 +00:00
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// Signed Saturating Doubling Multiply-Add Long
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2013-10-21 20:11:47 +00:00
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def int_aarch64_neon_vqdmlal : Neon_3Arg_Long_Intrinsic;
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2013-10-17 18:12:29 +00:00
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// Signed Saturating Doubling Multiply-Subtract Long
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2013-10-21 20:11:47 +00:00
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def int_aarch64_neon_vqdmlsl : Neon_3Arg_Long_Intrinsic;
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2013-10-17 18:12:29 +00:00
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2013-10-31 19:28:44 +00:00
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class Neon_2Arg_ShiftImm_Intrinsic
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: Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_i32_ty], [IntrNoMem]>;
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class Neon_3Arg_ShiftImm_Intrinsic
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: Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty, llvm_i32_ty],
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[IntrNoMem]>;
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// Scalar Shift Right (Immediate)
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def int_aarch64_neon_vshrds_n : Neon_2Arg_ShiftImm_Intrinsic;
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def int_aarch64_neon_vshrdu_n : Neon_2Arg_ShiftImm_Intrinsic;
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// Scalar Shift Right and Accumulate (Immediate)
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def int_aarch64_neon_vsrads_n : Neon_3Arg_ShiftImm_Intrinsic;
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def int_aarch64_neon_vsradu_n : Neon_3Arg_ShiftImm_Intrinsic;
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// Scalar Rounding Shift Right and Accumulate (Immediate)
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|
def int_aarch64_neon_vrsrads_n : Neon_3Arg_ShiftImm_Intrinsic;
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def int_aarch64_neon_vrsradu_n : Neon_3Arg_ShiftImm_Intrinsic;
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// Scalar Shift Left (Immediate)
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|
def int_aarch64_neon_vshld_n : Neon_2Arg_ShiftImm_Intrinsic;
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// Scalar Saturating Shift Left (Immediate)
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|
def int_aarch64_neon_vqshls_n : Neon_N2V_Intrinsic;
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|
def int_aarch64_neon_vqshlu_n : Neon_N2V_Intrinsic;
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|
|
|
2013-11-14 03:27:58 +00:00
|
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|
// Scalar Signed Saturating Shift Left Unsigned (Immediate)
|
|
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|
def int_aarch64_neon_vqshlus_n : Neon_N2V_Intrinsic;
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|
2013-10-31 22:36:59 +00:00
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// Scalar Signed Fixed-point Convert To Floating-Point (Immediate)
|
|
|
|
def int_aarch64_neon_vcvtf32_n_s32 :
|
2013-11-15 21:28:10 +00:00
|
|
|
Intrinsic<[llvm_float_ty], [llvm_v1i32_ty, llvm_i32_ty], [IntrNoMem]>;
|
2013-10-31 22:36:59 +00:00
|
|
|
def int_aarch64_neon_vcvtf64_n_s64 :
|
2013-11-15 21:28:10 +00:00
|
|
|
Intrinsic<[llvm_double_ty], [llvm_v1i64_ty, llvm_i32_ty], [IntrNoMem]>;
|
2013-10-31 22:36:59 +00:00
|
|
|
|
|
|
|
// Scalar Unsigned Fixed-point Convert To Floating-Point (Immediate)
|
|
|
|
def int_aarch64_neon_vcvtf32_n_u32 :
|
2013-11-15 21:28:10 +00:00
|
|
|
Intrinsic<[llvm_float_ty], [llvm_v1i32_ty, llvm_i32_ty], [IntrNoMem]>;
|
2013-10-31 22:36:59 +00:00
|
|
|
def int_aarch64_neon_vcvtf64_n_u64 :
|
2013-11-15 21:28:10 +00:00
|
|
|
Intrinsic<[llvm_double_ty], [llvm_v1i64_ty, llvm_i32_ty], [IntrNoMem]>;
|
2013-11-05 17:42:05 +00:00
|
|
|
|
2013-11-11 18:04:07 +00:00
|
|
|
// Scalar Floating-point Convert To Signed Fixed-point (Immediate)
|
|
|
|
def int_aarch64_neon_vcvts_n_s32_f32 :
|
|
|
|
Intrinsic<[llvm_v1i32_ty], [llvm_v1f32_ty, llvm_i32_ty], [IntrNoMem]>;
|
|
|
|
def int_aarch64_neon_vcvtd_n_s64_f64 :
|
|
|
|
Intrinsic<[llvm_v1i64_ty], [llvm_v1f64_ty, llvm_i32_ty], [IntrNoMem]>;
|
|
|
|
|
|
|
|
// Scalar Floating-point Convert To Unsigned Fixed-point (Immediate)
|
|
|
|
def int_aarch64_neon_vcvts_n_u32_f32 :
|
|
|
|
Intrinsic<[llvm_v1i32_ty], [llvm_v1f32_ty, llvm_i32_ty], [IntrNoMem]>;
|
|
|
|
def int_aarch64_neon_vcvtd_n_u64_f64 :
|
|
|
|
Intrinsic<[llvm_v1i64_ty], [llvm_v1f64_ty, llvm_i32_ty], [IntrNoMem]>;
|
|
|
|
|
2013-11-05 17:42:05 +00:00
|
|
|
class Neon_SHA_Intrinsic
|
|
|
|
: Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v1i32_ty, llvm_v4i32_ty],
|
|
|
|
[IntrNoMem]>;
|
|
|
|
|
|
|
|
def int_aarch64_neon_sha1c : Neon_SHA_Intrinsic;
|
|
|
|
def int_aarch64_neon_sha1m : Neon_SHA_Intrinsic;
|
|
|
|
def int_aarch64_neon_sha1p : Neon_SHA_Intrinsic;
|
2013-08-01 09:20:35 +00:00
|
|
|
}
|