Commit Graph

91268 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
0ec587e26c Add target flags to SPARC address operands.
SDNodes and MachineOperands get target flags representing the %hi() and
%lo() assembly annotations that eventually become relocations.

Also define flags to be used by the 64-bit code models.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179468 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-14 01:33:32 +00:00
Hal Finkel
63496f66c5 Mark all PPC CR registers to be spilled as live-in and tag MFCR appropriately
Leaving MFCR has having unmodeled side effects is not enough to prevent
unwanted instruction reordering post-RA. We could probably apply a stronger
barrier attribute, but there is a better way: Add all (not just the first) CR
to be spilled as live-in to the entry block, and add all CRs to the MFCR
instruction as implicitly killed.

Unfortunately, I don't have a small test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179465 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13 23:06:15 +00:00
Jakob Stoklund Olesen
41d59c6130 Define SPARC code models.
Currently, only abs32 and pic32 are implemented. Add a test case for
abs32 with 64-bit code. 64-bit PIC code is currently broken.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179463 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13 19:02:23 +00:00
Jakob Stoklund Olesen
41b585ca0e Use the correct types when matching ADDRri patterns from frame indexes.
It doesn't seem like anybody is checking types this late in isel, so no
test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179462 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13 19:02:16 +00:00
Benjamin Kramer
9cbee63b1a GlobalDCE: Fix an oversight in my last commit that could lead to crashes.
There is a Constant with non-constant operands: blockaddress.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179460 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13 16:11:14 +00:00
Benjamin Kramer
8848680ce0 Fix a scalability issue with complex ConstantExprs.
This is basically the same fix in three different places. We use a set to avoid
walking the whole tree of a big ConstantExprs multiple times.

For example: (select cmp, (add big_expr 1), (add big_expr 2))
We don't want to visit big_expr twice here, it may consist of thousands of
nodes.

The testcase exercises this by creating an insanely large ConstantExprs out of
a loop. It's questionable if the optimizer should ever create those, but this
can be triggered with real C code. Fixes PR15714.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179458 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13 12:53:18 +00:00
Hal Finkel
b99c995825 Spill and restore PPC CR registers using the FP when we have one
For functions that need to spill CRs, and have dynamic stack allocations, the
value of the SP during the restore is not what it was during the save, and so
we need to use the FP in these cases (as for all of the other spills and
restores, but the CR restore has a special code path because its reserved slot,
like the link register, is specified directly relative to the adjusted SP).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179457 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13 08:09:20 +00:00
Andrew Trick
16de01ec27 Further generalize this scheduler test.
The order of copies depends on queue order, which is not very stable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179456 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13 07:37:27 +00:00
Andrew Trick
4b1a1f34c0 Fix a dislexic regex.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179455 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13 07:29:21 +00:00
Andrew Trick
65634fa48d Add a missing REQUIRES: asserts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179453 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13 06:12:46 +00:00
Andrew Trick
baedcd7977 MI-Sched: DEBUG formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179452 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13 06:07:49 +00:00
Andrew Trick
6a22dba485 MI-Sched cleanup. If an instruction has no valid sched class, do not attempt to check for a variant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179451 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13 06:07:45 +00:00
Andrew Trick
f521997303 X86 machine model: reduce SandyBridge and Haswell ILPWindow.
The initial values were arbitrary. I want them to be more
conservative. This represents the number of latency cycles hidden by
OOO execution. In practice, I think it should be within a small factor
of the complex floating point operation latency so the scheduler can
make some attempt to hide latency even for smallish blocks.

These are by no means the best values, just a starting point for
tuning heuristics. Some benchmarks such as TSVC run faster with this
lower value for SandyBridge. I haven't run anything on Haswell, but
it's shouldn't be 2x SB.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179450 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13 06:07:43 +00:00
Andrew Trick
4392f0f407 MI-Sched: schedule physreg copies.
The register allocator expects minimal physreg live ranges. Schedule
physreg copies accordingly. This is slightly tricky when they occur in
the middle of the scheduling region. For now, this is handled by
rescheduling the copy when its associated instruction is
scheduled. Eventually we may instead bundle them, but only if we can
preserve the bundles as parallel copies during regalloc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179449 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13 06:07:40 +00:00
Andrew Trick
c706dc7ae7 Catch another case where SD fails to propagate node order.
I need to handle this for the test case in my following scheduler
commit.

Work is already under way to redesign the mechanism for node order
propagation because this case by case approach is unmaintainable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179448 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13 06:07:36 +00:00
Rafael Espindola
107cd0caa9 Add typenames to see if bot goes green.
I hope this brings http://lab.llvm.org:8011/builders/clang-x86_64-darwin11-self-mingw32 back.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179446 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13 02:31:34 +00:00
Akira Hatanaka
4e0980af2e [mips] Move MipsTargetLowering::lowerINTRINSIC_W_CHAIN and
lowerINTRINSIC_WO_CHAIN into MipsSETargetLowering.

No functionality changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179444 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13 02:13:30 +00:00
Rafael Espindola
69893a224d Some versions of gcc don't like typenames in these places.
Should fix the bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179441 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13 01:55:34 +00:00
Rafael Espindola
da2a2372c6 Finish templating MachObjectFile over endianness.
We are now able to handle big endian macho files in llvm-readobject. Thanks to
David Fang for providing the object files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179440 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13 01:45:40 +00:00
Akira Hatanaka
3d60241c3e [mips] Reapply r179420 and r179421.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179434 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13 00:55:41 +00:00
Akira Hatanaka
bf308cedce [mips] Override TargetLoweringBase::isShuffleMaskLegal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179433 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13 00:45:02 +00:00
Chad Rosier
41a10b6c4e [ms-inline asm] Simplify the logic by using parsePrimaryExpr. No functional
change intended.  Test case previously added in r178568.
Part of rdar://13611297

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179425 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 23:03:20 +00:00
Akira Hatanaka
d35d5bdfc4 Revert r179420 and r179421.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179422 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 22:40:07 +00:00
Akira Hatanaka
6d224459f4 [mips] Instruction selection patterns for carry-setting and using add
instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179421 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 22:24:52 +00:00
Akira Hatanaka
9367b8d4f2 [mips] v4i8 and v2i16 add, sub and mul instruction selection patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179420 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 22:14:24 +00:00
Nadav Rotem
0fda0f3976 Revert r179409 because it caused some warnings and some of the build bots fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179418 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 22:02:26 +00:00
Benjamin Kramer
6ac9278606 InstCombine: Check the operand types before merging fcmp ord & fcmp ord.
Fixes PR15737.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179417 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 21:56:23 +00:00
Nadav Rotem
a74f91e44c SLPVectorizer: add support for vectorization of diamond shaped trees. We now perform a preliminary traversal of the graph to collect values with multiple users and check where the users came from.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179414 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 21:16:54 +00:00
Nadav Rotem
9eb366acba CostModel: increase the default cost of supported floating point operations from 1 to two. Fixed a few tests that changes because now the cost of one insert + a vector operation on two doubles is lower than two scalar operations on doubles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179413 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 21:15:03 +00:00
Nadav Rotem
196ee11f85 Add debug prints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179412 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 21:11:14 +00:00
Nadav Rotem
affe889d08 Add support for additional vector instructions in the interpreter.
patch by Veselov, Yuri <Yuri.Veselov@intel.com>.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179409 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 20:45:20 +00:00
Chad Rosier
3f42936af8 [ms-inline asm] Move this logic into a static function as it's only applicable
when parsing MS-style inline assembly.  No functional change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179407 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 20:20:54 +00:00
Chad Rosier
d0dd5e413a [ms-inline asm] Address the FIXME for ImmDisp before brackets. This
is a follow on to r179393 and r179399.  Test case to be added on
the clang side.
Part of rdar://13453209


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179403 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 19:51:49 +00:00
Daniel Dunbar
406ef44707 lit: Fix infinite recursion when an out-of-tree test root is located inside the source test root.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179402 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 19:09:09 +00:00
Daniel Dunbar
f2c2b20090 lit: Add a test for discovery w/ test_exec_root (out-of-tree test root).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179401 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 19:08:57 +00:00
Chad Rosier
b71ce6a423 [ms-inline asm] Have the [ Symbol ] case fall into the more general logic. This
is a follow on to r179393.  Test case to be added on the clang side.
Part of rdar://13453209


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179399 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 18:54:20 +00:00
Quentin Colombet
d64ee4455a ARM: Correct printing of pre-indexed operands.
According to the ARM reference manual, constant offsets are mandatory for pre-indexed addressing modes.
The MC disassembler was not obeying this when the offset is 0.
It was producing instructions like: str r0, [r1]!.
Correct syntax is: str r0, [r1, #0]!.

This change modifies the dumping of operands so that the offset is always printed, regardless of its value, when pre-indexed addressing mode is used.

Patch by Mihail Popa <Mihail.Popa@arm.com>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179398 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 18:47:25 +00:00
Chad Rosier
9458f3ecee [ms-inline asm] Add support for operands that include both a symbol and an
immediate displacement.  Specifically, add support for generating the proper IR.
We've been able to parse this for some time now.  Test case to be added on the
clang side.
Part of rdar://13453209


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179393 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 18:21:18 +00:00
Hal Finkel
598574695b PPC: Remove (broken) nested implicit definition lists
TableGen will not combine nested list 'let' bindings into a single list, and
instead uses only the inner scope. As a result, several instruction definitions
were missing implicit register defs that were in outer scopes. This de-nests
these scopes and makes all instructions have only one let binding which sets
implicit register definitions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179392 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 18:17:57 +00:00
Hal Finkel
81b2fd5819 Add a comment about the PPC Interpretation64Bit bit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179391 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 18:17:38 +00:00
Jyotsna Verma
1877dc00e7 Hexagon: Set isPredicatedNew flag on predicate new instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179388 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 18:01:06 +00:00
Jyotsna Verma
c1406d76ec Hexagon: Set isPredicatedFlase flag for all the instructions with negated predication.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179387 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 17:46:52 +00:00
David Majnemer
fb1cd69b90 Simplify (A & ~B) in icmp if A is a power of 2
The transform will execute like so:
(A & ~B) == 0 --> (A & B) != 0
(A & ~B) != 0 --> (A & B) == 0


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179386 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 17:25:07 +00:00
Chad Rosier
dda4b6bf25 [ms-inline asm] Add the implementation for the AOK_Delete kind, which was added
in r179325.  Test case coming shortly on the clang side.
Part of rdar://13453209

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179383 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 16:26:42 +00:00
Arnold Schwaighofer
08a0e8f8db LoopVectorizer: integer division is not a reduction operation
Don't classify idiv/udiv as a reduction operation. Integer division is lossy.
For example : (1 / 2) * 4 != 4/2.

Example:

int a[] = { 2, 5, 2, 2}
int x = 80;

for()
  x /= a[i];

Scalar:
  x /= 2 // = 40
  x /= 5 // = 8
  x /= 2 // = 4
  x /= 2 // = 2

Vectorized:

 <80, 1> / <2,5> //= <40,0>
 <40, 0> / <2,2> //= <20,0>

 20*0 = 0

radar://13640654

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179381 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 15:15:19 +00:00
Tim Northover
b6ad2bd511 AArch64: use full triple for ELF tests
These tests rely specifically on the names of ELF relocations, let alone any
other detail. There's no way they'd work if LLVM was emitting something else by
default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179376 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 12:54:58 +00:00
Tim Northover
15e883787f AArch64: remove over-zealous use of CHECK-NEXT
It turns out some platforms (e.g. Windows) lay out their llvm-mc slightly
differently with extra newlines; there was no real reason for the test lines to
be consecutive, so this relaxes the FileCheck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179375 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 12:54:49 +00:00
Benjamin Kramer
3389e10d67 Revert broken pieces of r179373.
You can't copy an OwningPtr, and move semantics aren't available in C++98.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179374 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 12:13:51 +00:00
Andy Gibbs
200241e4de Replace uses of the deprecated std::auto_ptr with OwningPtr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179373 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 10:56:28 +00:00
Benjamin Kramer
71c1b22855 Fix a disconcerting bug in Value::isUsedInBasicBlock, which gave wrong answers for blocks larger than 3 instrs.
Also add a unit test. PR15727.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179370 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 08:33:11 +00:00