Commit Graph

7174 Commits

Author SHA1 Message Date
David Goodwin
7f98cac93a Thumb-2 tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74345 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 22:37:07 +00:00
Chris Lattner
93677c99a4 remove unwind info, add test for asmprinting of jump table labels with (%rip)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74337 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 22:16:49 +00:00
Evan Cheng
2c2fb823b9 Add x86 support for 'n' inline asm modifier. This will be handled target independently as part of MC work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74336 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 22:00:19 +00:00
David Goodwin
24062ac5be Thumb-2 has CLZ.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74322 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 20:47:43 +00:00
David Goodwin
7ce720b448 Use "adcs/sbcs" only when the carry-out is live, otherwise use "adc/sbc".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74321 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 20:45:56 +00:00
Daniel Dunbar
d2deed0091 More spelling Count as count.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74306 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 18:35:07 +00:00
Daniel Dunbar
039c43dccc Spell Count as count.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74298 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 18:21:54 +00:00
David Goodwin
2634e98a93 Add Thumb-2 tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74295 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 18:10:30 +00:00
David Goodwin
93d95bd2c3 ADC used to implement adde should use "adcs" opcode instead of "adc".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74293 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 18:07:25 +00:00
David Goodwin
caffbd7b01 ORN and BIC tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74289 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 16:20:06 +00:00
David Goodwin
83b3593478 Currently there is a pattern for the thumb-2 MOV 16-bit immediate instruction. That instruction cannot write the flags so it should use T2I instead of T2sI.
Also, added a pattern for the thumb-2 MOV of shifted immediate since that can encode immediates not encodable by the 16-bit immediate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74288 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 16:10:07 +00:00
Evan Cheng
6677f51127 Fix tests: Count -> count.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74282 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 07:05:57 +00:00
Evan Cheng
c0ad80fd9e Fix a CodeGenDAGPatterns bug. Check if top level predicates match when it's looking for duplicates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74276 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 05:59:16 +00:00
Shantonu Sen
1b6d3daa59 Clarify how to configure llvm-gcc-4.2 for use with
test suite. Remove documentation for --with-f2c, which
is no longer supported. Remove information about obtaining
tcl/expect, which ship with Mac OS X by default since
10.4.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74271 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 05:44:53 +00:00
Devang Patel
0f05d22a31 Let's ignore MDStrings also!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74255 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 02:26:12 +00:00
Daniel Dunbar
12cccf10a7 Fix spelling of 'count'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74249 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 01:33:02 +00:00
Dan Gohman
6b9c959c61 Fix LCSSA to avoid emitting a PHI node for the unwind destination of
an invoke instruction, since the value isn't really live across that
edge.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74242 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 00:31:13 +00:00
Evan Cheng
6267422318 Select ADC, SBC, and RSC instead of the ADCS, SBCS, and RSCS when the carry bit def is not used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74228 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 23:34:10 +00:00
David Goodwin
0919a916bf Use MVN for ~t2_so_imm immediates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74223 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 23:11:21 +00:00
Daniel Dunbar
c238b584de MC: Parse .org directives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74218 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 22:44:51 +00:00
Bill Wendling
06b76b834f Don't grep the -debug output. This isn't the way to test changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74211 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 21:59:32 +00:00
Daniel Dunbar
8f780cd789 MC: Parse .set and assignments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74208 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 21:56:11 +00:00
Chris Lattner
5f04d1e522 down with unwind info :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74206 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 21:48:17 +00:00
Evan Cheng
1e249e3705 ISD::ADDE / ISD::SUBE updates the carry bit so they should isle to ADCS and SBCS / RSCS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74200 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 20:59:23 +00:00
Devang Patel
e4c0c0fab8 No need to code gen MDNodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74150 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 00:47:42 +00:00
Evan Cheng
a09b9ca10f Add Thumb2 pc relative add.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74141 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-24 23:47:58 +00:00
Daniel Dunbar
a0d1426af0 Basic .s parsing for .asci[iz], .fill, .space, {.byte, .short, ... }
- Includes some DG tests in test/MC/AsmParser, which are rather primitive since
   we don't have a -verify mode yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74139 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-24 23:30:00 +00:00
Evan Cheng
2e1af3529b We should run these tests as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74121 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-24 21:36:26 +00:00
Chris Lattner
7556bfd6af unwind info not needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74112 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-24 19:48:04 +00:00
Dan Gohman
e5aceed168 Simplify [su]max(MAX, n) to MAX. This comes up in loop tripcount
computations in loops with multiple exits.

Adjust the testcase for PR4436 so that the relevant portion isn't
optimized away.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74073 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-24 14:46:22 +00:00
Dan Gohman
32a81a3f6d When inserting code into a loop preheader, insert it before the
terminator, instead of after the last phi. This fixes a bug
exposed by ScalarEvolution analyzing more kinds of loops.
This fixes PR4436.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74072 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-24 14:31:06 +00:00
Evan Cheng
9f76ed5127 Move thumb and thumb2 tests into separate directories.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74068 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-24 06:36:07 +00:00
Evan Cheng
ef5d070bbe Fix support for inline asm input / output operand tying when operand spans across multiple registers (e.g. two i64 operands in 32-bit mode).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74053 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-24 02:05:51 +00:00
Dan Gohman
e56f4a49b7 Add a testcase demoing some of ScalarEvolution's new trip count logic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74049 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-24 01:22:30 +00:00
Dan Gohman
40a5a1b39e Extend ScalarEvolution's multiple-exit support to compute exact
trip counts in more cases.

Generalize ScalarEvolution's isLoopGuardedByCond code to recognize
And and Or conditions, splitting the code out into an
isNecessaryCond helper function so that it can evaluate Ands and Ors
recursively, and make SCEVExpander be much more aggressive about
hoisting instructions out of loops.

test/CodeGen/X86/pr3495.ll has an additional instruction now, but
it appears to be due to an arbitrary register allocation difference.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74048 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-24 01:18:18 +00:00
Devang Patel
bd262cc441 upgrade
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74016 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-23 22:11:37 +00:00
Evan Cheng
a67efd1226 Proper patterns for thumb2 shift and rotate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73987 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-23 19:39:13 +00:00
Dale Johannesen
61074878a1 The correct values here (as defined by gcc-4.2) are
different for ppc; add another version of the test.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73983 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-23 18:42:26 +00:00
Dale Johannesen
8ac9ea891c This test only works on ppc32 if some optimization is done before
generating LLVM IR; it is correct in the code as written
to use 8-byte-aligned operations to copy Key in bar.  Formerly
the gcc inliner was run, now it isn't.  I don't think it's
possible to preserve this as a pure FE test.  Adding -O2 lets
the llvm optimizers get rid of the 8-byte-aligned stores, at least.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73981 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-23 18:34:37 +00:00
Dale Johannesen
d9bc6a92f5 See test. Judging from PR 1278, at the time the test was committed, the
generated code was apparently doing stores directly into the return value
aggregate; now, it's doing a copy from a compiler-generated static object.
That object is initialized using [4 x i8] which breaks the test.  I believe
this change preserves the original point of the test.

Of course it would be better for the code to do stores directly into the
return aggregate, but that is not what happens at -O0; the llvm optimizers
seem to do that on x86 but not on ppc32, possibly because of the explicit
padding (which is unavoidable).  I think it must have been being done by
a gcc optimizer pass before.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73972 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-23 18:03:49 +00:00
Dan Gohman
91380b7239 Fix a bug in the trip-count computation with And/Or. If either of the
sides is CouldNotCompute, the resulting exact count must be CouldNotCompute.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73920 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-22 23:28:56 +00:00
Bob Wilson
5bafff36c7 Add support for ARM's Advanced SIMD (NEON) instruction set.
This is still a work in progress but most of the NEON instruction set
is supported.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73919 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-22 23:27:02 +00:00
Dan Gohman
bd5ce52740 Fix llvm::ComputeNumSignBits to handle pointer types
conservatively correctly, instead of aborting.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73908 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-22 22:02:32 +00:00
Evan Cheng
524961e57f It's coalescer, not coaleser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73902 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-22 21:09:17 +00:00
Bob Wilson
54fc124d72 For Darwin on ARMv6 and newer, make register r9 available for use as a
caller-saved register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73901 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-22 21:01:46 +00:00
Evan Cheng
81909b7423 Fix another register coalescer crash: forgot to check if the instruction being updated has already been coalesced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73898 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-22 20:49:32 +00:00
Evan Cheng
8dcbbdd00e hasFP should return true if frame address is taken.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73893 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-22 18:38:48 +00:00
Dale Johannesen
023b21895f Testcase for (llvm-gcc) 73873. Usually
std::pair<double, float*>
is 16 bytes on darwin-powerpc, but not always.
See testcase for full weirdness.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73874 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-22 04:47:32 +00:00
Dan Gohman
a334aa7a10 Teach ScalarEvolution how to analyze loops with multiple exit
blocks, and also exit blocks with multiple conditions (combined
with (bitwise) ands and ors). It's often infeasible to compute an
exact trip count in such cases, but a useful upper bound can often
be found.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73866 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-22 00:31:57 +00:00
Dan Gohman
51f53b7f5a Fix ScalarEvolution's backedge-taken count computations to check for
overflow when computing a integer division to round up.

Thanks to Nick Lewycky for noticing this!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73862 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-21 23:46:38 +00:00
Rafael Espindola
1c3329f707 Fix PR4185.
Handle FpSET_ST0_80 being used when ST0 is still alive.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73850 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-21 12:02:51 +00:00
Nick Lewycky
e47f59db44 Expand this test to handle more cases (remainder and shifts) of zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73839 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-21 01:56:41 +00:00
Chris Lattner
1db6866147 implement PR4424: 0/x is always 0 for integer division.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73835 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-21 01:15:55 +00:00
Chris Lattner
5c0b16d0c4 change TLS_ADDR lowering to lower to a real mem operand, instead of matching as
a global with that gets printed with the :mem modifier.  All operands to lea's 
should be handled with the lea32mem operand kind, and this allows the TLS stuff
to do this.  There are several better ways to do this, but I went for the minimal
change since I can't really test this (beyond make check).

This also makes the use of EBX explicit in the operand list in the 32-bit, 
instead of implicit in the instruction.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73834 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-20 20:38:48 +00:00
Chris Lattner
6bfb669f82 no need for unwind info
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73832 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-20 19:48:26 +00:00
Chris Lattner
811ac0b088 no need for unwind info here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73831 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-20 19:43:09 +00:00
Evan Cheng
694f6c81e8 Fix PR4419: handle defs of partial uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73816 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-20 04:34:51 +00:00
Dan Gohman
97b52b2a88 Tweak this test to be a little less unusual.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73808 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-20 00:40:56 +00:00
Dan Gohman
763bad1a2b Generalize isLoopGuardedByCond's checking to consider two
SCEVUnknowns with identical Instructions to be equal. This allows
it to analze cases such as the attached testcase, where the front-end
has cloned the loop controlling expression. Along with r73805, this
lets IndVarSimplify eliminate all the sign-extend casts in the
loop in the attached testcase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73807 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-20 00:35:32 +00:00
Dan Gohman
2781f30eac Re-apply r73718, now that the fix in r73787 is in, and add a
hand-crafted testcase which demonstrates the bug that was exposed
in 254.gap.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73793 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 23:23:27 +00:00
Evan Cheng
ae69a2a12b Enable arm pre-allocation load / store multiple optimization pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73791 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 23:17:27 +00:00
Evan Cheng
73a76736fb Revert 73718. It's breaking 254.gap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73783 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 21:15:06 +00:00
Dan Gohman
958e292c7a Don't (unconditionally) use getSCEVAtScope to simplify the step
expression in IVUsers, because in the case of a use of a non-linear
addrec outside of a loop, this causes the addrec to be evaluated as
a linear addrec.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73774 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 17:33:15 +00:00
Chris Lattner
79c740ff47 make jump threading handle lexically identical compare instructions
as if they were multiple uses of the same instruction.  This interacts
well with the existing loadpre that j-t does to open up many new jump
threads earlier.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73768 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 16:27:56 +00:00
Eli Friedman
7e2242be71 Fix for PR2484: add an SSE1 pattern for a shuffle we normally prefer to
handle with an SSE2 instruction.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73760 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 07:00:55 +00:00
Nick Lewycky
9683f18174 Teach jump threading to look at comparisons between phi nodes and non-constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73755 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 04:56:29 +00:00
Chris Lattner
6a35b40250 Improve tail call elim to move loads above readonly calls
when it allows forming a tail call.  Patch by Frits van
Bommel.  This implements PR4323.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73752 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 04:22:16 +00:00
Chris Lattner
849832c0fb part of PR4405: disable a contentious optimization for
strcmp -> memcmp when the lengths of the strings are unknown.

Patch by Nick Lewycky!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73751 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 04:17:36 +00:00
Eli Friedman
6b7bb42c36 Mark a few Thumb instructions commutable; just happened to spot this
while experimenting.  I'm reasonably sure this is correct, but please 
tell me if these instructions have some strange property which makes this
change unsafe.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73746 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 01:43:08 +00:00
Chris Lattner
3ea4edce6a new testcase for rdar://6983634
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73729 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-18 22:53:26 +00:00
Evan Cheng
b13bafe5c1 On Darwin, ams printer should output a second label before a jump table so the linker knows it's a new atom. But this is only needed if the jump table is put in a separate section from the function body.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73720 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-18 20:37:15 +00:00
Dan Gohman
4658c9b4ea Generalize LSR's OptimizeSMax to handle unsigned max tests as well
as signed max tests. Along with r73717, this helps CodeGen avoid
emitting code for a maximum operation for this class of loop.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73718 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-18 20:23:18 +00:00
Dan Gohman
4e8a98519e Remove the code from IVUsers that attempted to handle
casted induction variables in cases where the cast
isn't foldable. It ended up being a pessimization in
many cases. This could be fixed, but it would require
a bunch of complicated code in IVUsers' clients. The
advantages of this approach aren't visible enough to
justify it at this time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73706 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-18 16:54:06 +00:00
Dan Gohman
fd3daa74c2 Generalize the zext(trunc(t) & C) instcombine to work even with
C is not a low-bits mask, and add a similar instcombine for
zext((trunc(t) & C) ^ C).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73705 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-18 16:30:21 +00:00
Dan Gohman
820528331f Teach ScalarEvolution how to recognize another xor(and(x, C), C) case.
If C is a single bit and the and gets analyzed as a truncate and
zero-extend, the xor can be represnted as an add.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73664 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-18 00:00:20 +00:00
Dan Gohman
a392c788be Instcombine zext(trunc(x) & mask) to x&mask, even if the trunc has
multiple users.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73656 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-17 23:17:05 +00:00
Dan Gohman
559254b697 Add -disable-output to a bunch of tests that don't care about the output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73633 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-17 20:56:26 +00:00
Dale Johannesen
42c3f554f4 This fixes a bug introduced in 72661, which can
move loads back past a check that the load address
is valid, see new testcase.  The test that went
in with 72661 has exactly this case, except that
the conditional it's moving past is checking
something else; I've settled for changing that
test to reference a global, not a pointer.  It
may be possible to scan all the tests you pass and
make sure none of them are checking any component
of the address, but it's not trivial and I'm not
trying to do that here.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73632 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-17 20:48:23 +00:00
Anton Korobeynikov
52237119a9 Initial support for some Thumb2 instructions.
Patch by Viktor Kutuzov and Anton Korzh from Access Softek, Inc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73622 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-17 18:13:58 +00:00
Eli Friedman
af79ae558f Correct an accidental duplication of the test (patch doesn't handle
creating new files very well).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73599 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-17 03:05:00 +00:00
Eli Friedman
a999a511f7 PR3439: Correct a silly mistake in the SimplifyDemandedUseBits code for
SRem.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73598 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-17 02:57:36 +00:00
Dan Gohman
3034c10675 Fix ScalarEvolution's Xor handling to not assume that an And
that gets recognized with a SCEVZeroExtendExpr must be an And
with a low-bits mask. With r73540, this is no longer the case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73594 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-17 01:22:39 +00:00
Dale Johannesen
0ab28633c6 Test for llvm-gcc patch 73564.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73565 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 22:18:33 +00:00
Anton Korobeynikov
a4e968cb0e Make the test target-neutral
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73547 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 20:25:25 +00:00
Dan Gohman
c6ac322c1c Generalize a few more instcombines to be vector/scalar-independent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73541 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 19:55:29 +00:00
Dan Gohman
61ffa8e373 Instcombine's ShrinkDemandedConstant may strip bits out of constants,
obscuring what would otherwise be a low-bits mask.  Use ComputeMaskedBits
to compute what ShrinkDemandedConstant knew about to reconstruct a
low-bits mask value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73540 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 19:52:01 +00:00
Anton Korobeynikov
2932795309 GNU as refuses to assemble "pop {}" instruction. Do not emit such
(this is the case when we have thumb vararg function with single
callee-saved register, which is handled separately).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73529 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 18:49:08 +00:00
Chris Lattner
3d0cbbe0ad Testcase for r73506
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73508 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 17:23:25 +00:00
Evan Cheng
67fcf56ac4 If a val# is defined by an implicit_def and it is being removed, all of the copies off the val# were removed. This causes problem later since the scavenger will see uses of registers without defs. The proper solution is to change the copies into implicit_def's instead.
TurnCopyIntoImpDef turns a copy into implicit_def and remove the val# defined by it. This causes an scavenger assertion later if the def reaches other blocks. Disable the transformation if the value live interval extends beyond its def block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73478 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 07:12:58 +00:00
Eli Friedman
db3c169f3a Add some generic expansion logic for SMULO and UMULO. Fixes UMULO
support for x86, and UMULO/SMULO for many architectures, including PPC 
(PR4201), ARM, and Cell. The resulting expansion isn't perfect, but it's
not bad.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73477 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 06:58:29 +00:00
Devang Patel
c2230821a6 Use MainCU if it is available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73457 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 02:09:30 +00:00
Dan Gohman
9a8c5807f8 Update this test to use fmul instead of mul.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73436 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15 22:49:34 +00:00
Dan Gohman
6de29f8d96 Support vector casts in more places, fixing a variety of assertion
failures.

To support this, add some utility functions to Type to help support
vector/scalar-independent code. Change ConstantInt::get and
ConstantFP::get to support vector types, and add an overload to
ConstantInt::get that uses a static IntegerType type, for
convenience.

Introduce a new getConstant method for ScalarEvolution, to simplify
common use cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73431 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15 22:12:54 +00:00
Devang Patel
11a407f43f Gracefully handle imbalanced inline function begin and end markers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73426 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15 21:45:50 +00:00
Evan Cheng
2077e18caf ifcvt should ignore cfg where true and false successors are the same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73423 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15 21:24:34 +00:00
Dale Johannesen
c1f104054d Fix the crash in this test. This is basically the same
problem addressed in 31284, but the patch there only
addressed the case where an invoke is the first thing in
a block.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73416 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15 20:59:27 +00:00
Bill Wendling
8c3befd76e This test is failing. Revert for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73404 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15 19:10:56 +00:00
Bill Wendling
f88f21c5d4 Add another testcase for r71478.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73399 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15 18:36:34 +00:00
Arnold Schwaighofer
5d2c01e48a CheckTailCallReturnConstraints is missing a check on the
incomming chain of the RETURN node. The incomming chain must
be the outgoing chain of the CALL node. This causes the
backend to identify tail calls that are not tail calls. This
patch fixes this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73387 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15 14:43:36 +00:00
Evan Cheng
358dec5180 Part 1.
- Change register allocation hint to a pair of unsigned integers. The hint type is zero (which means prefer the register specified as second part of the pair) or entirely target dependent.
- Allow targets to specify alternative register allocation orders based on allocation hint.

Part 2.
- Use the register allocation hint system to implement more aggressive load / store multiple formation.
- Aggressively form LDRD / STRD. These are formed *before* register allocation. It has to be done this way to shorten live interval of base and offset registers. e.g.
v1025 = LDR v1024, 0
v1026 = LDR v1024, 0
=>
v1025,v1026 = LDRD v1024, 0

If this transformation isn't done before allocation, v1024 will overlap v1025 which means it more difficult to allocate a register pair.

- Even with the register allocation hint, it may not be possible to get the desired allocation. In that case, the post-allocation load / store multiple pass must fix the ldrd / strd instructions. They can either become ldm / stm instructions or back to a pair of ldr / str instructions.

This is work in progress, not yet enabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73381 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15 08:28:29 +00:00