Commit Graph

13472 Commits

Author SHA1 Message Date
Chandler Carruth
16295fc20b Tweak the loop rotation logic to check whether the loop is naturally
laid out in a form with a fallthrough into the header and a fallthrough
out of the bottom. In that case, leave the loop alone because any
rotation will introduce unnecessary branches. If either side looks like
it will require an explicit branch, then the rotation won't add any, do
it to ensure the branch occurs outside of the loop (if possible) and
maximize the benefit of the fallthrough in the bottom.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154806 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 09:31:23 +00:00
Hal Finkel
31490baf38 Remove dead SD nodes after the combining pass. Fixes PR12201.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154786 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 03:33:22 +00:00
Chandler Carruth
70daea90af Rewrite how machine block placement handles loop rotation.
This is a complex change that resulted from a great deal of
experimentation with several different benchmarks. The one which proved
the most useful is included as a test case, but I don't know that it
captures all of the relevant changes, as I didn't have specific
regression tests for each, they were more the result of reasoning about
what the old algorithm would possibly do wrong. I'm also failing at the
moment to craft more targeted regression tests for these changes, if
anyone has ideas, it would be welcome.

The first big thing broken with the old algorithm is the idea that we
can take a basic block which has a loop-exiting successor and a looping
successor and use the looping successor as the layout top in order to
get that particular block to be the bottom of the loop after layout.
This happens to work in many cases, but not in all.

The second big thing broken was that we didn't try to select the exit
which fell into the nearest enclosing loop (to which we exit at all). As
a consequence, even if the rotation worked perfectly, it would result in
one of two bad layouts. Either the bottom of the loop would get
fallthrough, skipping across a nearer enclosing loop and thereby making
it discontiguous, or it would be forced to take an explicit jump over
the nearest enclosing loop to earch its successor. The point of the
rotation is to get fallthrough, so we need it to fallthrough to the
nearest loop it can.

The fix to the first issue is to actually layout the loop from the loop
header, and then rotate the loop such that the correct exiting edge can
be a fallthrough edge. This is actually much easier than I anticipated
because we can handle all the hard parts of finding a viable rotation
before we do the layout. We just store that, and then rotate after
layout is finished. No inner loops get split across the post-rotation
backedge because we check for them when selecting the rotation.

That fix exposed a latent problem with our exitting block selection --
we should allow the backedge to point into the middle of some inner-loop
chain as there is no real penalty to it, the whole point is that it
*won't* be a fallthrough edge. This may have blocked the rotation at all
in some cases, I have no idea and no test case as I've never seen it in
practice, it was just noticed by inspection.

Finally, all of these fixes, and studying the loops they produce,
highlighted another problem: in rotating loops like this, we sometimes
fail to align the destination of these backwards jumping edges. Fix this
by actually walking the backwards edges rather than relying on loopinfo.

This fixes regressions on heapsort if block placement is enabled as well
as lots of other cases where the previous logic would introduce an
abundance of unnecessary branches into the execution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154783 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 01:12:56 +00:00
Nadav Rotem
3ab32ea49e When emulating vselect using OR/AND/XOR make sure to bitcast the result back to the original type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154764 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-15 15:08:09 +00:00
Andrew Trick
0070792012 misched: Added CanHandleTerminators.
This is a special flag for targets that really want their block
terminators in the DAG. The default scheduler cannot handle this
correctly, so it becomes the specialized scheduler's responsibility to
schedule terminators.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154712 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-13 23:29:54 +00:00
Benjamin Kramer
36c38b81f0 Reduce malloc traffic in DwarfAccelTable
- Don't copy offsets into HashData, the underlying vector won't change once the table is finalized.
- Allocate HashData and HashDataContents in a BumpPtrAllocator.
- Allocate string map entries in the same allocator.
- Random cleanups.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154694 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-13 20:06:17 +00:00
Sirish Pande
d1a87a6806 HexagonPacketizer patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154616 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-12 21:06:38 +00:00
Nadav Rotem
2e506198c8 Reapply 154397. Original message:
Fix a dagcombine optimization which assumes that the vsetcc result type is always
of the same size as the compared values. This is ture for SSE/AVX/NEON but not
for all targets.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154490 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 08:26:11 +00:00
Craig Topper
7eb46d834c Fix an overly indented line. Remove an 'else' after an 'if' that returns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154479 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 04:55:51 +00:00
Craig Topper
c42e640dc8 Inline implVisitAluOverflow by introducing a nested switch to convert the intrinsic to an nodetype.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154478 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 04:34:11 +00:00
Craig Topper
23de31b13b Optimize code a bit by calling push_back only once in some loops. Reduces compiled code size a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154473 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 03:06:35 +00:00
Jakob Stoklund Olesen
71fbed45d9 Tweak MachineLICM heuristics for cheap instructions.
Allow cheap instructions to be hoisted if they are register pressure
neutral or better. This happens if the instruction is the last loop use
of another virtual register.

Only expensive instructions are allowed to increase loop register
pressure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154455 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 00:00:28 +00:00
Jakob Stoklund Olesen
8b560b8c48 Only check for PHI uses inside the current loop.
Hoisting a value that is used by a PHI in the loop will introduce a
copy because the live range is extended to cross the PHI.

The same applies to PHIs in exit blocks.

Also use this opportunity to make HasLoopPHIUse() non-recursive.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154454 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 00:00:26 +00:00
Owen Anderson
06886aaaeb Move the constant-folding support for FP_ROUND in SelectionDAG from the one-operand version of getNode() to the two-operand version, since it became a two-operand node at sound point.
Zap a testcase that this allows us to completely fold away.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154447 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10 22:46:53 +00:00
Duncan Sands
507bb7a42f Add a comment noting that the fdiv -> fmul conversion won't generate
multiplication by a denormal, and some tests checking that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154431 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10 20:35:27 +00:00
Eric Christopher
18112d83e7 To ensure that we have more accurate line information for a block
don't elide the branch instruction if it's the only one in the block,
otherwise it's ok.

PR9796 and rdar://11215207

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154417 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10 18:18:10 +00:00
Owen Anderson
b79855ee18 Revert r154397, which was causing make check failures on the buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154414 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10 18:02:12 +00:00
Nadav Rotem
77dde089ab Fix a dagcombine optimization which assumes that the vsetcc result type is always
of the same size as the compared values. This is ture for SSE/AVX/NEON but not
for all targets.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154397 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10 14:58:31 +00:00
Chandler Carruth
45fb79bc54 Make a somewhat subtle change in the logic of block placement. Sometimes
the loop header has a non-loop predecessor which has been pre-fused into
its chain due to unanalyzable branches. In this case, rotating the
header into the body of the loop in order to place a loop exit at the
bottom of the loop is a Very Bad Idea as it makes the loop
non-contiguous.

I'm working on a good test case for this, but it's a bit annoynig to
craft. I should get one shortly, but I'm submitting this now so I can
begin the (lengthy) performance analysis process. An initial run of LNT
looks really, really good, but there is too much noise there for me to
trust it much.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154395 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10 13:35:57 +00:00
Anton Korobeynikov
999821cddf Transform div to mul with reciprocal only when fp imm is legal.
This fixes PR12516 and uncovers one weird problem in legalize (workarounded)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154394 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10 13:22:49 +00:00
Evan Cheng
b52ba49fdb Make the code slightly more palatable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154378 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10 03:15:18 +00:00
Evan Cheng
bf010eb911 Fix a long standing tail call optimization bug. When a libcall is emitted
legalizer always use the DAG entry node. This is wrong when the libcall is
emitted as a tail call since it effectively folds the return node. If
the return node's input chain is not the entry (i.e. call, load, or store)
use that as the tail call input chain.

PR12419
rdar://9770785
rdar://11195178


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154370 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10 01:51:00 +00:00
Rafael Espindola
fdb230a154 Don't try to zExt just to check if an integer constant is zero, it might
not fit in a i64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154364 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10 00:16:22 +00:00
Akira Hatanaka
787c3fd385 Have TargetLowering::getPICJumpTableRelocBase return a node that points to the
GOT if jump table uses 64-bit gp-relative relocation.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154341 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 20:32:12 +00:00
Lang Hames
f31ceaf8b7 Patch r153892 for PR11861 apparently broke an external project (see PR12493).
This patch restores TwoAddressInstructionPass's pre-r153892 behaviour when
rescheduling instructions in TryInstructionTransform. Hopefully this will fix
PR12493. To refix PR11861, lowering of INSERT_SUBREGS is deferred until after
the copy that unties the operands is emitted (this seems to be a more
appropriate fix for that issue anyway).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154338 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 20:17:30 +00:00
Rafael Espindola
decbc43f72 Pattern match a setcc of boolean value with 0 as a truncate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154322 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 16:06:03 +00:00
Craig Topper
f920423ffc Remove unnecessary type check when combining and/or/xor of swizzles. Move some checks to allow better early out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154309 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 07:19:09 +00:00
Craig Topper
b7135e5838 Remove unnecessary 'else' on an 'if' that always returns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154308 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 05:59:53 +00:00
Craig Topper
4b206bdfd0 Optimize code slightly. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154307 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 05:55:33 +00:00
Craig Topper
ae1bec52f7 Replace some explicit checks with asserts for conditions that should never happen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154305 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 05:16:56 +00:00
Craig Topper
10612dc15f Optimize code a bit. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154299 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08 23:15:04 +00:00
Benjamin Kramer
c47bc33218 Silence sign-compare warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154297 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08 19:04:45 +00:00
Duncan Sands
3ef3fcfc04 Only have codegen turn fdiv by a constant into fmul by the reciprocal
when -ffast-math, i.e. don't just always do it if the reciprocal can
be formed exactly.  There is already an IR level transform that does
that, and it does it more carefully.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154296 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08 18:08:12 +00:00
Craig Topper
f873dde502 Simplify code that tries to do vector extracts for shuffles when the mask width and the input vector widths don't match. No need to check the min and max are in range before calculating the start index. The range check after having the start index is sufficient. Also no need to check for an extract from the beginning differently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154295 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08 17:53:33 +00:00
Chandler Carruth
34797136cb Move the TLSModel information into the TargetMachine rather than hiding
in TargetLowering. There was already a FIXME about this location being
odd. The interface is simplified as a consequence. This will also make
it easier to change TLS models when compiling with PIE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154292 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08 17:20:55 +00:00
Chandler Carruth
5e93a76722 Remove an over zealous assert. The assert was trying to catch places
where a chain outside of the loop block-set ended up in the worklist for
scheduling as part of the contiguous loop. However, asserting the first
block in the chain is in the loop-set isn't a valid check -- we may be
forced to drag a chain into the worklist due to one block in the chain
being part of the loop even though the first block is *not* in the loop.
This occurs when we have been forced to form a chain early due to
un-analyzable branches.

No test case here as I have no idea how to even begin reducing one, and
it will be hopelessly fragile. We have to somehow end up with a loop
header of an inner loop which is a successor of a basic block with an
unanalyzable pair of branch instructions. Ow. Self-host triggers it so
it is unlikely it will regress.

This at least gets block placement back to passing selfhost and the test
suite. There are still a lot of slowdown that I don't like coming out of
block placement, although there are now also a lot of speedups. =[ I'm
seeing swings in both directions up to 10%. I'm going to try to find
time to dig into this and see if we can turn this on for 3.1 as it does
a really good job of cleaning up after some loops that degraded with the
inliner changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154287 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08 14:37:02 +00:00
Chandler Carruth
6313d941d2 Add a debug-only 'dump' method to the BlockChain structure to ease
debugging.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154286 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08 14:37:01 +00:00
Craig Topper
b45c969959 Turn avx2 vinserti128 intrinsic calls into INSERT_SUBVECTOR DAG nodes and remove patterns for selecting the intrinsic. Similar was already done for avx1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154272 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-07 22:32:29 +00:00
Craig Topper
ad9fb01e86 Remove 'else' after 'if' that ends in return.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154267 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-07 21:23:41 +00:00
Nadav Rotem
d16c8d0d33 1. Remove the part of r153848 which optimizes shuffle-of-shuffle into a new
shuffle node because it could introduce new shuffle nodes that were not
   supported efficiently by the target.

2. Add a more restrictive shuffle-of-shuffle optimization for cases where the
   second shuffle reverses the transformation of the first shuffle.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154266 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-07 21:19:08 +00:00
Duncan Sands
961d666be4 Convert floating point division by a constant into multiplication by the
reciprocal if converting to the reciprocal is exact.  Do it even if inexact
if -ffast-math.  This substantially speeds up ac.f90 from the polyhedron
benchmarks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154265 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-07 20:04:00 +00:00
Eric Christopher
60b35f408b Patch to set is_stmt a little better for prologue lines in a function.
This enables debuggers to see what are interesting lines for a
breakpoint rather than any line that starts a function.

rdar://9852092

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154120 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-05 20:39:05 +00:00
Jakob Stoklund Olesen
740cd657f3 Don't break the IV update in TLI::SimplifySetCC().
LSR always tries to make the ICmp in the loop latch use the incremented
induction variable. This allows the induction variable to be kept in a
single register.

When the induction variable limit is equal to the stride,
SimplifySetCC() would break LSR's hard work by transforming:

   (icmp (add iv, stride), stride) --> (cmp iv, 0)

This forced us to use lea for the IC update, preventing the simpler
incl+cmp.

<rdar://problem/7643606>
<rdar://problem/11184260>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154119 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-05 20:30:20 +00:00
Owen Anderson
d7484e5d9b Treat f16 the same as f80/f128 for the purposes of generating constants during instruction selection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154113 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-05 18:50:32 +00:00
Pete Cooper
ef74ca6a41 REG_SEQUENCE expansion to COPY instructions wasn't taking account of sub register indices on the source registers. No simple test case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154051 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 21:03:25 +00:00
Pete Cooper
9751b81fc9 f16 FREM can now be legalized by promoting to f32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154039 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 19:36:31 +00:00
Jakob Stoklund Olesen
1487cb3a5a Remove spurious debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154032 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 18:23:38 +00:00
Rafael Espindola
26c8dcc692 Always compute all the bits in ComputeMaskedBits.
This allows us to keep passing reduced masks to SimplifyDemandedBits, but
know about all the bits if SimplifyDemandedBits fails. This allows instcombine
to simplify cases like the one in the included testcase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154011 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 12:51:34 +00:00
Craig Topper
8d41a1a7e6 Remove default case from switch that was already covering all cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153996 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 04:42:42 +00:00
Pete Cooper
e5ae51a38f Removed useless switch for default case when switch was covering all the enum values
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153984 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 00:53:04 +00:00