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Author SHA1 Message Date
Rafael Espindola
1e422bf49d Remove utils/profile.pl. 
It uses now removed opt options.

Patch by Alastair Murray!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192606 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-14 16:48:32 +00:00
Rafael Espindola
61bc4be26e Remove lib/Transforms/Instrumentation/ProfilingUtils.* 
They were leftover from the old profiling support.

Patch by Alastair Murray.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192605 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-14 16:46:46 +00:00
Rafael Espindola
67b28826cd Remove the now unused strong phi elimination pass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192604 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-14 16:39:04 +00:00
Chris Lattner
2a6cbba2db Basic blocks typically have few predecessors. Use a SmallDenseMap to 
avoid a heap allocation when this is the case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192602 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-14 16:05:55 +00:00
Evgeniy Stepanov
95864303f5 [msan] Instrument x86.*_cvt* intrinsics. 
Currently MSan checks that arguments of *cvt* intrinsics are fully initialized.
That's too much to ask: some of them only operate on lower half, or even
quarter, of the input register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192599 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-14 15:16:25 +00:00
Chad Rosier
942827b113 [AArch64] Add support for NEON scalar integer compare instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192596 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-14 14:37:20 +00:00
Bernard Ogden
0d1e2aebe6 Add Cortex-A57 support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192591 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-14 13:17:07 +00:00
Bernard Ogden
7220572e74 Add subtarget feature support for Cortex-A53 
Some previous implicit defaults have changed, for example FP and NEON
are now on by default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192590 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-14 13:16:57 +00:00
Matheus Almeida
9672a89c71 [mips][msa] Direct Object Emission support for BIT instructions. 
List of instructions:
bclri.{b,h,w,d}
binsli.{b,h,w,d}
binsri.{b,h,w,d}
bnegi.{b,h,w,d}
bseti.{b,h,w,d}
sat_s.{b,h,w,d}
sat_u.{b,h,w,d}
slli.{b,h,w,d}
srai.{b,h,w,d}
srari.{b,h,w,d}
srli.{b,h,w,d}
srlri.{b,h,w,d}



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192589 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-14 13:07:39 +00:00
Matheus Almeida
e89c50acc8 [mips][msa] Direct Object Emission support for VEC instructions. 
List of instructions:
and.v, bmnz.v, bmz.v, bsel.v, nor.v, or.v, xor.v.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192588 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-14 12:57:18 +00:00
Matheus Almeida
01436ba306 [mips][msa] Direct Object Emission of INSVE.{b,h,w,d}. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192587 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-14 12:38:17 +00:00
Matheus Almeida
29adbe8464 [mips][msa] Direct Object Emission for the majority of the ELM instructions. 
List of instructions:
copy_s.{b,h,w}
copy_u.{b,h,w}
sldi.{b,h,w,d}
splati.{b,h,w,d}



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192586 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-14 12:22:43 +00:00
Matheus Almeida
45ecbfc8e5 [mips][msa] Direct Object Emission of INSERT.{B,H,W} instruction. 
INSERT is the first type of MSA instruction that requires a change to the way
MSA registers are parsed. This happens because MSA registers may be suffixed by
an index in the form of an immediate or a general purpose register. The changes
to parseMSARegs reflect that requirement.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192582 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-14 11:49:30 +00:00
Evgeniy Stepanov
a0f6d1651b [msan] Fix handling of scalar select of vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192575 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-14 09:52:09 +00:00
Elena Demikhovsky
55240a5ddb Fixed a bug in dynamic allocation memory on stack. 
The alignment of allocated space was wrong, see Bugzila 17345.

Done by Zvi Rackover <zvi.rackover@intel.com>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192573 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-14 07:26:51 +00:00
Craig Topper
f50045e90d Create classes to reduce the size of the tablegen entries for the CRC32 instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192568 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-14 05:19:58 +00:00
Craig Topper
c6f7c99809 Allow pinsrw/pinsrb/pextrb/pextrw/movmskps/movmskpd/pmovmskb/extractps instructions to parse either GR32 or GR64 without resorting to duplicating instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192567 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-14 04:55:01 +00:00
Craig Topper
8e121843c1 Add disassembler support for SSE4.1 register/register form of PEXTRW. There is a shorter encoding that was part of SSE2, but a memory form was added in SSE4.1. This is the register form of that encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192566 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-14 01:42:32 +00:00
Craig Topper
bae9f69d37 Mark MOVMSKPS/MOVMSKPD/VPINSRWrr64i as AsmParserOnly to remove them from the disassembler tables. Add PINSRWrr64i to complement the AVX version. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192565 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-14 01:21:22 +00:00
David Majnemer
bf80b3cead Windows: Fix a typo in an assert 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192564 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-14 01:17:32 +00:00
Craig Topper
eefca96792 Don't use 64-bit versions of MOVMSKPD in CodeGen. The instructions only produce a 1-bit result so we can just use SUBREG_TO_REG to extend the 32-bit versions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192562 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-14 00:24:33 +00:00
David Majnemer
9f27a47ff1 Windows: Don't bother with pinning Kernel32.dll 
We don't delay load it so it shouldn't be going anywhere.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192561 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-14 00:06:58 +00:00
Will Dietz
4df7c5baa1 MC: Don't assume incoming StringRef's are null terminated. 
This can happen when processing command line arguments, which
are often stored as std::string's and later turned into
StringRef's via std::string::data().  Unfortunately this
is not guaranteed to return a null-terminated string
until C++11, causing breakage on platforms that don't do this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192558 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-13 22:09:26 +00:00
Vincent Lejeune
cf1f4c7dd1 R600: improve dump of S_WAITCNT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192557 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-13 17:56:28 +00:00
Vincent Lejeune
36d96337f7 R600/SI: Add SinkingPass before ISel 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192556 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-13 17:56:21 +00:00
Vincent Lejeune
6a809a8d29 R600/SI: Support byval arguments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192555 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-13 17:56:16 +00:00
Vincent Lejeune
f2b3a569ae R600: Use masked read sel for texture instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192554 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-13 17:56:10 +00:00
Vincent Lejeune
91ec4b0cac R600: fix swizzle export 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192553 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-13 17:56:04 +00:00
Vincent Lejeune
6639f066e1 R600: Clear the VPM bit of export instructions. 
It makes apparently no change it to set this bit or not but the
docs recommand to left it cleared.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192552 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-13 17:55:57 +00:00
David Majnemer
00f31bac0b Windows: Use GetModuleHandleEx instead of LoadLibrary 
We were using an anti-pattern of:
 - LoadLibrary
 - GetProcAddress
 - FreeLibrary

This is problematic because of several reasons:
 - We are holding on to pointers into a library we just unloaded.
 - Calling LoadLibrary results in an increase in the reference count of
   the library in question and any libraries that it depends on and
   so-on and so-forth.  This is none too quick.

Instead, use GetModuleHandleEx with GET_MODULE_HANDLE_EX_FLAG_PIN.  This
is done because because we didn't bring the reference for the library
into existence and therefor shouldn't count on it being around later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192550 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-13 10:34:21 +00:00
Will Dietz
833a29c296 TargetLowering: Don't index into empty string. 
(This is triggered by current lit tests)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192549 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-13 03:08:49 +00:00
Will Dietz
6dd7893e8c yaml2coff/elf: Touchup for compatibility. 
* std::string::append(int, int) can be ambiguous.
* std::vector<>::data() is a C++11 feature, use ArrayRef abstraction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192542 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-12 21:29:16 +00:00
Arnold Schwaighofer
24732c3363 SLPVectorizer: Sort PHINodes based on their opcode 
Before this patch we relied on the order of phi nodes when we looked for phi
nodes of the same type. This could prevent vectorization of cases where there
was a phi node of a second type in between phi nodes of some type.

This is important for vectorization of an internal graphics kernel. On the test
suite + external on x86_64 (and on a run on armv7s) it showed no impact on
either performance or compile time.

radar://15024459

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192537 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-12 18:56:27 +00:00
Tobias Grosser
fe82a3e360 LoopVectorize: Add missing INITIALIZE_PASS_DEPENDENCY macros 
Contributed-by:  Peter Zotov  <whitequark@whitequark.org>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192536 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-12 18:29:15 +00:00
Benjamin Kramer
18de809b0c Force a CPU on test so it doesn't depend on microarchitectural scheduling decisions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192532 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-12 11:17:12 +00:00
Bill Wendling
d36e6444aa Update so that it uses the `-V' command line option and supports Python 3.x. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192527 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-12 08:42:59 +00:00
Craig Topper
017d8a3e23 Remove more filters from the disassembler. Mark some AVX512 instructions as CodeGenOnly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192525 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-12 05:41:08 +00:00
Tom Stellard
f931867317 R600: Store disassembly in a special ELF section when feature +DumpCode is enabled. 
Patch by: Jay Cornwall

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192523 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-12 05:02:51 +00:00
Craig Topper
c429b5cca1 Mark some more instructions as CodeGenOnly. Remove filters from the disassembler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192522 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-12 04:46:18 +00:00
Reed Kotler
7f0125ba19 For Mips16, start to consolidate all forms of 32 bit literal loading so that 
they can be better handled and optimized in the Mips16 constant island code.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192520 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-12 02:19:08 +00:00
Will Dietz
e3ba15c794 Add missing #include's to cctype when using isdigit/alpha/etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192519 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-12 00:55:57 +00:00
Manman Ren
87b110ac24 Debug Info: remove form from function addDIEEntry. 
The form must be a reference form in addDIEEntry. Which reference form to
use will be decided by the callee.

No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192517 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-11 23:58:05 +00:00
Andrew Kaylor
4bad07fbec Fixing problems in lli's RemoteMemoryManager. 
This fixes a problem from a previous check-in where a return value was omitted.

Previously the remote/stubs-remote.ll and remote/stubs-sm-pic.ll tests were reporting passes, but they should have been failing.  Those tests attempt to link against an external symbol and remote symbol resolution is not supported.  The old RemoteMemoryManager implementation resulted in local symbols being used for resolution and the child process crashed but the test didn't notice.  With this check-in remote symbol resolution fails, and so the test (correctly) fails.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192514 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-11 22:47:10 +00:00
Andrew Kaylor
528f6d787b Adding multiple object support to MCJIT EH frame handling 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192504 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-11 21:25:48 +00:00
Matt Arsenault
b19b474de9 R600: Add scalar i32 add test 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192501 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-11 21:03:41 +00:00
Matt Arsenault
2ad612a9e7 Use CHECK-LABEL 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192500 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-11 21:03:39 +00:00
Matt Arsenault
e1bd218334 Fix typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192499 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-11 21:03:36 +00:00
Benjamin Kramer
4c5956cefb fConversion: Attempt #2 at fixing the MSVC build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192492 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-11 19:49:09 +00:00
Benjamin Kramer
ae6fa27a0c IfConversion: Try to unbreak the MSVC build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192487 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-11 19:39:48 +00:00
Benjamin Kramer
5af763cb2a Mips: Disassemble sign-extended 64 bit immediates properly. 
This doesn't change the meaning of the output, but makes look right. PR17539.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192483 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-11 19:05:08 +00:00