Commit Graph

267 Commits

Author SHA1 Message Date
Quentin Colombet
f0c6ab6f00 [VirtRegMap] Fix for PR17825. Do not ignore noreturn definitions when setting
isPhysRegUsed if the unwind information is required.
Indeed, the runtime may need a correct stack to be able to unwind the call.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194271 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-08 18:14:17 +00:00
Quentin Colombet
ce734f1f43 [PR16882] Ignore noreturn definitions when setting isPhysRegUsed.
PEI inserts a save/restore sequence for the link register, according to the
information it gets from the MachineRegisterInfo.
MachineRegisterInfo is populated by the VirtRegMap pass.
This pass was not aware of noreturn calls and was registering the definitions of
these calls the same way as regular operations.

Modify VirtRegPass so that it does not set the isPhysRegUsed information for
registers only defined by noreturn calls.
The rational is that a noreturn call is the "last instruction" of the program
(if it returns the behavior is undefined), so everything that is defined by it
cannot be used and will not interfere with anything else. Therefore, it is
pointless to account for then.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191349 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-25 00:26:17 +00:00
Jakob Stoklund Olesen
46f6fe7a45 Remove VirtRegMap::getRegAllocPref().
Now that there can be multiple hint registers from targets, it doesn't
make sense to have a function that returns 'the' preferred register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169190 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 00:35:59 +00:00
Jakob Stoklund Olesen
980bddfb1c Use MRI::getSimpleHint() instead of getRegAllocPref() in remaining cases.
Targets can provide multiple hints now, so getRegAllocPref() doesn't
make sense any longer because it only returns one preferred register.
Replace it with getSimpleHint() in the remaining heuristics. This
function only

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169188 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 00:30:22 +00:00
Jakob Stoklund Olesen
fc6374439e Add VirtRegMap::hasKnownPreference().
Virtual registers with a known preferred register are prioritized by
RAGreedy. This function makes the condition explicit without depending
on getRegAllocPref().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169179 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03 23:23:50 +00:00
Chandler Carruth
d04a8d4b33 Use the new script to sort the includes of every file under lib.
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03 16:50:05 +00:00
Jakob Stoklund Olesen
1ead68d769 Make the LiveRegMatrix analysis available to targets.
No functional change, just moved header files.

Targets can inject custom passes between register allocation and
rewriting. This makes it possible to tweak the register allocation
before rewriting, using the full global interference checking available
from LiveRegMatrix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168806 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-28 19:13:06 +00:00
Jakob Stoklund Olesen
fb9ebbf236 Switch most getReservedRegs() clients to the MRI equivalent.
Using the cached bit vector in MRI avoids comstantly allocating and
recomputing the reserved register bit vector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165983 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-15 21:57:41 +00:00
Evan Cheng
bb36a43872 Fix a significant recent(?) regression. StackSlotColoring no longer did anything
because LiveStackAnalysis was not preserved by VirtRegWriter. This caused
big stack usage regression in some cases.

rdar://12340383


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164408 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 20:04:28 +00:00
Manman Ren
b720be6a50 Release build: guard dump functions with
"#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)"

No functional change. Update r163339.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163653 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11 22:23:19 +00:00
Manman Ren
77e300e8f0 Release build: guard dump functions with "ifndef NDEBUG"
No functional change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163339 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06 19:06:06 +00:00
Jakob Stoklund Olesen
e617ccb80d Handle overlapping regunit intervals in LiveIntervals::addKillFlags().
We will soon allow virtual register live ranges to overlap regunit live
ranges when the physreg is defined as a copy of the virtreg:

  %EAX = COPY %vreg5
  FOO %vreg5
  BAR %EAX<kill>

There is no real interference since %vreg5 and %EAX have the same value
where they overlap.

This patch prevents addKillFlags from adding virtreg kill flags to FOO
where the assigned physreg is overlapping the virtual register live
range.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163335 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06 18:15:18 +00:00
Craig Topper
96601ca332 Add a getName function to MachineFunction. Use it in places that previously did getFunction()->getName(). Remove includes of Function.h that are no longer needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162347 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-22 06:07:19 +00:00
Jakob Stoklund Olesen
fe17bdbb50 Also compute MBB live-in lists in the new rewriter pass.
This deduplicates some code from the optimizing register allocators, and
it means that it is now possible to change the register allocators'
solutions simply by editing the VirtRegMap between the register
allocator pass and the rewriter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158249 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-09 00:14:47 +00:00
Jakob Stoklund Olesen
05ec712e7f Reintroduce VirtRegRewriter.
OK, not really. We don't want to reintroduce the old rewriter hacks.

This patch extracts virtual register rewriting as a separate pass that
runs after the register allocator. This is possible now that
CodeGen/Passes.cpp can configure the full optimizing register allocator
pipeline.

The rewriter pass uses register assignments in VirtRegMap to rewrite
virtual registers to physical registers, and it inserts kill flags based
on live intervals.

These finalization steps are the same for the optimizing register
allocators: RABasic, RAGreedy, and PBQP.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158244 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-08 23:44:45 +00:00
Jakob Stoklund Olesen
d9f0ff56a1 Transfer regmasks to MRI.
MRI keeps track of which physregs have been used. Make sure it gets
updated with all the regmask-clobbered registers.

Delete the closePhysRegsUsed() function which isn't necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150830 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-17 19:07:56 +00:00
Evan Cheng
3f9c251e40 Rewriter should definitly rewrite instructions inside bundles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148464 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-19 07:46:36 +00:00
Jakob Stoklund Olesen
4281e20aab Use the 'regalloc' debug tag for most register allocator tracing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147725 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-07 07:39:47 +00:00
Jakob Stoklund Olesen
2d44e02533 Assert when reserved registers have been assigned.
This can only happen if the set of reserved registers changes during
register allocation.

<rdar://problem/10625436>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147486 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-03 22:34:31 +00:00
Jakob Stoklund Olesen
0cb80d9f0f More dead code elimination in VirtRegMap.
This thing is looking a lot like a virtual register map now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144486 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-13 01:23:34 +00:00
Jakob Stoklund Olesen
cb39064e7a Stop tracking spill slot uses in VirtRegMap.
Nobody cared, StackSlotColoring scans the instructions to find used stack
slots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144485 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-13 01:23:30 +00:00
Jakob Stoklund Olesen
3cb0b0edd9 Remove dead code and data from VirtRegMap.
Most of this stuff was supporting the old deferred spill code insertion
mechanism.  Modern spillers just edit machine code in place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144484 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-13 01:02:04 +00:00
Jakob Stoklund Olesen
929e4da68b Stop tracking unused registers in VirtRegMap.
The information was only used by the register allocator in
StackSlotColoring.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144482 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-13 00:39:45 +00:00
Jakob Stoklund Olesen
200a8cef25 Also add <imp-use,kill> flags for redefined super-registers.
For example:

  %vreg10:dsub_0<def,undef> = COPY %vreg1
  %vreg10:dsub_1<def> = COPY %vreg2

is rewritten as:

  %D2<def> = COPY %D0, %Q1<imp-def>
  %D3<def> = COPY %D1, %Q1<imp-use,kill>, %Q1<imp-def>

The first COPY doesn't care about the previous value of %Q1, so it
doesn't read that register.

The second COPY is a partial redefinition of %Q1, so it implicitly kills
and redefines that register.

This makes it possible to recognize instructions that can harmlessly
clobber the full super-register.  The write and don't read the
super-register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141139 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05 00:01:48 +00:00
Jakob Stoklund Olesen
01afdb3a45 VirtRegMap is counting spill slots, not register spills.
Fix the stats counters to reflect that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139819 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15 18:31:13 +00:00
Jakob Stoklund Olesen
cf5e5f3cc0 Also count identity copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130996 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-06 17:59:57 +00:00
Jakob Stoklund Olesen
93e110ba34 Also add <imp-def> operands for defined and dead super-registers when rewriting.
We cannot rely on the <imp-def> operands added by LiveIntervals in all cases as
demonstrated by the test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130313 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-27 17:42:31 +00:00
Jakob Stoklund Olesen
280ea1a746 Don't completely eliminate identity copies that also modify super register liveness.
Turn them into noop KILL instructions instead. This lets the scavenger know when
super-registers are killed and defined.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128645 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 17:55:25 +00:00
Jakob Stoklund Olesen
bf824efcb9 Dump the register map before rewriting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128143 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 04:32:49 +00:00
Jakob Stoklund Olesen
ba05c01dab Add VirtRegMap::rewrite() and use it in the new register allocators.
The rewriter works almost identically to -rewriter=trivial, except it also
eliminates any identity copies.

This makes the new register allocators independent of VirtRegRewriter.cpp which
will be going away at the same time as RegAllocLinearScan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125967 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-18 22:03:18 +00:00
Jakob Stoklund Olesen
c9df025e33 Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.
These functions not longer assert when passed 0, but simply return false instead.

No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123155 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 02:58:51 +00:00
Jakob Stoklund Olesen
42e9c96392 Remove MachineRegisterInfo::getLastVirtReg(), it was giving wrong results
when no virtual registers have been allocated.

It was only used to resize IndexedMaps, so provide an IndexedMap::resize()
method such that

 Map.grow(MRI.getLastVirtReg());

can be replaced with the simpler

 Map.resize(MRI.getNumVirtRegs());

This works correctly when no virtuals are allocated, and it bypasses the to/from
index conversions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123130 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 21:58:20 +00:00
Jakob Stoklund Olesen
4314268128 Replace TargetRegisterInfo::printReg with a PrintReg class that also works without a TRI instance.
Print virtual registers numbered from 0 instead of the arbitrary
FirstVirtualRegister. The first virtual register is printed as %vreg0.
TRI::NoRegister is printed as %noreg.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123107 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 03:05:53 +00:00
Jakob Stoklund Olesen
c7d67f90d3 Fix VirtRegMap to use TRI::index2VirtReg and TRI::virtReg2Index instead of
depending on TRI::FirstVirtualRegister.

Also use TRI::printReg instead of printing virtual registers directly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123101 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-08 23:11:07 +00:00
Jakob Stoklund Olesen
b55e91e087 Remember to resize SpillSlotToUsesMap when allocating an emergency spill slot.
Use amazing new function call technology instead of writing identical code in
multiple places.

This fixes PR8604.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119306 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-16 00:41:01 +00:00
Owen Anderson
ce665bd2e2 Now with fewer extraneous semicolons!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115996 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-07 22:25:06 +00:00
Owen Anderson
d13db2c59c Fix batch of converting RegisterPass<> to INTIALIZE_PASS().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109045 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21 22:09:45 +00:00
Jakob Stoklund Olesen
243296690e Use the right floating point load/store instructions in PPCInstrInfo::foldMemoryOperandImpl().
The PowerPC floating point registers can represent both f32 and f64 via the
two register classes F4RC and F8RC. F8RC is considered a subclass of F4RC to
allow cross-class coalescing. This coalescing only affects whether registers
are spilled as f32 or f64.

Spill slots must be accessed with load/store instructions corresponding to the
class of the spilled register. PPCInstrInfo::foldMemoryOperandImpl was looking
at the instruction opcode which is wrong.

X86 has similar floating point register classes, but doesn't try to fold
memory operands, so there is no problem there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97262 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-26 21:09:24 +00:00
Dan Gohman
f451cb870e Fix "the the" and similar typos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95781 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 16:03:48 +00:00
David Greene
0080b1accc Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92587 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 01:25:45 +00:00
David Greene
3f2bf85d14 Add a bool flag to StackObjects telling whether they reference spill
slots.  The AsmPrinter will use this information to determine whether to
print a spill/reload comment.

Remove default argument values.  It's too easy to pass a wrong argument
value when multiple arguments have default values.  Make everything
explicit to trap bugs early.

Update all targets to adhere to the new interfaces..


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-12 20:49:22 +00:00
Lang Hames
233a60ec40 The Indexes Patch.
This introduces a new pass, SlotIndexes, which is responsible for numbering
instructions for register allocation (and other clients). SlotIndexes numbering
is designed to match the existing scheme, so this patch should not cause any
changes in the generated code.

For consistency, and to avoid naming confusion, LiveIndex has been renamed
SlotIndex.

The processImplicitDefs method of the LiveIntervals analysis has been moved
into its own pass so that it can be run prior to SlotIndexes. This was
necessary to match the existing numbering scheme.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85979 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 23:52:08 +00:00
Evan Cheng
491f54f1fd Distinquish stack slots from other stack objects. They (and fixed objects) get FixedStack PseudoSourceValues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84326 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-17 09:20:14 +00:00
Chris Lattner
d9ea85ab01 remove some uses of llvm/Support/Streams.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79842 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-23 08:43:55 +00:00
Daniel Dunbar
1cd1d98232 Move more to raw_ostream, provide support for writing MachineBasicBlock,
LiveInterval, etc to raw_ostream.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76965 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24 10:36:58 +00:00
Evan Cheng
358dec5180 Part 1.
- Change register allocation hint to a pair of unsigned integers. The hint type is zero (which means prefer the register specified as second part of the pair) or entirely target dependent.
- Allow targets to specify alternative register allocation orders based on allocation hint.

Part 2.
- Use the register allocation hint system to implement more aggressive load / store multiple formation.
- Aggressively form LDRD / STRD. These are formed *before* register allocation. It has to be done this way to shorten live interval of base and offset registers. e.g.
v1025 = LDR v1024, 0
v1026 = LDR v1024, 0
=>
v1025,v1026 = LDRD v1024, 0

If this transformation isn't done before allocation, v1024 will overlap v1025 which means it more difficult to allocate a register pair.

- Even with the register allocation hint, it may not be possible to get the desired allocation. In that case, the post-allocation load / store multiple pass must fix the ldrd / strd instructions. They can either become ldm / stm instructions or back to a pair of ldr / str instructions.

This is work in progress, not yet enabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73381 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15 08:28:29 +00:00
Evan Cheng
90f95f88c6 Move register allocation preference (or hint) from LiveInterval to MachineRegisterInfo. This allows more passes to set them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73346 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-14 20:22:55 +00:00
Mike Stump
fe095f39e7 Restore minor deletion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70892 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-04 18:40:41 +00:00
Evan Cheng
c781a243a3 In some rare cases, the register allocator can spill registers but end up not utilizing registers at all. The fundamental problem is linearscan's backtracking can end up freeing more than one allocated registers. However, reloads and restores might be folded into uses / defs and freed registers might not be used at all.
VirtRegMap keeps track of allocations so it knows what's not used. As a horrible hack, the stack coloring can color spill slots with *free* registers. That is, it replace reload and spills with copies from and to the free register. It unfold instructions that load and store the spill slot and replace them with register using variants.

Not yet enabled. This is part 1. More coming.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70787 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 18:32:42 +00:00
Bill Wendling
e67f5e4273 Oy! When reverting r68073, I added in experimental code. Sorry...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68099 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31 08:41:31 +00:00