Jim Laskey
fbb74e6941
1. In ppc64 mode we need only use one GPR.
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2. Float values need to be promoted to double when they are vararg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32074 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-01 16:30:47 +00:00
Jim Laskey
45e507ca9b
ExternalWeak case in wrong location.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32073 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-01 14:37:39 +00:00
Evan Cheng
32644ac67c
Fix 2005-05-08-FPStackifierPHI.ll failure.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32071 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-01 10:11:51 +00:00
Evan Cheng
81cf60fceb
A initialized global variable cannot be extern weak. However, if a global value's initializer is itself a external weak symbol, emit the weak reference.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32069 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-01 09:13:26 +00:00
Evan Cheng
1c45a66873
Darwin PPC external weak linkage support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32068 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-01 07:56:37 +00:00
Evan Cheng
6d7d310519
Minor code clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32067 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-01 07:38:23 +00:00
Evan Cheng
de97f9cd22
Fix indentation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32066 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-01 07:17:00 +00:00
Evan Cheng
f532c4fc15
Darwin X86 external weak linkage support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32065 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-01 07:15:24 +00:00
Chris Lattner
70fa493613
Fix the CodeGen/PowerPC/vec_constants.ll regression.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32057 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-01 01:45:39 +00:00
Anton Korobeynikov
78ee7b78c3
Introducing external weak linkage. Darwin codegen should be added later.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32052 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-01 00:25:12 +00:00
Anton Korobeynikov
7784ebc239
Factor out GVRequiresExtraLoad() from .h to .cpp
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32048 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-30 22:42:55 +00:00
Evan Cheng
0085a28d13
- Use a different wrapper node for RIP-relative GV, etc.
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- Proper support for both small static and PIC modes under X86-64
- Some (non-optimal) support for medium modes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32046 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-30 21:55:46 +00:00
Evan Cheng
12a447898a
MachineInstr::setOpcode -> MachineInstr::setInstrDescriptor
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32034 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-30 07:12:03 +00:00
Evan Cheng
6430bf0449
Remove the ugly SPARCV9 TargetInstrDescriptors hack.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32033 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-30 07:10:43 +00:00
Evan Cheng
c8306bde15
In PIC mode, GV not requiring an extra load can be used as address immediate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32028 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-29 23:48:14 +00:00
Evan Cheng
4946399b64
Clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32027 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-29 23:46:27 +00:00
Evan Cheng
d0ff02cf6f
Fix for PR1018 - Better support for X86-64 Linux in small code model.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32026 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-29 23:19:46 +00:00
Chris Lattner
15eb329dae
Fix bug codegen'ing FP constant vectors with integer splats. Make sure the
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created intrinsics have the right integer types. This fixes
PowerPC/2006-11-29-AltivecFPSplat.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32024 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-29 19:58:49 +00:00
Jim Laskey
619965d32e
Offset for load of 32-bit arg in 64-bit world was incorrect.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32019 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-29 13:37:09 +00:00
Evan Cheng
3fa9dff2c9
Custom lower READCYCLECOUNTER for x86-64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32017 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-29 08:28:13 +00:00
Chris Lattner
641c523599
done
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32013 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-29 07:21:46 +00:00
Evan Cheng
b4809b2b8f
16-byte stack alignment for X86-64 ELF. Patch by Dan Gohman.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32004 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-29 02:00:40 +00:00
Chris Lattner
5d52135a14
Upgrade the ugly darwin 64-bit bswap idiom (bswap %eax / bswap %edx /
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xchgl %eax, %edx) to llvm.bswap.i64. This compiles:
long long test2(long long A) {
return _OSSwapInt64(A);
}
to:
_test2:
movl 8(%esp), %eax
movl 4(%esp), %edx
bswapl %eax
bswapl %edx
ret
instead of:
_test2:
movl 8(%esp), %edx
movl 4(%esp), %eax
bswap %eax
bswap %edx
xchgl %eax, %edx
ret
GCC manages (with -fomit-frame-pointer) the uglier:
_test2:
subl $4, %esp
movl 8(%esp), %eax
movl 12(%esp), %edx
bswap %eax
bswap %edx
xchgl %eax, %edx
addl $4, %esp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32001 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-29 01:48:01 +00:00
Chris Lattner
625bd052a3
Trivially lower 'bswap $0' into llvm.bswap. This fixes hexxagon with the
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JIT on darwin/x86, which has htonl implemented as inline asm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31999 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-29 01:14:06 +00:00
Andrew Lenharth
f45148e113
gcc doesn't like an empty colbber list
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31987 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-28 23:07:32 +00:00
Andrew Lenharth
30579799ed
Identities are default now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31980 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-28 22:28:08 +00:00
Andrew Lenharth
85f2228454
Make identity default, and fix PR1020
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31979 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-28 22:25:32 +00:00
Evan Cheng
ead1b801e2
New entries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31976 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-28 19:59:25 +00:00
Andrew Lenharth
238581f2bb
update comments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31975 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-28 19:56:02 +00:00
Andrew Lenharth
e0cf07584d
Get the asminfo for the target most closely matching the module and use that for inline asm
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31974 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-28 19:53:36 +00:00
Andrew Lenharth
6c0695fc5c
X86 asm -> gcc asm translation table (incomplete)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31973 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-28 19:52:49 +00:00
Andrew Lenharth
3655de6873
Add per-target support for asm translation in the cbe
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31972 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-28 19:52:20 +00:00
Jim Laskey
7fc4a94bdd
Remove debug code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31970 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-28 18:27:02 +00:00
Jim Laskey
2ada08536e
Prime text sections to improve branch locality in large object files.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31969 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-28 18:21:52 +00:00
Jim Laskey
e9bd7b2e03
32-bit int space was not accounted for properly in lowerCall.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31966 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-28 14:53:52 +00:00
Evan Cheng
7bb64e8369
Fix JIT encoding bugs for shift / rotate by one ops.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31952 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-28 01:28:00 +00:00
Andrew Lenharth
29c277fc2c
Preliminary support for inline asm in the cbe. The target specific ugliness
...
is still in Writer, but issolated to a single function. This might be split
into something in each target directory. This is sufficient to get through
archie and an strcpy impl on linux-x86.
Module level asm is not handled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31948 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-27 23:50:49 +00:00
Evan Cheng
c0f64ffab9
Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
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of opcode and number of operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-27 23:37:22 +00:00
Reid Spencer
639cf7d380
When truncating to bool, it is necessary to & with 1 for all casts that
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can result in a bool. Previously PtrToInt, FPToUI and FPToSI were missing
this operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31938 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-27 18:51:06 +00:00
Reid Spencer
3da59db637
For PR950:
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The long awaited CAST patch. This introduces 12 new instructions into LLVM
to replace the cast instruction. Corresponding changes throughout LLVM are
provided. This passes llvm-test, llvm/test, and SPEC CPUINT2000 with the
exception of 175.vpr which fails only on a slight floating point output
difference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31931 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-27 01:05:10 +00:00
Duraid Madina
f525eb9056
fix storing bools to mem and unordered FP ops
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31920 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-26 04:34:26 +00:00
Reid Spencer
24652d16f8
Add newline at end of file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31902 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-25 05:41:02 +00:00
Anton Korobeynikov
12c49af81e
Refactored *GVRequiresExtraLoad() to Subtarget method.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31887 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-21 00:01:06 +00:00
Chris Lattner
e9c9f98f71
in ppc64-mode, don't allocate the 32-bit version of r13 either.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31884 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-20 20:48:05 +00:00
Chris Lattner
bdc571b7d5
r13 is the thread pointer on darwin/ppc64, don't allocate it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31882 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-20 19:33:51 +00:00
Chris Lattner
3b6f497873
Fix codegen for x86-64 on systems (like ppc or i386) that don't have 64-bit
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features autodetected. This fixes PR1010 and Regression/CodeGen/X86/xmm-r64.ll
on non-x86-64 hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31879 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-20 18:16:05 +00:00
Anton Korobeynikov
a59868519b
We should perform extra load for dllimported calls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31874 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-20 10:46:14 +00:00
Chris Lattner
b1eb987ccd
on ppc64, float arguments take 8-byte stack slots not 4-byte stack slots.
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Also, valist should create a pointer RC reg class value, not a GPRC value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31840 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-18 01:57:19 +00:00
Chris Lattner
ff790894bd
make sure to safe LR8 in the right stack slot for PPC64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31839 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-18 01:34:43 +00:00
Chris Lattner
566c1b1a04
Pretty print 'rldicr r2, r2, 2, 61' as 'sldi r2, r2, 2'.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31838 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-18 01:23:56 +00:00
Chris Lattner
54e853b8a6
Rewrite the branch selector to be correct in the face of large functions.
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The algorithm it used before wasn't 100% correct, we now use an iterative
expansion model. This fixes assembler errors when compiling 403.gcc with
tail merging enabled.
Change the way the branch selector works overall: Now, the isel generates
PPC::BCC instructions (as it used to) directly, and these BCC instructions
are emitted to the output or jitted directly if branches don't need
expansion. Only if branches need expansion are instructions rewritten
and created. This should make branch select faster, and eliminates the
Bxx instructions from the .td file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31837 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-18 00:32:03 +00:00
Chris Lattner
d5275157b5
add encoding for BCC, after finally wrestling strange ppc/tblgen endianness
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issues to the ground.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31836 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-17 23:53:28 +00:00
Chris Lattner
18258c6404
convert PPC::BCC to use the 'pred' operand instead of separate predicate
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value and CR reg #. This requires swapping the order of these everywhere
that touches BCC and requires us to write custom matching logic for
PPCcondbranch :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31835 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-17 22:37:34 +00:00
Chris Lattner
289c2d5f45
rename PPC::COND_BRANCH to PPC::BCC
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31834 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-17 22:14:47 +00:00
Chris Lattner
df4ed6350b
start using PPC predicates more consistently.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31833 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-17 22:10:59 +00:00
Evan Cheng
b1409ce7ba
For unsigned 8-bit division. Use movzbw to set the lower 8 bits of AX while
...
clearing the upper 8-bits instead of issuing two instructions. This also
eliminates the need to target the AH register which can be problematic on
x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31832 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-17 22:10:14 +00:00
Jim Laskey
9dea41d9e1
Hopefully a good crack at making debugging work on intel -disable-fp-elim.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31830 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-17 21:19:15 +00:00
Jim Laskey
d6fa8c166a
Assert unhandled case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31828 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-17 18:49:39 +00:00
Jim Laskey
2ff5cdb16c
1. Ignore the -disable-fp-elim when the routine is a leaf.
...
2. Offsets on 64-bit stores are still in bytes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31824 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-17 16:09:31 +00:00
Jim Laskey
c1c2f4b52b
Typo. Fix the nightly tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31823 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-17 14:06:41 +00:00
Bill Wendling
6345d75729
Removed even more std::cerr and #include <iostream> things.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31813 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-17 07:52:03 +00:00
Chris Lattner
280b714cd0
implement a todo: change a map into a vector
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31805 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-17 01:52:23 +00:00
Chris Lattner
8781466176
fix typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31799 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-17 00:49:36 +00:00
Chris Lattner
e28a12a3b8
implicit_def_vrrc doesn't generate code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31797 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-16 23:49:52 +00:00
Evan Cheng
ebf01d63b0
Correct instructions for moving data between GR64 and SSE registers; also correct load i64 / store i64 from v2i64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31795 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-16 23:33:25 +00:00
Evan Cheng
e23fc60854
Fix a potential bug: MOVPDI2DI, etc. are not copy instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31794 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-16 23:22:26 +00:00
Jim Laskey
2f616bff7e
This is a general clean up of the PowerPC ABI. Address several problems and
...
bugs including making sure that the TOS links back to the previous frame,
that the maximum call frame size is not included twice when using frame
pointers, no longer growing the frame on calls, double storing of SP and
a cleaner/faster dynamic alloca.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31792 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-16 22:43:37 +00:00
Chris Lattner
1b0a2d8370
fix a regression that I introduced. stdu should scale the offset by 4
...
before printing it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31791 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-16 21:45:30 +00:00
Evan Cheng
73b00947e7
Align stubs on 4 byte boundary. This fixes 447.dealII.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31790 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-16 20:13:34 +00:00
Chris Lattner
cb53595d70
add a statistic
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31785 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-16 18:13:49 +00:00
Chris Lattner
0403862158
fix broken encoding
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31778 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-16 01:01:28 +00:00
Chris Lattner
80df01d2cf
add ppc64 r+i stores with update.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31776 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-16 00:57:19 +00:00
Chris Lattner
74531e49ef
add patterns for ppc32 preinc stores. ppc64 next.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31775 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-16 00:41:37 +00:00
Chris Lattner
ef20fefa65
switch these back to the 'bad old way'
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31774 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-16 00:33:34 +00:00
Chris Lattner
5e797a5b1c
Fix ppc64 epilog bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31771 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-15 23:35:30 +00:00
Chris Lattner
8e28b5c426
Stop using isTwoAddress, switching to operand constraints instead.
...
Tell the codegen emitter that specific operands are not to be encoded, fixing
JIT regressions w.r.t. pre-inc loads and stores (e.g. lwzu, which we generate
even when general preinc loads are not enabled).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31770 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-15 23:24:18 +00:00
Chris Lattner
fa326c709f
add a new field needed by the code emitter generator.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31768 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-15 22:55:04 +00:00
Evan Cheng
6ce7dc2a97
Properly transfer kill / dead info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31765 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-15 20:58:11 +00:00
Evan Cheng
ddd2a4556a
Kill / dead info has been moved to MI's.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31764 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-15 20:56:39 +00:00
Evan Cheng
ff608a7a69
commuteInstruction should propagate kill / dead info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31763 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-15 20:56:03 +00:00
Chris Lattner
0851b4f3ed
fix ldu/stu jit encoding. Swith 64-bit preinc load instrs to use memri
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addrmodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31757 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-15 19:55:13 +00:00
Chris Lattner
b71fd7897f
Simplify IntrinsicLowering and clarify that it is only for use by the
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CBE and interpreter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31755 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-15 18:00:10 +00:00
Chris Lattner
d6842e4e18
Remove unneeded forward decls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31754 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-15 17:53:13 +00:00
Chris Lattner
5e14b821cd
Fix the PPC regressions last night
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31752 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-15 17:40:51 +00:00
Chris Lattner
f8e07f448a
Switch loads over to use memri as the operand instead of a reg/imm operand
...
pair for cleanliness. Add instructions for PPC32 preinc-stores with commented
out patterns. More improvement is needed to enable the patterns, but we're
getting close.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31749 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-15 02:43:19 +00:00
Evan Cheng
3cdd9f65ed
Revert. This wasn't meant to be checked in.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31737 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-14 19:20:33 +00:00
Chris Lattner
26e552b04c
group load and store instructions together. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31736 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-14 19:19:53 +00:00
Chris Lattner
fc14b31540
Fix predicates for unindexed stores so they don't accidentally match indexed
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stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31735 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-14 19:13:39 +00:00
Chris Lattner
6a5339ba65
Rework PPC64 calls. Now we have a LR8/CTR8 register which the PPC64 calls
...
clobber. This allows LR8 to be save/restored correctly as a 64-bit quantity,
instead of handling it as a 32-bit quantity. This unbreaks ppc64 codegen when
the code is actually located above the 4G boundary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31734 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-14 18:44:47 +00:00
Chris Lattner
d10434215d
remove a ton of custom selection logic no longer needed
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31733 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-14 18:43:11 +00:00
Chris Lattner
20ddd4a7ae
it would be nice of ctlz were lowered to bsf etc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31730 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-14 08:08:46 +00:00
Chris Lattner
ac011bce9e
lower "X = seteq Y, Z" to '(shr (ctlz (xor Y, Z)), 5)' instead of
...
'(shr (ctlz (sub Y, Z)), 5)'.
The use of xor better exposes the operation to bit-twiddling logic in the
dag combiner. For example, this:
typedef struct {
unsigned prefix : 4;
unsigned code : 4;
unsigned unsigned_p : 4;
} tree_common;
int foo(tree_common *a, tree_common *b) {
return a->code == b->code;
}
Now compiles to:
_foo:
lwz r2, 0(r4)
lwz r3, 0(r3)
xor r2, r3, r2
rlwinm r2, r2, 28, 28, 31
cntlzw r2, r2
srwi r3, r2, 5
blr
instead of:
_foo:
lbz r2, 3(r4)
lbz r3, 3(r3)
srwi r2, r2, 4
srwi r3, r3, 4
subf r2, r2, r3
cntlzw r2, r2
srwi r3, r2, 5
blr
saving a cycle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31725 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-14 05:28:08 +00:00
Chris Lattner
9b62b458c5
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31719 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-14 01:57:53 +00:00
Chris Lattner
2fe4bf453b
minor tweaks, reject vector preinc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31717 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-14 01:38:31 +00:00
Evan Cheng
7ce4578353
Matches MachineInstr changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31712 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-13 23:36:35 +00:00
Chris Lattner
c9dcf28955
teach the g5 hazard recognizer about update loads. This fixes
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Ptrdist/anagram among others.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31708 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-13 20:11:06 +00:00
Nick Lewycky
bf63734a1b
Cute example from Chris Lattner.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31696 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-13 00:23:28 +00:00
Jim Laskey
dfc55885e2
Make sure stack link is set in 64-bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31690 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-11 22:22:07 +00:00
Chris Lattner
a94a203f34
implement proper PPC64 prolog/epilog codegen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31684 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-11 19:05:28 +00:00
Jim Laskey
4bfd1e9b43
Running with frame pointers prevented debugging, external probes and
...
potentially some system calls/exception handling from working. TOS must always
link to previous frame. This is a short term workaround until alloca scheme is
reworked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31677 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-11 10:21:58 +00:00
Evan Cheng
5cd3e9f4b7
Add implicit use / def operands to created MI's.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31676 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-11 10:21:44 +00:00
Evan Cheng
490ce1ea6f
Add all implicit defs to FP_REG_KILL mi.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31674 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-11 07:19:36 +00:00
Chris Lattner
5b3bbc7cd7
allow the offset of a preinc'd load to be the low-part of a global. This
...
produces this clever code:
_millisecs:
lis r2, ha16(_Time.1182)
lwzu r3, lo16(_Time.1182)(r2)
lwz r2, 4(r2)
addic r4, r2, 1
addze r3, r3
blr
instead of this:
_millisecs:
lis r2, ha16(_Time.1182)
la r3, lo16(_Time.1182)(r2)
lwz r2, lo16(_Time.1182)(r2)
lwz r3, 4(r3)
addic r4, r3, 1
addze r3, r2
blr
for:
long %millisecs() {
%tmp = load long* %Time.1182 ; <long> [#uses=1]
%tmp1 = add long %tmp, 1 ; <long> [#uses=1]
ret long %tmp1
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31673 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-11 04:53:30 +00:00
Chris Lattner
d181c0120c
Mark operands as symbol lo instead of imm32 so that they print lo(x) around
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globals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31672 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-11 04:51:36 +00:00
Chris Lattner
f6edf4dcf0
ppc64 doesn't have lwau, don't attempt to form it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31656 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-11 00:08:42 +00:00
Chris Lattner
94e509caea
implement preinc support for r+i loads on ppc64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31654 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-10 23:58:45 +00:00
Evan Cheng
484c7a1295
Add a note.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31650 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-10 22:09:17 +00:00
Evan Cheng
a8d39be75b
These are done.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31649 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-10 22:03:35 +00:00
Evan Cheng
8ca29326e1
Don't dag combine floating point select to max and min intrinsics. Those
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take v4f32 / v2f64 operands and may end up causing larger spills / restores.
Added X86 specific nodes X86ISD::FMAX, X86ISD::FMIN instead.
This fixes PR996.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31645 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-10 21:43:37 +00:00
Evan Cheng
d6373bcd82
Fix a bug in SelectScalarSSELoad. Since the load is wrapped in a
...
SCALAR_TO_VECTOR, even if the hasOneUse() check pass we may end up folding
the load into two instructions. Make sure we check the SCALAR_TO_VECTOR
has only one use as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31641 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-10 21:23:04 +00:00
Chris Lattner
6a944e2592
dform 8/9 are identical to dform 1
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31637 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-10 17:51:02 +00:00
Evan Cheng
50b3b50cd0
Fix a potential bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31634 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-10 09:13:37 +00:00
Evan Cheng
438f7bc67c
Add implicit def / use operands to MachineInstr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31633 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-10 08:43:01 +00:00
Chris Lattner
4eab71497d
add an initial cut at preinc loads for ppc32. This is broken for ppc64
...
(because the 64-bit reg target versions aren't implemented yet), doesn't
support r+r addr modes, and doesn't handle stores, but it works otherwise. :)
This is disabled unless -enable-ppc-preinc is passed to llc for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31621 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-10 02:08:47 +00:00
Chris Lattner
26ddb506ec
add note about ugly codegen with preinc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31617 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-10 01:33:53 +00:00
Evan Cheng
171d09ea53
Use TargetInstrInfo::getNumOperands() instead of MachineInstr::getNumOperands(). In preparation for implicit reg def/use changes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31616 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-10 01:28:43 +00:00
Anton Korobeynikov
df78611726
Fixing PR990: http://llvm.org/PR990 .
...
This should unbreak csretcc on Linux & mingw targets. Several tests from
llvm-test should be also restored (fftbench, bigfib).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31613 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-10 00:48:11 +00:00
Chris Lattner
578d2df84b
add a note about viterbi
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31612 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-10 00:23:26 +00:00
Evan Cheng
cd63319227
PPC supports i32 / i64 pre-inc load / store.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31599 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-09 19:11:50 +00:00
Evan Cheng
0030582239
Rename ISD::MemOpAddrMode to ISD::MemIndexedMode
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31596 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-09 18:44:21 +00:00
Evan Cheng
144d8f09e1
Rename ISD::MemOpAddrMode to ISD::MemIndexedMode
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31595 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-09 17:55:04 +00:00
Rafael Espindola
f819a4999a
implement load effective address similar to the alpha backend
...
remove lea_addri and the now unused memri addressing mode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31592 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-09 13:58:55 +00:00
Evan Cheng
a1fd6504aa
Remove M_2_ADDR_FLAG.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31583 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-09 02:22:54 +00:00
Evan Cheng
81fd60722a
Added indexed store node and patfrag's.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31576 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-08 23:02:11 +00:00
Evan Cheng
aacf99964f
Use movl+xchgl instead of pushl+popl.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31572 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-08 20:35:37 +00:00
Evan Cheng
0d53826f36
Match tblegen changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31571 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-08 20:34:28 +00:00
Rafael Espindola
6e8c6493f0
initial implementation of addressing mode 2
...
TODO: fix lea_addri
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31552 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-08 17:07:32 +00:00
Reid Spencer
3822ff5c71
For PR950:
...
This patch converts the old SHR instruction into two instructions,
AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not
dependent on the sign of their operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31542 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-08 06:47:33 +00:00
Chris Lattner
fc5b1ab949
Refactor all the addressing mode selection stuff into the isel lowering
...
class, where it can be used for preinc formation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31536 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-08 02:15:41 +00:00
Chris Lattner
302bf9c973
correct the (currently unused) pattern for lwzu.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31535 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-08 02:13:12 +00:00
Evan Cheng
6e56e2c602
Fixed a bug which causes x86 be to incorrectly match
...
shuffle v, undef, <2, ?, 3, ?>
to movhlps
It should match to unpckhps instead.
Added proper matching code for
shuffle v, undef, <2, 3, 2, 3>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31519 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-07 22:14:24 +00:00
Chris Lattner
6e11295b23
add a note from viterbi
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31506 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-07 18:30:21 +00:00
Chris Lattner
0921365b88
fix encoding of BLR
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31485 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-07 01:51:50 +00:00
Chris Lattner
8c97c07040
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31477 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-06 21:26:49 +00:00
Jeff Cohen
d41b30def3
Unbreak VC++ build.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31464 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-05 19:31:28 +00:00
Reid Spencer
bcf81242df
Fix a bug in the last patch and convert to && instead of & for logical expr.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31463 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-05 19:26:37 +00:00
Reid Spencer
7c475c5d12
Implement the -enabled-cbe-printf-a feature.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31462 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-05 17:09:41 +00:00
Chris Lattner
6fc40079f3
encode BLR predicate info for the JIT
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31450 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-04 05:42:48 +00:00
Chris Lattner
af53a87052
Go through all kinds of trouble to mark 'blr' as having a predicate operand
...
that takes a register and condition code. Print these pieces of BLR the
right way, even though it is currently set to 'always'.
Next up: get the JIT encoding right, then enhance branch folding to produce
predicated blr for simple examples.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31449 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-04 05:27:39 +00:00
Chris Lattner
0638b260dc
Describe PPC predicates, which are a pair of CR# and condition.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31438 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-03 23:53:25 +00:00
Chris Lattner
60a09a5d6d
initial steps to getting the predicate on PPC::BLR right.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31437 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-03 23:52:18 +00:00
Chris Lattner
e69c436e6f
remove dead var
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31436 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-03 23:50:15 +00:00
Chris Lattner
3751844b39
remove dead/redundant vars
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31435 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-03 23:48:56 +00:00
Chris Lattner
56fe5276ef
remove redundant/dead vars
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31434 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-03 23:47:20 +00:00
Chris Lattner
7049540de5
remove dead vars
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31433 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-03 23:46:45 +00:00
Chris Lattner
d7c628de89
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31429 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-03 22:27:39 +00:00
Rafael Espindola
f05696c1b5
revert previous patch
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31411 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-03 03:08:28 +00:00
Evan Cheng
bdd371c0ed
Dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31405 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-03 02:08:41 +00:00
Rafael Espindola
115bfcb574
add createCFGSimplificationPass to ARMTargetMachine::addInstSelector
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31400 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-03 01:39:25 +00:00
Chris Lattner
6f51a77827
silence warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31395 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-03 01:19:31 +00:00