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Author SHA1 Message Date
Jim Grosbach
2317fe1584 Move mr[r]c[2] ARM tests and tidy up a bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135517 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 20:28:56 +00:00
Jim Grosbach
1a2be4db5b ARM testcases for MOVT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135516 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 20:23:25 +00:00
Akira Hatanaka
4061da1403 Use descriptive variable names. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135514 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 20:11:17 +00:00
Jim Grosbach
5f16057d1e ARM assembly parsing for MOV (register). 
Correct the handling of the 's' suffix when parsing ARM mode. It's only a
truly separate opcode in Thumb. Add test cases to make sure we handle
the s and condition suffices correctly, including diagnostics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135513 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 20:10:31 +00:00
Jim Grosbach
558b66d3cd Tidy up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135507 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 19:47:11 +00:00
Jim Grosbach
731f209794 Tighten conditional for 'mov' cc_out. 
Make sure we only clobber the cc_out operand if it is indeed a default
non-setting operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135506 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 19:45:44 +00:00
Devang Patel
23336b449e Reapply r135457. This needs llvm-gcc change, that I forgot to check-in yesterday. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135504 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 19:41:54 +00:00
Jim Grosbach
ffa3225e26 ARM assembly parsing for MOV (immediate). 
Add range checking for the immediate operand and handle the "mov" mnemonic
choosing between encodings based on the value of the immediate. Add tests
for fixups, encoding choice and values, and diagnostic for out of range values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135500 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 19:13:28 +00:00
Jim Grosbach
0ec2aa21d0 Whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135499 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 19:02:39 +00:00
Jim Grosbach
5a18700470 Remove unused code. 
cc_out and pred operands are added during parsing via custom C++ now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135497 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 18:32:48 +00:00
Akira Hatanaka
29af0918ce Fix comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135496 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 18:19:40 +00:00
Akira Hatanaka
70564a9c19 Remove redundant instructions. 
- In EmitAtomicBinaryPartword, mask incr in loopMBB only if atomic.swap is the
  instruction being expanded, instead of masking it in thisMBB. 
- Remove redundant Or in EmitAtomicCmpSwap. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135495 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 18:14:26 +00:00
Akira Hatanaka
81b441151f Separate code that modifies control flow from code that adds instruction to 
basic blocks.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135490 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 17:09:53 +00:00
Jim Grosbach
6bc1dbc376 ARM range checking for so_imm operands in assembly parsing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135489 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 16:50:30 +00:00
Bob Wilson
f51bb7cef8 Revert "Make a provision to encode inline location in a variable. This will enable dwarf writer to easily distinguish between two instances of a inlined variable in one basic block." 
This reverts commit 9fec5e346e.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135486 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 16:32:50 +00:00
Bob Wilson
66fc541abe Revert "Update docs to reflect r135457." 
This reverts commit ba034c0a2e.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135485 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 16:31:58 +00:00
Jay Foad
7fc52e2d95 Convert ConstantFoldGetElementPtr to use ArrayRef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135483 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 15:30:30 +00:00
Jay Foad
b9b54ebfed Convert SimplifyGEPInst to use ArrayRef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135482 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 15:07:52 +00:00
Jay Foad
ca12a2139e Convert gep_type_begin and gep_type_end to use ArrayRef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135481 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 14:42:50 +00:00
Jay Foad
8fbbb39807 Convert TargetData::getIndexedOffset to use ArrayRef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135478 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 14:01:37 +00:00
Jay Foad
1d2f569c34 Use ArrayRef in ConstantFoldInstOperands and ConstantFoldCall. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135477 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 13:32:40 +00:00
Richard Osborne
c8007ab582 Add intrinsics for the zext / sext instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135476 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 13:28:50 +00:00
Richard Osborne
829bef1a46 Add intrinsics for the testct, testwct instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135475 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 13:00:40 +00:00
Richard Osborne
dee3dd9129 Add intrinsics for the peek and endin instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135474 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 12:50:25 +00:00
Nick Lewycky
bb2518c716 Remove bogus test: for all possible inputs of %X, the 'sub nsw' is guaranteed 
to perform a signed wrap. Don't rely on any particular handling of that case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135471 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 08:22:57 +00:00
Evan Cheng
439661395f Introduce MCCodeGenInfo, which keeps information that can affect codegen 
(including compilation, assembly). Move relocation model Reloc::Model from
TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135468 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 06:37:02 +00:00
Akira Hatanaka
939ece1b5c Make EmitAtomic functions return the correct MachineBasicBlocks so that 
ExpandISelPseudos::runOnMachineFunction does not visit instructions that have
just been added.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135465 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 03:42:13 +00:00
Akira Hatanaka
a308c670b4 Do not insert instructions in reverse order. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135464 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 03:14:58 +00:00
Eli Friedman
9710f06d66 Make isLoadExtLegal and isTruncStoreLegal check what the name says. :) This might have some minor effect on CellSPU, but all other targets should be unaffected. Fixing per report from Damien Vincent on llvmdev. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135462 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 02:24:07 +00:00
Devang Patel
ba034c0a2e Update docs to reflect r135457. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135458 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 01:04:39 +00:00
Devang Patel
9fec5e346e Make a provision to encode inline location in a variable. This will enable dwarf writer to easily distinguish between two instances of a inlined variable in one basic block. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135457 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 01:03:32 +00:00
Devang Patel
497a397f3e Revert r135423. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135454 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 00:28:24 +00:00
Jeffrey Yasskin
343c3a5005 Document how to maintain a git-svn clone of the LLVM git repositories. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135453 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 00:20:54 +00:00
Bill Wendling
6c2f7e2398 Micro-opt: Only emit compact unwind if there is a compact unwind encoding to emit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135452 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 00:09:25 +00:00
Bill Wendling
e52e3f2c02 Use the CompactUnwindEncoding from the Frame, if it's defined. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135451 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 00:06:12 +00:00
Bill Wendling
e060a5cd06 Add a frame with the compact unwind encoding if it exists. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135450 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 00:02:51 +00:00
Bill Wendling
d967578a8c Add a method to set compact unwind encoding information in a frame. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135449 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 00:01:42 +00:00
Bill Wendling
7d36534d22 Rename CompactEncoding to CompactUnwindEncoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135448 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 00:00:58 +00:00
Sean Callanan
c872143d6a Fixed a bug where the MC subtarget information 
wasn't being initialized by the enhanced disassembler,
leading to assertion failures. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135447 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 00:00:41 +00:00
Bill Wendling
88b976060a Add a field for the compact unwind encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135446 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 00:00:05 +00:00
Bill Wendling
a67dcea072 Move the compact encoding from the target-specific library to the code-gen 
library.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135443 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 23:38:40 +00:00
Owen Anderson
565a036697 Revamp our handling of tLDMIA[_UPD] and tSTMIA[_UPD] to avoid having multiple instructions with the same encoding. This resolves another conflict when bringing up the new-style disassembler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135442 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 23:25:34 +00:00
Evan Cheng
c8c3acfea4 Eliminate TargetAsmInfo::getCompactUnwindEncoding. This get rid of the 
use of TargetFrameLowering in TargetAsmInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135439 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 22:32:12 +00:00
Evan Cheng
2d28617de2 Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions for 
better location welcome).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135438 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 22:29:13 +00:00
Owen Anderson
91614aec48 Mark the Darwin assembler workout as isCodeGenOnly, so that it doesn't cause decoding conflicts in the new-style disassembler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135434 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 22:14:02 +00:00
Jeffrey Yasskin
3ba292dbc2 Add APInt(numBits, ArrayRef<uint64_t> bigVal) constructor to prevent future ambiguity 
errors like the one corrected by r135261.  Migrate all LLVM callers of the old
constructor to the new one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135431 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 21:45:40 +00:00
Eli Friedman
3a594f4876 FileCheck-ize a couple tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135427 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 21:23:42 +00:00
Andrew Trick
41e0d4e788 Compiler warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135426 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 21:15:03 +00:00
Evan Cheng
0e6a052331 Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down 
to MCRegisterInfo. Also initialize the mapping at construction time.

This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step
towards fixing the layering violation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135424 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 20:57:22 +00:00
Devang Patel
1360bc8eb0 During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases. 
[take 2]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135423 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 20:55:23 +00:00