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23d3243e62
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5230 Commits

Author SHA1 Message Date
Eli Friedman
23d3243e62 Avoid extra vreg copies for arguments passed in registers. Specifically, this can make MachineCSE more effective in some cases (especially in small functions). PR8361 / part of rdar://problem/8259436 . 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130928 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-05 16:53:34 +00:00
Jakob Stoklund Olesen
49b2803ec2 Prepare remaining tests for -join-physreg going away. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130893 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 23:54:59 +00:00
Jakob Stoklund Olesen
61396aebee Fix a batch of x86 tests to be coalescer independent. 
Most of these tests require a single mov instruction that can come either before
or after a 2-addr instruction. -join-physregs changes the behavior, but the
results are equivalent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130891 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 23:54:51 +00:00
Dan Gohman
becfb889aa Give this test an explicit register allocator, so that it can work even if 
the default register allocator is changed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130883 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 23:14:02 +00:00
Bill Wendling
d29052bf26 SjLj EH could produce a machine basic block that legitimately has more than one 
landing pad as its successor.

SjLj exception handling jumps to the correct landing pad via a switch statement
that's generated right before code-gen. Loosen the constraint in the machine
instruction verifier to allow for this. Note, this isn't the most rigorous check
since we cannot determine where that switch statement came from. But it's
marginally better than turning this check off when SjLj exceptions are used.
<rdar://problem/9187612>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130881 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 22:54:05 +00:00
Eli Friedman
baf717a08a Re-commit r130862 with a minor change to avoid an iterator running off the edge in some cases. 
Original message:

Teach MachineCSE how to do simple cross-block CSE involving physregs.  This allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 .



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130877 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 22:10:36 +00:00
Galina Kistanova
ff4f6eaf4e This test fails on ARM. The test shouldn't explicitly specify alignment (and alignment 4 is wrong) and requires hard-float. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130875 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 21:57:44 +00:00
Eli Friedman
24d4c9911e Back out r130862; it appears to be breaking bootstrap. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130867 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 20:48:42 +00:00
Eli Friedman
49cec1d818 Teach MachineCSE how to do simple cross-block CSE involving physregs. This allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 . 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130862 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 19:54:24 +00:00
Jakob Stoklund Olesen
96169b189c Fix more register and coalescing dependencies. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130859 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 19:02:11 +00:00
Jakob Stoklund Olesen
28e104bcb0 Explicitly request physreg coalesing for a bunch of Thumb2 unit tests. 
These tests all follow the same pattern:

	mov	r2, r0
	movs	r0, #0
	$CMP	r2, r1
	it	eq
	moveq	r0, #1
	bx	lr

The first 'mov' can be eliminated by rematerializing 'movs r0, #0' below the
test instruction:

	$CMP	r0, r1
	mov.w	r0, #0
	it	eq
	moveq	r0, #1
	bx	lr

So far, only physreg coalescing can do that. The register allocators won't yet
split live ranges just to eliminate copies. They can learn, but this particular
problem is not likely to show up in real code. It only appears because r0 is
used for both the function argument and return value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130858 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 19:02:07 +00:00
Jakob Stoklund Olesen
14c76fed2d FileCheckize and break dependence on coalescing order. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130856 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 19:02:01 +00:00
Jakob Stoklund Olesen
f695b3ad62 Explicitly request -join-physregs for some tests that depend on it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130855 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 19:01:59 +00:00
Devang Patel
64915dec28 Do not emit location expression size twice. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130854 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 19:00:57 +00:00
Akira Hatanaka
921c58b001 Remove LLVM IR metadata in test case committed in r130847. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130849 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 18:28:36 +00:00
Akira Hatanaka
6b7588e6c4 Prevent instructions using $gp from being placed between a jalr and the instruction that restores the clobbered $gp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130847 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 17:54:27 +00:00
Jakob Stoklund Olesen
20bc5acfb6 Don't depend on the physreg coalescing order. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130818 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 01:01:47 +00:00
Jakob Stoklund Olesen
c74399f8b4 Don't run this test through -regalloc=basic. 
The basic allocator is really bad about hinting, so it doesn't eliminate all
copies when physreg joining is disabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130817 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 01:01:44 +00:00
Jakob Stoklund Olesen
22d28d2372 Fix register-dependent XCore tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130816 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 01:01:41 +00:00
Jakob Stoklund Olesen
9dfb367a42 Fix register-dependent test in MSP430. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130815 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 01:01:39 +00:00
Jakob Stoklund Olesen
feaf34758a Fix a bunch of ARM tests to be register allocation independent. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130800 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-03 22:31:21 +00:00
Bill Wendling
9493a285d1 Replace the "movnt" intrinsics with a native store + nontemporal metadata bit. 
<rdar://problem/8460511>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130791 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-03 21:11:17 +00:00
Evan Cheng
f35907f66b Make the test less likely to fail with minor changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130778 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-03 19:09:32 +00:00
Bob Wilson
22a751ac13 Remove test for iOS divmod function, since that is disabled for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130769 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-03 17:54:49 +00:00
Bruno Cardoso Lopes
54ad87ab78 Add a few ARM coprocessor intrinsics. Testcases included 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130763 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-03 17:29:22 +00:00
Dan Gohman
cca82149ad Add an unfolded offset field to LSR's Formula record. This is used to 
model constants which can be added to base registers via add-immediate
instructions which don't require an additional register to materialize
the immediate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130743 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-03 00:46:49 +00:00
Rafael Espindola
2866edf120 Add 130690 back. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130693 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-02 15:58:16 +00:00
Rafael Espindola
b2d7336fde Revert while I debug the tests that use march but not mtriple. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130691 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-02 15:42:31 +00:00
Rafael Espindola
433771c514 Move ppc OS X to cfi too. I am building it on an old ppc mini, but it will take some time. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130690 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-02 15:00:52 +00:00
Rafael Espindola
450a5a1207 Add r130623 back now that ELF has been fixed to work with -fno-dwarf2-cfi-asm. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130658 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-01 15:44:13 +00:00
Rafael Espindola
5426a9ee37 GCC uses a different encoding of pointers in the FDE when using 
-fno-dwarf2-cfi-asm. Implement the same behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130637 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-01 04:49:54 +00:00
Rafael Espindola
2b3e12d0cb Revert the previous patch while I figure out how to make llvm-gcc 
less agressive about disabling cfi on linux :-(

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130626 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-30 23:03:44 +00:00
Rafael Espindola
89fc9e8f5e Enable CFI on OS X. 
Currently the output should be almost identical to the one produced by CodeGen
to make the transition easier.

The only two differences I know of are:

* Some files get an extra advance loc of size 0. This will be fixed when
relaxations are enabled.
* The optimization of declaring an EH symbol as an external variable is not
implemented. This is a subset of adding the nounwind attribute, so we if really
this at -O0 we should probably do it at the IL level.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130623 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-30 22:29:54 +00:00
Jakob Stoklund Olesen
8e1e4cf226 Allow folded spills in test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130599 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-30 08:00:50 +00:00
Jakob Stoklund Olesen
d5b679c8ce Weekly fix of register allocation dependent unit tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130567 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-30 01:37:52 +00:00
Eli Friedman
b2b03fc2fa Make FastEmit_ri_ try a bit harder to succeed for supported operations; FastEmit_i can fail for non-Thumb2 ARM. Makes ARMSimplifyAddress work correctly, and reduces the number of fast-isel bailouts on non-Thumb ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130560 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 23:34:52 +00:00
Eli Friedman
c573e2c7ea Switch to ImmLeaf (which can be used by FastISel) for a few more common ARM/Thumb2 patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130552 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 22:48:03 +00:00
Eli Friedman
51864a1d2b Fix run-line, again. :( 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130540 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 21:33:03 +00:00
Eli Friedman
9ebf57ae13 Re-committing r130454, which does not in fact break anything. 
Fix a rather obscure crash caused by ARM fast-isel generating code which redefines a register.
rdar://problem/9338332 .



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130539 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 21:22:56 +00:00
Eric Christopher
bcf26aee86 Add trunc->branch support, this won't help with clang's i8->i1 truncations 
for bools, but is a start.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130534 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 20:02:39 +00:00
Rafael Espindola
7b11a4cbdc Change DwarfCFIException's member variables to track what it actually 
emmits: .cfi_personality, .cfi_lsda and the moves.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130503 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 14:48:51 +00:00
Andrew Trick
d49ffe8284 Teach Thumb2 isel to fold and->rotr ==> ROR. 
Generalization of Nate Begeman's patch!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130502 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 14:18:15 +00:00
Andrew Trick
e02a1501e7 Combine thumb2-ror tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130498 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 14:02:41 +00:00
Eli Friedman
6e6014cfb3 Revert r130454; apparently this doesn't actually work. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130462 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-28 23:55:14 +00:00
Eli Friedman
73359c1327 Fix runline. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130455 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-28 23:12:24 +00:00
Eli Friedman
2f7fcd7198 Fix a rather obscure crash caused by ARM fast-isel generating code which redefines a register. 
rdar://problem/9338332 .



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130454 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-28 23:03:25 +00:00
Eli Friedman
d227eedf82 fast-isel sret calls, try 2. We actually do need to do something on x86-32. rdar://problem/9303592 . 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130429 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-28 20:19:12 +00:00
Eli Friedman
3fb6e00238 Actually revert r130348 correctly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130418 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-28 18:20:24 +00:00
Eli Friedman
6cf31b0a1a Revert r130348; causing buildbot issues on x86-32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130412 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-28 18:06:10 +00:00
Devang Patel
c26f5447e3 Teach dwarf writer to handle complex address expression for .debug_loc entries. 
This fixes clang generated blocks' variables' debug info.
Radar 9279956.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130373 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-28 02:22:40 +00:00