Commit Graph

1186 Commits

Author SHA1 Message Date
Misha Brukman
25f36306ff Fixed to use the correct format of the instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6390 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-29 04:53:56 +00:00
Misha Brukman
983d1d3835 This should work better with re-generating the SparcV9CodeEmitter.inc file.
Also, added a rule to delete the generated .inc file on `make clean'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6389 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-29 03:32:49 +00:00
Misha Brukman
dafa504341 * Broke up SparcV9.td into separate files as it was getting unmanageable
* Added some Format 4 classes, but not instructions
* Added notes on missing sections with FIXMEs
* Added RDCCR instr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6388 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-29 03:31:43 +00:00
Misha Brukman
8996f44f7a Fixed ordering of elements in instructions: although the binary instructions
list (rd, rs1, imm), in that order (bit-wise), the actual assembly syntax is
instr rd, imm, rs1, and that is how they are constructed in the instruction
selector. This fixes the discrepancy.

Also fixed some comments along the same lines and fixed page numbers referring
to where instructions are described in the Sparc manual.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6384 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-28 17:49:29 +00:00
Brian Gaeke
e57a529fca Add dependency to make TableGen rule fire.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6383 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-28 17:41:09 +00:00
Misha Brukman
f2ef76782d Fixed an error preventing compilation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6381 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:48:28 +00:00
Misha Brukman
3c4cf15f76 Added the 'r' and 'i' annotations to instructions as their opcode names have
changed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6380 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:44:44 +00:00
Misha Brukman
0d60345dcf Keep track of the current BasicBlock being processed so that a referencing
MachineInstr can later be patched up correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6378 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:41:44 +00:00
Misha Brukman
af6f38e424 Added 'r' and 'i' annotations to instructions as SparcInstr.def has changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6377 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:40:34 +00:00
Misha Brukman
b5b9adc5a0 Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed.
Non-obvious change: since I have changed ST and STD to be STF and STDF to
(a) closer resemble their name (NOT assembly text) in the Sparc manual, and
(b) clearly specify that they they are floating-point opcodes,
I made the same changes in this file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6376 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:39:01 +00:00
Misha Brukman
91aee47a1b Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed.
Here I had to make one non-trivial change: add a function to get a version of
the opcode that takes an immediate, given an opcode that takes all registers.

This is required because sometimes it is not known at construction time which
opcode is used because opcodes are passed around between functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6375 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:37:00 +00:00
Misha Brukman
71ed1c997b Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6373 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:35:43 +00:00
Misha Brukman
24b22a18ec Added entries for each of the instructions with annotations ('r' or 'i').
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6372 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:33:39 +00:00
Misha Brukman
6ddd9d87a7 One of the first major changes to make the work of JITting easier: adding
annotations on instructions to specify which format they are (i.e., do they take
2 registers and 1 immediate or just 3 registers) as that changes their binary
representation and hence, code emission.

This makes instructions more like how X86 defines them to be. Now, writers of
instruction selection must choose the correct opcode based on what instruction
type they are building, which they already know. Thus, the JIT doesn't have to
do the same work by `discovering' which operands an instruction really has.

As this involves lots of small changes to a lot of files in lib/target/Sparc,
I'll commit them individually because otherwise the diffs will be unreadable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6371 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:32:38 +00:00
Misha Brukman
86172ab3d6 * Allow passing in an unsigned configuration to allocateSparcTargetMachine()
a default value is set in the header file.
* Fixed some code layout to make it more consistent with the rest of codebase
* Added addPassesToJITCompile() with relevant passes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6369 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:24:48 +00:00
Misha Brukman
51aa21c702 Moved generation of the SparcV9CodeEmitter.inc file higher in the Makefile so
that Makefile.common would see it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6367 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:04:38 +00:00
Misha Brukman
79caf1fe26 Add prototypes to add passes to JIT compilation and code emission.
Also, added annotations to how instructions are modified (reg/imm operands).
Added prototype for adding register numbers to values pass for interfacing with
the target-independent register allocators in the JIT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6366 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:01:10 +00:00
Misha Brukman
0cc640e6c8 Broke out class definition from SparcV9CodeEmitter, and added ability to take a
MachineCodeEmitter to make a pass-through debugger -- output to memory and to
std::cerr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6363 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 21:45:05 +00:00
Misha Brukman
3de36f5309 SparcV9CodeEmitter.cpp is a part of the Sparc code emitter. The main function
that assembles instructions is generated via TableGen (and hence must be built
before building this directory, but that's already the case in the top-level
Makefile).

Also added is .cvsignore to ignore the generated file `SparcV9CodeEmitter.inc',
which is included by SparcV9CodeEmitter.cpp .


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6357 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 20:07:58 +00:00
Misha Brukman
998800cb87 Added definitions for a bunch of floating-point instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6356 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 20:03:29 +00:00
Vikram S. Adve
a22eace55b Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()
and related functions and flags.  Fixed several bugs where only
"isDef" was being checked, not "isDefAndUse".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6342 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 00:06:48 +00:00
Vikram S. Adve
5f2180c533 (1) Added special register class containing (for now) %fsr.
Fixed spilling of %fcc[0-3] which are part of %fsr.

(2) Moved some machine-independent reg-class code to class TargetRegInfo
    from SparcReg{Class,}Info.

(3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()
    and related functions and flags.  Fixed several bugs where only
    "isDef" was being checked, not "isDefAndUse".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6341 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 00:05:23 +00:00
Vikram S. Adve
49cab03c81 Renamed opIsDef to opIsDefOnly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6340 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 00:03:17 +00:00
Vikram S. Adve
78a4f23a8e Added special register class containing (for now) %fsr.
Fixed spilling of %fcc[0-3] which are part of %fsr.
Moved some machine-independent reg-class code to class TargetRegInfo
from SparcReg{Class,}Info.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6339 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 00:02:22 +00:00
Vikram S. Adve
645fea33be Bug fix: right shift for int divide-by-power-of-2 was incorrect for
negative values.  Need to add one to a negative value before right shift!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6334 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-25 21:59:47 +00:00
Vikram S. Adve
9e49824d70 Bug fix: padding bytes within a structure should go after each field!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6333 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-25 21:59:09 +00:00
Vikram S. Adve
c2f0939320 Bug fix: sign-extension was not happening for C = -MININT since C == -C!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6332 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-25 21:58:11 +00:00
Vikram S. Adve
5b1b47b824 Add support for compiling varargs functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6325 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-25 15:59:47 +00:00
Misha Brukman
12745c55e1 Reword to remove reference to how things worked in the past.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6323 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-24 01:08:43 +00:00
Misha Brukman
e9d883828a Implement the TargetInstrInfo's createNOPinstr() and isNOPinstr() interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6320 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-24 00:09:50 +00:00
Misha Brukman
f96eb64666 Cleaned up code layout; no functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6312 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-23 19:20:57 +00:00
Misha Brukman
6b77ec4156 Cleaned up code layout. No functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6304 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-22 21:49:18 +00:00
Misha Brukman
c2312df45c Kill `using' directives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6301 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-22 21:24:35 +00:00
Misha Brukman
c97a2075d9 Fixed `volatile' typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6266 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-21 19:34:28 +00:00
Misha Brukman
81b0686f09 Cleaned up code layout, spacing, etc. for readability purposes and to be more
consistent with the style of LLVM's code base (and itself! it's inconsistent in
some places.)

No functional changes were made.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6265 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-21 18:48:06 +00:00
Chris Lattner
4e840d4db7 * Fix divide by zero error with empty structs
* Empty structs should have ALIGNMENT 1, not SIZE 1.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6263 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-21 18:08:44 +00:00
Misha Brukman
77c9fcb797 Cleaned up code layout, spacing, etc. for readability purposes and to be more
consistent with the style of LLVM's code base (and itself! it's inconsistent in
some places.)

No functional changes were made.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6262 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-21 18:05:35 +00:00
Misha Brukman
ee563cb978 Namespacified vector' and cerr' to always use the `std::' namespace.
Eliminated `using' directives.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6261 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-21 17:59:06 +00:00
Misha Brukman
1a1046b7bc The word operands' has an r' in it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6250 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-20 20:36:39 +00:00
Misha Brukman
a98cd4578f Sparc instruction opcodes now all live under the `V9' namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6249 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-20 20:32:24 +00:00
Chris Lattner
c436b37262 Add support for setjmp/longjmp primitives
Patch checked in for Bill Wendling :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6241 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-17 22:26:33 +00:00
Chris Lattner
84c0d5e157 Casts are now unnecessary
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6199 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-14 17:50:19 +00:00
Chris Lattner
67580ed715 Clean up #includes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6173 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-13 20:21:19 +00:00
Chris Lattner
ddfc03c8cb Fix bug: CBackend/2003-05-13-VarArgFunction.ll
In C, a prototype with no arguments is varargs.  A prototype that takes void
has zero args.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6172 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-13 20:15:37 +00:00
Chris Lattner
9d6d118837 Make abort more explicit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6151 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-12 21:16:26 +00:00
Chris Lattner
b70c1381b4 Remove the assertion failure of course... doh
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6150 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-12 20:39:39 +00:00
Chris Lattner
4d5a50a7a6 Implement casts from unsigned integers to floating point
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6148 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-12 20:36:13 +00:00
Chris Lattner
c53544af06 Make error messages more useful than jsut an abort
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6146 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-12 20:16:58 +00:00
Chris Lattner
ee92637cfa Remove wierd printout
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6145 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-12 20:10:12 +00:00
Chris Lattner
45343ea5ac Fix bug: CWriter/2003-05-12-IntegerSizeWarning.c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6128 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-12 15:39:31 +00:00