Jim Grosbach
2642196a65
Update ARM Insn encoding to get endian-ness to match the documentation (31-0 left to right)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57524 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-14 20:36:24 +00:00
Dan Gohman
b8cab9227a
Fix command-line option printing to print two spaces where needed,
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instead of requiring all "short description" strings to begin with
two spaces. This makes these strings less mysterious, and it fixes
some cases where short description strings mistakenly did not
begin with two spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57521 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-14 20:25:08 +00:00
Evan Cheng
552e3be775
Fix indentation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57508 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-14 17:15:39 +00:00
Dan Gohman
7b8e96401c
When doing the very-late shift-and address-mode optimization,
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create a new DAG node to represent the new shift to keep the
DAG consistent, even though it'll almost always be folded into
the address.
If a user of the resulting address has multiple uses, the
nodes may get revisited by a later MatchAddress call, in which
case DAG inconsistencies do matter.
This fixes PR2849.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57465 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-13 20:52:04 +00:00
Anton Korobeynikov
d21a6305ea
Update size of inst correctly with segment override.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57414 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-12 10:30:11 +00:00
Chris Lattner
e563bbc312
Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's as
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parameters instead of raw Constants. This prevents the constants from
being selected by the isel pass, fixing PR2735.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57385 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-11 22:08:30 +00:00
Duncan Sands
a4bb48adc3
Fix comment typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57381 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-11 19:34:24 +00:00
Anton Korobeynikov
ef93cecd80
Add ability to override segment (mostly for code emitter purposes).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57380 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-11 19:09:15 +00:00
Dale Johannesen
e397acce9d
Fix SSE4.1 roundss, roundsd. While the instructions have
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the same pattern as roundpd/roundps, the Intel compiler
builtins do not: rounds* has an extra operand. Fixes
gcc.target/i386/sse4_1-rounds[sd]-[1234].c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57370 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10 23:51:03 +00:00
Anton Korobeynikov
875314bb52
Fix a thinko and unbreak sparc default CC
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57368 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10 21:47:37 +00:00
Anton Korobeynikov
df75bbae94
Extend set of return registers on sparc until someone will implement MRV support there. At least, this will allow libgcc compile, however we are not ABI-compatible with stuff compiled with native gcc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57364 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10 20:30:14 +00:00
Anton Korobeynikov
4cf5e2eb6c
Ignore extra 'r' modifier for now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57363 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10 20:29:50 +00:00
Anton Korobeynikov
4b58b6a5b4
Use expand for smul_lohi for now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57362 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10 20:29:31 +00:00
Anton Korobeynikov
0eefda1335
Add rudimentary support for 'r' register operand
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57359 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10 20:28:10 +00:00
Anton Korobeynikov
53835708e1
Cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57358 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10 20:27:31 +00:00
Anton Korobeynikov
f369330c2d
Add rudimentary asmprinter support for printing inline asm operands for sparc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57346 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10 10:15:03 +00:00
Anton Korobeynikov
2fcfd83cb4
Add dummy 'm' inline asm constraint handler for Sparc. I'm not sure, whether it is correct, however :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57345 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10 10:14:47 +00:00
Anton Korobeynikov
a43e51d0fe
Cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57344 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10 10:14:15 +00:00
Dale Johannesen
23a98551ab
Add a "loses information" return value to APFloat::convert
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and APFloat::convertToInteger. Restore return value to
IEEE754. Adjust all users accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57329 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-09 23:00:39 +00:00
Dale Johannesen
7111b02c73
Rename APFloat::convertToAPInt to bitcastToAPInt to
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make it clearer what the function does. No functional
change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57325 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-09 18:53:47 +00:00
Chris Lattner
d2a27ee974
get CodeGen/Alpha/mul128.ll to work.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57318 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-09 04:50:56 +00:00
Dale Johannesen
585457e37e
(re)Put const weak strings in appropriate section on Darwin.
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g++dg/abi/key2.C
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57309 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-08 21:49:47 +00:00
Jim Grosbach
309c80adb5
Comment to be explicit that the enumeration values for CondCodes matter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57295 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-08 16:24:35 +00:00
Duncan Sands
43d9c8cd56
Use template to distinguish between function variants.
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GCC 4.4.0 gives an error on the "int" declaration for example
saying that it has already been declared (using the "short"
one). Using templates here allow the compiler to distinguish
between the function to choose.
Also, "llvm/Support/DataTypes.h" was not included, leading to
error messages about not knowing "uint32_t" for example.
Patch by Samuel Tardieu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57292 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-08 07:44:52 +00:00
Duncan Sands
4520dd2b7b
Add <cstdio> include where needed by gcc-4.4.
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Patch by Samuel Tardieu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57291 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-08 07:23:46 +00:00
Dan Gohman
8c3f8b6dea
Add MBB successors and physreg Uses in the same order that
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SDISel typically adds them in. This makes it a little easier
to compare FastISel output with SDISel output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57266 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07 22:10:33 +00:00
Dan Gohman
145b828014
Instead of emitting an implicit use for the super-register of
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X86::CL that was used, emit an EXTRACT_SUBREG from the CL
super-register to CL. This more precisely describes how the
CL register is being used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57264 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07 21:50:36 +00:00
Jim Grosbach
76e9661b6c
Unconditional branch instruction encoding fix. Needs to use ABI, not AXI, to get the proper opcode bits.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57262 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07 21:08:09 +00:00
Jim Grosbach
cbc47b8934
need ARM.h for ARMCC definition
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57261 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07 21:01:51 +00:00
Owen Anderson
95dad830bb
Add an option to enable StrongPHIElimination, for ease of testing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57259 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07 20:22:28 +00:00
Jim Grosbach
3341262de2
Encode the conditional execution predicate when JITing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57258 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07 19:05:35 +00:00
Dale Johannesen
2cb48eaeb8
Model hardwired inputs & outputs of x86 8-bit divides correctly.
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Fixes local RA miscompilation of gcc.c-torture/execute/20020904-1.c -O0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57257 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07 18:54:28 +00:00
Jim Grosbach
9e729a2de5
Clarify naming and correct conditional so that CMP and CMN instructions get the Rn operand encoded properly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57252 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07 17:42:09 +00:00
Jim Grosbach
17a415a4f2
Fix Opcode values of CMP and CMN
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57251 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07 17:40:46 +00:00
Anders Carlsson
ae436cecca
Certain patterns involving the "movss" instruction were marked as requiring SSE2, when in reality movss is an SSE1 instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57246 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07 16:14:11 +00:00
Andrew Lenharth
1b19ef0295
Note that ADDC and company don't actually expand yet (missing in legalize
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57226 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07 02:10:26 +00:00
Evan Cheng
882cdfde51
Fix PR2850 and PR2863. Only generate movddup for 128-bit SSE vector shuffles.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57210 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-06 21:13:08 +00:00
Devang Patel
e76225a4c1
It is possible that all functions in one module are not being
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optimized for size. Set OptForSize for each function separately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57182 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-06 18:03:39 +00:00
Devang Patel
e4d4b8c533
Remove unncessary isDeclaration() checks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57179 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-06 17:30:07 +00:00
Anton Korobeynikov
ff4ca2e088
Emit type-correct constant null. Also fix a typo.
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Patch by Robert G. Jakabosky!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57110 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-05 15:07:06 +00:00
Anton Korobeynikov
6381a1334a
Fix weird think-o and unbreak build on all gcc-3.4.x-based platforms (e.g. mingw)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57106 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-05 08:53:29 +00:00
Chris Lattner
b1ac769873
this case is matched now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57096 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-05 02:16:12 +00:00
Anton Korobeynikov
c4e8bec703
Revert r56675 - it breaks unwinding runtime everywhere.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57048 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-04 11:09:36 +00:00
Dale Johannesen
880ae364ba
Make atomic Swap work, 64-bit on x86-32.
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Make it all work in non-pic mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57034 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-03 22:25:52 +00:00
Dale Johannesen
1b54c7fe9b
Pass MemOperand through for 64-bit atomics on 32-bit,
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incidentally making the case where the memop is a
pointer deref work. Fix cmp-and-swap regression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57027 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-03 19:41:08 +00:00
Dan Gohman
da8ac5fd91
Avoid creating two TargetLowering objects for each target.
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Instead, just create one, and make sure everything that needs
it can access it. Previously most of the SelectionDAGISel
subclasses all had their own TargetLowering object, which was
redundant with the TargetLowering object in the TargetMachine
subclasses, except on Sparc, where SparcTargetMachine
didn't have a TargetLowering object. Change Sparc to work
more like the other targets here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57016 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-03 16:55:19 +00:00
Dan Gohman
38217fef57
Remove an unused field.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57014 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-03 16:17:33 +00:00
Jim Grosbach
48b828fdb4
Indexing off by one resulted in errant encoding of source register for
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reg->reg moves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57011 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-03 15:53:56 +00:00
Jim Grosbach
016d34cc4c
NeedStub/DoesntNeedStub logic was reversed, leading to not using a stub
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for global relocations that do need them (libc calls, for example).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57010 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-03 15:52:42 +00:00
Dan Gohman
d735b8019b
Switch the MachineOperand accessors back to the short names like
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isReg, etc., from isRegister, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57006 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-03 15:45:36 +00:00