Craig Topper
0d86d462f8
Add code for lowering v32i8 shifts by a splat to AVX2 immediate shift instructions. Remove 256-bit splat handling from LowerShift as it was already handled by PerformShiftCombine.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145005 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-20 00:12:05 +00:00
Craig Topper
745a86bac9
Use 256-bit vcmpeqd for creating an all ones vector when AVX2 is enabled.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145004 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-19 22:34:59 +00:00
Craig Topper
ba798c5e51
Remove some of the special classes that worked around an old tablegen limitation of not being able to remove redundant bitconverts from patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145003 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-19 21:01:54 +00:00
Craig Topper
98fc72940b
Custom lower AVX2 variable shift intrinsics to shl/srl/sra nodes and remove the intrinsic patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144999 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-19 17:46:46 +00:00
Craig Topper
54f952afac
Synthesize SSSE3/AVX 128-bit horizontal integer add/sub instructions from add/sub of appropriate shuffle vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144989 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-19 09:02:40 +00:00
Craig Topper
3113384a34
Collapse X86 PSIGNB/PSIGNW/PSIGND node types.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144988 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-19 07:33:10 +00:00
Craig Topper
1666cb6d63
Extend VPBLENDVB and VPSIGN lowering to work for AVX2.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144987 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-19 07:07:26 +00:00
Craig Topper
60d9a9206e
Remove unused parameters from the AVX maskmov classes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144985 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-19 04:49:22 +00:00
Nadav Rotem
cbbe33fde4
Add AVX2 vpbroadcast support
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144967 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-18 02:49:55 +00:00
Craig Topper
d90a191685
Fix SSE/AVX integer comparison patterns to understand that all integer vector loads are promoted to i64 vector loads so patterns need a bitconvert. Also slightly simplify the AVX2 variable shift patterns by using the predefined bitconvert pattern fragments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144896 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17 07:49:38 +00:00
Craig Topper
ec43d1f553
Remove seemingly unnecessary duplicate VROUND definitions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144885 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17 07:04:00 +00:00
Eli Friedman
d224c7879a
Turn on vzeroupper insertion on call boundaries for AVX; it works as far as I know, and I'd like to see wider testing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144867 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17 00:21:52 +00:00
Evan Cheng
2b89498979
Another missing X86ISD::MOVLPD pattern. rdar://10450317
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144839 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16 22:24:44 +00:00
Pete Cooper
cd75e44173
Added missing comment about new custom lowering of DEC64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144811 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16 19:03:23 +00:00
Evan Cheng
b95fc31aa2
Sink codegen optimization level into MCCodeGenInfo along side relocation model
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and code model. This eliminates the need to pass OptLevel flag all over the
place and makes it possible for any codegen pass to use this information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144788 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16 08:38:26 +00:00
Craig Topper
12755b07ab
Fix the execution domain on a bunch of SSE/AVX instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144784 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16 07:30:46 +00:00
Craig Topper
2713d045e3
Remove code to enable execution dependency fix pass on VR256. VR128 is sufficient after r144636.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144777 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16 05:02:04 +00:00
Nadav Rotem
f8c10e5cb1
AVX: Add support for vbroadcast from BUILD_VECTOR and refactor some of the vbroadcast code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144720 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 22:50:37 +00:00
Pete Cooper
2d49689793
Added custom lowering for load->dec->store sequence in x86 when the EFLAGS registers is used
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by later instructions.
Only done for DEC64m right now.
Fixes <rdar://problem/6172640>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144705 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 21:57:53 +00:00
Jay Foad
d9190c0f14
Remove some unnecessary includes of PseudoSourceValue.h.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144631 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 07:24:32 +00:00
Craig Topper
44ec9fddc2
Fix PR11370 for real. Prevents converting 256-bit FP instruction to AVX2 256-bit integer instructions when AVX2 isn't enabled.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144629 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 06:39:01 +00:00
Craig Topper
4c077a1f04
Properly qualify AVX2 specific parts of execution dependency table. Also enable converting between 256-bit PS/PD operations when AVX1 is enabled. Fixes PR11370.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144622 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 05:55:35 +00:00
Jakob Stoklund Olesen
c2ecf3efbf
Break false dependencies before partial register updates.
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Two new TargetInstrInfo hooks lets the target tell ExecutionDepsFix
about instructions with partial register updates causing false unwanted
dependencies.
The ExecutionDepsFix pass will break the false dependencies if the
updated register was written in the previoius N instructions.
The small loop added to sse-domains.ll runs twice as fast with
dependency-breaking instructions inserted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144602 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 01:15:30 +00:00
Evan Cheng
76c8f08567
Add a missing pattern for X86ISD::MOVLPD. rdar://10436044
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144566 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-14 20:35:52 +00:00
Pete Cooper
a77214a4c4
Changed SSE4/AVX <2 x i64> extract and insert ops to be Custom lowered
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Constant idx case is still done in tablegen but other cases are then expanded
Fixes <rdar://problem/10435460>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144557 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-14 19:38:42 +00:00
Craig Topper
dcce244dd8
Add AVX2 version of instructions to load folding tables. Also add a bunch of missing SSE/AVX instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144525 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-14 08:07:55 +00:00
Craig Topper
3426a3efef
Add neverHasSideEffects, mayLoad, and mayStore to many patternless SSE/AVX instructions. Remove MMX check from LowerVECTOR_SHUFFLE since MMX vector types won't go through it anyway.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144522 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-14 06:46:21 +00:00
Craig Topper
e6a6277d36
Add BLSI, BLSMSK, and BLSR to getTargetNodeName.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144502 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-13 17:31:07 +00:00
Craig Topper
7be5dfd1a1
Add more AVX2 shift lowering support. Move AVX2 variable shift to use patterns instead of custom lowering code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144457 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-12 09:58:49 +00:00
Daniel Dunbar
b8ebca83f4
build: Attempt to rectify inconsistencies between CMake and LLVMBuild versions of explicit dependencies.
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- The hope is that we have a tool/test to verify these are accurate (and tight) soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144444 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-12 02:10:57 +00:00
Craig Topper
46154eb6fd
Add lowering for AVX2 shift instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144380 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 07:39:23 +00:00
Bill Wendling
c739577d3c
If we have to reset the calculation of the compact encoding, then also reset the
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"saved register" index.
<rdar://problem/10430076>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144350 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 00:59:14 +00:00
Daniel Dunbar
5ed5506f18
LLVMBuild: Add explicit information on whether targets define an assembly printer, assembly parser, or disassembler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144344 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 00:23:56 +00:00
Nadav Rotem
4dbe96e22f
AVX2: Add variable shift from memory.
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Note: These patterns only works in some cases because
many times the load sd node is bitcasted from a load
node of a different type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144266 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 06:54:20 +00:00
Daniel Dunbar
affc6cf9d2
llvm-build: Add --native-target and --enable-targets options, and add logic to
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handle defining the "magic" target related components (like native,
nativecodegen, and engine).
- We still require these components to be in the project (currently in
lib/Target) so that we have a place to document them and hopefully make it
more obvious that they are "magic".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144253 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 00:50:07 +00:00
Daniel Dunbar
c352caf168
llvm-build: Add an explicit component type to represent targets.
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- Gives us a place to hang target specific metadata (like whether the target has a JIT).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144250 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 00:49:51 +00:00
Nadav Rotem
c6c7e85a71
AVX2: Add patterns for variable shift operations
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144212 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 21:22:13 +00:00
Devang Patel
f4e0d5d83d
Remove unnecessary include.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144211 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 21:11:02 +00:00
Nadav Rotem
bb539bf973
Add AVX2 support for vselect of v32i8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144187 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 13:21:28 +00:00
Craig Topper
b80ada98c5
Enable execution dependency fix pass for YMM registers when AVX2 is enabled. Add AVX2 logical operations to list of replaceable instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144179 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 09:37:21 +00:00
Craig Topper
0a15035f52
Add instruction selection for AVX2 integer comparisons.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144176 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 08:06:13 +00:00
Craig Topper
aaa643c70e
Add AVX2 instruction lowering for add, sub, and mul.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144174 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 07:28:55 +00:00
Pete Cooper
d752e0f7e6
Added invariant field to the DAG.getLoad method and changed all calls.
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When this field is true it means that the load is from constant (runt-time or compile-time) and so can be hoisted from loops or moved around other memory accesses
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144100 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-08 18:42:53 +00:00
Evan Cheng
7bc389b6b0
Add x86 isel logic and patterns to match movlps from clang generated IR for _mm_loadl_pi(). rdar://10134392, rdar://10050222
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144052 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-08 00:31:58 +00:00
Jakob Stoklund Olesen
3e5d5c53a0
Expand V_SET0 to xorps by default.
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The xorps instruction is smaller than pxor, so prefer that encoding.
The ExecutionDepsFix pass will switch the encoding to pxor and xorpd
when appropriate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143996 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-07 19:15:58 +00:00
Craig Topper
4c763ee613
Add AVX2 variable shift instructions and intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143915 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-07 08:26:24 +00:00
Craig Topper
28692044db
Add AVX2 VPMOVMASK instructions and intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143904 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-07 03:20:35 +00:00
Craig Topper
69f5df7778
Add AVX2 VEXTRACTI128 and VINSERTI128 instructions. Fix VPERM2I128 to be qualified with HasAVX2 instead of HasAVX. Mark VINSERTF128 and VEXTRACTF128 as never having side effects.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143902 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-07 02:00:04 +00:00
Craig Topper
c8eb880a7f
More AVX2 instructions and their intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143895 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-06 23:04:08 +00:00
Benjamin Kramer
5908536673
Replace (Lower|Upper)caseString in favor of StringRef's newest methods.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143891 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-06 20:37:06 +00:00