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Author SHA1 Message Date
Jim Grosbach
2c4d5125c7 Update ARMConstantPoolValue to not use a modifier string. Use an explicit 
VariantKind marker to indicate the additional information necessary. Update
MC to handle the new Kinds. rdar://8647623



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118671 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-10 03:26:07 +00:00
Bruno Cardoso Lopes
0cf2b2b9f0 Add a test to the previous added clo instruction. Patch by Akira again 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118668 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-10 02:22:44 +00:00
Bruno Cardoso Lopes
c4bb67c8d9 Add clo instruction. Patch by Akira Hatanaka (ahatanaka@mips.com) with some minor tweaks 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118667 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-10 02:13:22 +00:00
Dale Johannesen
201ab3acff When checking that the necessary bits are zero in 
order to reduce ((x<<30)>>24) to x<<6, check the
correct bits.  PR 8547.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118665 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-10 01:30:56 +00:00
Bill Wendling
8ea974039a Emit a '!' if this is a "writeback" register or memory address. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118662 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-10 01:07:54 +00:00
Jakob Stoklund Olesen
b80e973c95 Simplify the LiveRangeEdit::canRematerializeAt() interface a bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118661 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-10 01:05:12 +00:00
Dan Gohman
42c31a7073 Make ModRefBehavior a lattice. Use this to clean up AliasAnalysis 
chaining and simplify FunctionAttrs' GetModRefBehavior logic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118660 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-10 01:02:18 +00:00
Matt Beaumont-Gay
cc8d10e1a8 Rename a parameter to avoid confusion with a local variable 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118656 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-10 00:08:58 +00:00
Bill Wendling
8e8b18bcfa Emit the warning about the register list not being in ascending order only once. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118653 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 23:45:59 +00:00
Dale Johannesen
18f601820c Jim's recent fixes 118600, 118587, 118513 have made these work. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118652 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 23:43:34 +00:00
Rafael Espindola
34be396a12 Fixed version of 118639 with an extra assert to catch similar problems 
earlier. Implicit bool -> int conversions are evil!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118651 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 23:42:07 +00:00
Bill Wendling
5fa22a1975 s/std::vector/SmallVector/ 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118648 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 23:28:44 +00:00
Rafael Espindola
037b5be15a Revert previous patch. Missed a case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118645 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 22:54:38 +00:00
Bill Wendling
c3236753d6 Delete the allocated vector. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118644 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 22:51:42 +00:00
Bob Wilson
66f6c79450 Define the subtarget feature for the architecture version, 
as derived from the target triple.  This is important for enabling
features that are implied based on the architecture version.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118643 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 22:50:47 +00:00
Bob Wilson
54f9256380 Do not use MEMBARRIER_MCR for any Thumb code. 
It is only supported for ARM code.  Normally Thumb2 code would use DMB instead,
but depending on how the compiler is invoked (e.g., -mattr=-db) that might be
disabled.  This prevents a "cannot select MEMBARRIER_MCR" error in that
situation.  Radar 8644195

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118642 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 22:50:44 +00:00
Bill Wendling
7729e06c12 Two types of instructions have register lists: 
* LDM, et al, uses a bit mask to indicate the register list.
* VLDM, et al, uses a base register plus number.

The LDM instructions may be non-contiguous, but the VLDM ones must be
contiguous. Those are semantic checks that should be done later in the
compiler. Also postpone the creation of the bit mask until it's needed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118640 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 22:44:22 +00:00
Rafael Espindola
e61a1ac595 Remove IsExplicit. It was always false. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118639 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 22:37:44 +00:00
Jim Grosbach
3a2429a86c Change the ARMConstantPoolValue modifier string to an enumeration. This will 
help in MC'izing the references that use them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118633 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 21:36:17 +00:00
Andrew Trick
071d1c063f Adds RABasic verification and tracing. 
(retry now that the windows build is green)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118630 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 21:04:34 +00:00
Dan Gohman
50a04d067f Convert comments to doxygen syntax. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118628 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 20:33:57 +00:00
Dan Gohman
4cf0dcfb44 Teach FunctionAttrs about the VAArg instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118627 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 20:17:38 +00:00
Dan Gohman
6d44d64f61 Use the AliasAnalysis interface to determine how a Function accesses 
memory. This isn't a real improvement with present day AliasAnalysis
implementations; it's mainly for consistency.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118624 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 20:13:27 +00:00
Dan Gohman
1cdaa3e5b1 VAArg doesn't capture its operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118623 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 20:09:35 +00:00
Dan Gohman
9423f63365 Translate IntrReadArgMem to AccessesArgumentsReadonly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118622 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 20:07:20 +00:00
Dan Gohman
c07661c1fa Teach AliasAnalysis about AccessesArgumentsReadonly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118621 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 20:06:55 +00:00
Dan Gohman
cd93f3bbb9 Teach LICM and AliasSetTracker about AccessesArgumentsReadonly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118618 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 19:58:21 +00:00
Dan Gohman
40b6a19daa Teach FunctionAttrs about AccessesArgumentsReadonly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118617 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 19:56:27 +00:00
Matt Beaumont-Gay
e33daaaaf9 Add a trivial virtual dtor to AbstractRegisterDescription to appease 
-Wnon-virtual-dtor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118616 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 19:56:25 +00:00
Dan Gohman
4a53f37a1a AccessesArgumentsReadonly is read-only. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118615 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 19:50:00 +00:00
Dan Gohman
db78c4873e Add a AccessesArgumentsReadonly ModRefBehavior value, so that the intrinsic 
property IntrReadArgMem can be modeled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118614 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 19:48:55 +00:00
Andrew Trick
32d9aeb1df Reverting r118604. Windows build broke. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118613 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 19:47:51 +00:00
Dan Gohman
467a0adfc8 Factor out the logic for onlyReadsMemory into a helper function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118611 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 19:43:24 +00:00
Dan Gohman
7293ac1281 Delete AccessesArgumentsAndGlobals, which was unused. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118610 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 19:41:37 +00:00
Jim Grosbach
c9962aca8f Handle ARM constant pool values that need an explicit reference to the '.' 
pseudo-label. (TLS stuff).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118609 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 19:40:22 +00:00
Chris Lattner
274191fa70 add a case we fail to devirt. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118608 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 19:37:28 +00:00
Jim Grosbach
16cb3763c5 Trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118606 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 19:22:26 +00:00
Andrew Trick
39a5ce46a5 Adds RABasic verification and tracing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118604 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 19:01:17 +00:00
Jim Grosbach
5df08d8f55 Further MCize ARM constant pool values. This allows basic PIC references for 
object file emission.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118601 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 18:45:04 +00:00
Jim Grosbach
e0ee08e367 Add encoding of Rt to ARM LDR/STR w/ reg+reg offset encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118600 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 18:43:54 +00:00
Owen Anderson
80f3d786ad Last try to get this reference counting right, I swear. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118589 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 17:47:10 +00:00
Owen Anderson
d35b1a2f21 Really fix the leak in the attributes list. Thanks to Benjamin Kramer for pointing out how I was being stupid. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118588 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 17:46:38 +00:00
Jim Grosbach
d92354c574 For ARM load/store instructions, encode [reg+reg] with no shifter immediate as 
a left shift by zero.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118587 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 17:38:15 +00:00
Jim Grosbach
a9a0dde872 ARM .word data fixups don't need an adjustment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118586 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 17:36:59 +00:00
Duncan Sands
3bbb0cc42b Factorize code, no functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118516 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 17:25:51 +00:00
Bruno Cardoso Lopes
9e03061b2f Fix trailing whitespace and style, no functionality change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118515 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 17:25:34 +00:00
Jim Grosbach
54fea632b1 Add encoder method for ARM load/store shifted register offset operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118513 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 17:20:53 +00:00
Duncan Sands
68c39552a5 Testcase for PR8211 (llc crash at -O0). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118509 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 16:22:27 +00:00
Michael J. Spencer
525ba5748c System/Path/Windows: Implement GetLLVMDefaultConfigDir. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118507 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 15:11:42 +00:00
Michael J. Spencer
05283c2a2b System/Path/Windows: Generalize GetUserHomeDirectory. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118506 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 15:11:31 +00:00