Chris Lattner
31442f9dc5
Add a -print-lsr-output option to LLC, to print the output of the LSR pass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35522 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-31 00:24:43 +00:00
Chris Lattner
1436bb657d
add one addressing mode description hook to rule them all.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35520 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-30 23:14:50 +00:00
Dale Johannesen
2041a0ef75
Fix incorrect combination of different loads. Reenable zext-over-truncate
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combination.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35517 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-30 21:38:07 +00:00
Evan Cheng
7cb33c8652
Don't add the same MI to register reuse "last def/use" twice if it reads the
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register more than once.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35513 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-30 20:21:35 +00:00
Evan Cheng
2f52457539
Bug fix for PR1279. When isDead is propagate by copy coalescing, we keep length
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of dead def live interval at 1 to avoid multiple def's targeting the same
register. The previous patch missed a case where the source operand is live-in.
In that case, remove the whole interval.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35512 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-30 20:18:35 +00:00
Evan Cheng
b0b6c76ffe
Disable load width reduction xform of variant (zext (truncate load x)) for
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big endian targets until llvm-gcc build issue has been resolved.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35449 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-29 07:56:46 +00:00
Evan Cheng
974777868c
New entries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35445 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-29 02:48:56 +00:00
Evan Cheng
197d19d11c
Notes on re-materialization.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35420 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 08:30:04 +00:00
Evan Cheng
2005a02f32
Move rematerialization out of beta.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35419 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 08:26:40 +00:00
Evan Cheng
7aff11a1ed
Scale 1 is always ok.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35407 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 01:55:52 +00:00
Evan Cheng
caaf69107e
Remove isLegalAddressImmediate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35406 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 01:53:55 +00:00
Evan Cheng
baeccc8741
GEP index sinking fixes:
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1) Take address scale into consideration. e.g. i32* -> scale 4.
2) Examine all the users of GEP.
3) Generalize to inter-block GEP's (no longer uses loopinfo).
4) Don't do xform if GEP has other variable index(es).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35403 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 01:49:39 +00:00
Evan Cheng
d592a28ca1
Fix for PR1279. Dead def has a live interval of length 1. Copy coalescing should
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not violate that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35396 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 01:30:37 +00:00
Anton Korobeynikov
dd43321079
Remove dead code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35380 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-27 12:05:48 +00:00
Anton Korobeynikov
b17b08d1f2
Split big monster into small helpers. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35379 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-27 11:29:11 +00:00
Evan Cheng
d0083bc5ec
SDISel does not preserve all, it changes CFG and other info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35376 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-27 00:53:36 +00:00
Evan Cheng
018d6e1537
Don't call getOperandConstraint() if operand index is greater than
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TID->numOperands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35375 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-27 00:48:28 +00:00
Evan Cheng
ad7ccf34b5
Fix for PR1266. Don't mark a two address operand IsKill.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35365 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-26 22:40:42 +00:00
Evan Cheng
32eb1f1ca4
Change findRegisterUseOperand() to return operand index instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35363 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-26 22:37:45 +00:00
Dale Johannesen
c6b9ef80a8
Fix reversed logic in getRegsUsed. Rename RegStates to RegsAvailable to
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hopefully forestall similar errors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35362 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-26 22:23:54 +00:00
Evan Cheng
15213b77cf
SIGN_EXTEND_INREG requires one extra operand, a ValueType node.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35350 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-26 07:12:51 +00:00
Anton Korobeynikov
3a84b9baf6
First step of switch lowering refactoring: perform worklist-driven
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strategy, emit JT's where possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35338 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 15:07:15 +00:00
Chris Lattner
5df99b376f
Implement support for vector operands to inline asm, implementing
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CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35332 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 05:00:54 +00:00
Chris Lattner
c13dd1cf4c
implement initial support for the silly X constraint. Testcase here: CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35327 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 04:35:41 +00:00
Chris Lattner
065421f99f
Implement CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35324 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 02:18:14 +00:00
Chris Lattner
4234f57fa0
switch TargetLowering::getConstraintType to take the entire constraint,
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not just the first letter. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35322 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 02:14:49 +00:00
Chris Lattner
82dcb4fe23
don't rely on ADL
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35299 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-24 17:37:03 +00:00
Evan Cheng
dae54ce7fc
Adjust offset to compensate for big endian machines.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35293 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-24 00:02:43 +00:00
Evan Cheng
e177e307fc
Make sure SEXTLOAD of the specific type is supported on the target.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35289 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-23 22:13:36 +00:00
Evan Cheng
b37b80ce46
Also replace uses of SRL if that's also folded during ReduceLoadWidth().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35286 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-23 20:55:21 +00:00
Evan Cheng
0b063def98
A couple of bug fixes for reducing load width xform:
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1. Address offset is in bytes.
2. Make sure truncate node uses are replaced with new load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35274 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-23 02:16:52 +00:00
Dan Gohman
ecb7a77885
Change uses of Function::front to Function::getEntryBlock for readability.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35265 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-22 16:38:57 +00:00
Evan Cheng
c88138fb5e
More opportunities to reduce load size.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35254 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-22 01:54:19 +00:00
Evan Cheng
2c3535d2a6
Fix for PR1257. Bug in live range shortening as a result of copy coalescing
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where the destination is dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35252 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-22 01:26:05 +00:00
Dale Johannesen
fa4bce2b76
repair x86 performance, dejagnu problems from previous change
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35245 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-21 21:51:52 +00:00
Evan Cheng
007b69eeaa
fold (truncate (srl (load x), c)) -> (smaller load (x+c/vt bits))
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35239 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-21 20:14:05 +00:00
Evan Cheng
c3c70881cf
Potential spiller improvement.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35228 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 22:22:38 +00:00
Dale Johannesen
8e59e163db
do not share old induction variables when this would result in invalid
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instructions (that would have to be split later)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35227 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 21:54:54 +00:00
Dale Johannesen
69cb9b78f1
maintain LiveIn when splitting blocks (register scavenging needs it)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35226 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 21:35:06 +00:00
Jeff Cohen
c01a53007a
Fix some VC++ warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35224 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 20:43:18 +00:00
Lauro Ramos Venancio
a0a26b7454
Code clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35220 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 20:09:03 +00:00
Evan Cheng
29a68fb5b7
Minor bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35219 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 19:32:11 +00:00
Lauro Ramos Venancio
8334b9fa3b
CopyToReg source operand can be a physical register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35213 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 16:46:44 +00:00
Evan Cheng
2638e1a6b9
First cut trivial re-materialization support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35208 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 08:13:50 +00:00
Evan Cheng
757072d954
Remove -reduce-joining-phys-regs options. Make it on by default.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35165 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:08:26 +00:00
Evan Cheng
79b098445b
Minor bug fix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35153 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 04:22:35 +00:00
Evan Cheng
cf596c54d4
- Merge UsedBlocks info after two virtual registers are coalesced.
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- Use distance to closest use to determine whether to abort coalescing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35141 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 09:05:55 +00:00
Evan Cheng
e951cd1647
Keep UsedBlocks info accurate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35140 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 09:02:31 +00:00
Evan Cheng
c6a2410d58
Track the BB's where each virtual register is used.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35135 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 09:29:54 +00:00
Evan Cheng
ba1a3df608
Joining a live interval of a physical register with a virtual one can turn out
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to be really bad. Once they are joined they are not broken apart. Also, physical
intervals cannot be spilled!
Added a heuristic as a workaround for this. Be careful coalescing with a
physical register if the virtual register uses are "far". Check if there are
uses in the same loop as the source (copy instruction). Check if it is in the
loop preheader, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35134 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 09:27:35 +00:00