Commit Graph

15565 Commits

Author SHA1 Message Date
Duncan Sands
33756f96d7 Reduce the number of dom queries made by GVN's conditional propagation
logic by half: isOnlyReachableViaThisEdge was trying to be clever and
handle the case of a branch to a basic block which is contained in a
loop.  This costs a domtree lookup and is completely useless due to
GVN's position in the pass pipeline: all loops have preheaders at this
point, which means it is enough for isOnlyReachableViaThisEdge to check
that Dst has only one predecessor.  (I checked this theoretical argument
by running over the entire nightly testsuite, and indeed it is so!).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149838 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-05 18:25:50 +00:00
Benjamin Kramer
d52d9cd038 Testing vector code without sse doesn't make much sense.
Should bring arm and ppc testers back to life (they default to -mcpu=generic)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149821 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-05 11:19:39 +00:00
Chris Lattner
521a255693 Add a test for the miscompilation my recent ConstantDataArray patches introduced, to make sure
we don't regress on it in the future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149803 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-05 02:37:36 +00:00
Craig Topper
eea723fe02 Remove most of the intrinsics for XOP VPCMOV instruction. They all aliased to the same instruction with different types. This would be better accomplished with casts in the not yet created xopintrin.h header file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149795 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-05 00:55:56 +00:00
Hal Finkel
edc8db87dc Boost the effective chain depth of loads and stores.
By default, boost the chain depth contribution of loads and stores. This will allow a load/store pair to vectorize even when it would not otherwise be long enough to satisfy the chain depth requirement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149761 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-04 04:14:04 +00:00
Chad Rosier
2f2d1d7ec0 [fast-isel] HandlePHINodesInSuccessorBlocks() can promite i8 and i16 types too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149730 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-04 00:39:19 +00:00
Chad Rosier
ee8901c08f [fast-isel] Add support for FPToUI. Also add test cases for FPToSI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149706 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03 20:27:51 +00:00
Chad Rosier
36b7beb429 [fast-isel] Add support for selecting UIToFP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149704 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03 19:42:52 +00:00
Nadav Rotem
7e413e9c94 The type-legalizer often scalarizes code. One of the common patterns is extract-and-truncate.
In this patch we optimize this pattern and convert the sequence into extract op of a narrow type.
This allows the BUILD_VECTOR dag optimizations to construct efficient shuffle operations in many cases.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149692 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03 13:18:25 +00:00
Akira Hatanaka
6c2cf8b1fb Add a new MachineJumpTableInfo entry type, EK_GPRel64BlockAddress, which is
needed to emit a 64-bit gp-relative relocation entry. Make changes necessary
for emitting jump tables which have entries with directive .gpdword. This patch
does not implement the parts needed for direct object emission or JIT.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149668 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03 04:33:00 +00:00
Dan Gohman
16717a7c56 Fix SSAUpdaterImpl's RecordMatchingPHI to record exactly the
PHI nodes which were matched, rather than climbing up the
original PHI node's operands to rediscover PHI nodes for
recording, since the PHI nodes found that are not
necessarily part of the matched set.
This fixes rdar://10589171.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149654 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03 01:07:01 +00:00
Jim Grosbach
d5917f0b4d Revert "Disable InstCombine unsafe folding bitcasts of calls w/ varargs."
This reverts commit d0e277d272.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149647 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03 00:00:50 +00:00
Matt Beaumont-Gay
6ab8949cc1 Unix line endings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149615 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 19:00:49 +00:00
NAKAMURA Takumi
7a73925c50 Move test/CodeGen/Generic/2012-02-01-CoalescerBug.ll to CodeGen/ARM, for now. It requires TARGETS=arm.
I cannot reproduce a fixed issue with other targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149604 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 11:44:58 +00:00
Elena Demikhovsky
dcabc7bca9 Optimization for SIGN_EXTEND operation on AVX.
Special handling was added for v4i32 -> v4i64 and v8i16 -> v8i32
extensions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149600 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 09:10:43 +00:00
Lang Hames
50a36f7102 Set EFLAGS correctly in EmitLoweredSelect on X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149597 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 07:48:37 +00:00
Lang Hames
02e08d5b4d PR11868. The previous loop in LiveIntervals::join would sometimes fall over if
more than two adjacent ranges needed to be merged. The new version should be
able to handle an arbitrary sequence of adjancent ranges.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149588 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 05:37:34 +00:00
Andrew Trick
922d314e8f Instruction scheduling itinerary for Intel Atom.
Adds an instruction itinerary to all x86 instructions, giving each a default latency of 1, using the InstrItinClass IIC_DEFAULT.

Sets specific latencies for Atom for the instructions in files X86InstrCMovSetCC.td, X86InstrArithmetic.td, X86InstrControl.td, and X86InstrShiftRotate.td. The Atom latencies for the remainder of the x86 instructions will be set in subsequent patches.

Adds a test to verify that the scheduler is working.

Also changes the scheduling preference to "Hybrid" for i386 Atom, while leaving x86_64 as ILP.

Patch by Preston Gurd!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149558 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 23:20:51 +00:00
Mon P Wang
845b1899b6 Avoid creating an extract element to an illegal type after LegalizeTypes has run.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149548 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 22:15:20 +00:00
Andrew Trick
ee498d3254 VLIW specific scheduler framework that utilizes deterministic finite automaton (DFA).
This new scheduler plugs into the existing selection DAG scheduling framework. It is a top-down critical path scheduler that tracks register pressure and uses a DFA for pipeline modeling.

Patch by Sergei Larin!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149547 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 22:13:57 +00:00
NAKAMURA Takumi
3a14d0f0fd test/CodeGen/X86/avx-minmax.ll: Relax expressions for Win32 targets. YMM arguments are passed as indirect on Win32 x64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149505 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 14:35:29 +00:00
Elena Demikhovsky
1766971769 Passing AVX 256-bit structures in Win64 was wrong.
Fixed Win64 calling conventions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149494 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 10:46:14 +00:00
Elena Demikhovsky
3ae98150e3 Optimization for "truncate" operation on AVX.
Truncating v4i64 -> v4i32 and v8i32 -> v8i16 may be done with set of shuffles.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149485 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 07:56:44 +00:00
Hal Finkel
de5e5ec304 Add a basic-block autovectorization pass.
This is the initial checkin of the basic-block autovectorization pass along with some supporting vectorization infrastructure.
Special thanks to everyone who helped review this code over the last several months (especially Tobias Grosser).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149468 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 03:51:43 +00:00
Jim Grosbach
d0e277d272 Disable InstCombine unsafe folding bitcasts of calls w/ varargs.
Changing arguments from being passed as fixed to varargs is unsafe, as
the ABI may require they be handled differently (stack vs. register, for
example).

Remove two tests which rely on the bitcast being folded into the direct
call, which is exactly the transformation that's unsafe.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149457 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 00:08:17 +00:00
Kevin Enderby
d49b2a7a9d Fixed a crash in llvm-mc for Mach-O when a symbol difference expression uses a
symbol from an assignment.  In this case the symbol did not have a fragment so
MCObjectWriter::IsSymbolRefDifferenceFullyResolved() should not have been
calling IsSymbolRefDifferenceFullyResolvedImpl() with a NULL fragment and should
just have returned false in that case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149442 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-31 23:02:57 +00:00
Craig Topper
cac50c5ab8 Remove pcmpgt/pcmpeq intrinsics as clang is not using them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149367 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-31 06:52:44 +00:00
Bill Wendling
1fe1adeeba Remove all references to the old EH.
There was always the current EH. -- Ministry of Truth


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149335 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-31 02:09:07 +00:00
Bill Wendling
35b8870961 Update test to new EH model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149333 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-31 02:05:13 +00:00
Bill Wendling
4b523b4371 Update test to new EH model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149332 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-31 02:04:20 +00:00
Chandler Carruth
beb05952ce Chris's constant data sequence refactoring actually enabled printing
vectors of all one bits to be printed more cleverly in the AsmPrinter.
Unfortunately, the byte value for all one bits is the same with
-fsigned-char as the error return of '-1'. Force this to be the unsigned
byte value when returning it to avoid this problem, and update the test
case for the shiny new behavior.

Yay for building LLVM and Clang with -funsigned-char.

Chris, please review, and let me know if there is any reason to not
desire this change. It seems good on the surface, and certainly intended
based on the code written.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149299 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-30 23:47:44 +00:00
Devang Patel
885f65b4a1 Intel syntax. Adjust special code, used to recognize cmp<comparison code>{ss,sd,ps,pd}, for intel syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149291 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-30 22:47:12 +00:00
Devang Patel
be3e310d5e Intel syntax. Support .intel_syntax directive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149270 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-30 20:02:42 +00:00
Craig Topper
cc30006391 Fix pattern for memory form of PSHUFD for use with FP vectors to remove bitcast to an integer vector that normal code wouldn't have. Also remove bitcasts from code that turns splat vector loads into a shuffle as it was making the broken pattern necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149232 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-30 07:50:31 +00:00
NAKAMURA Takumi
90fb059222 CMake: Promote the testing targets out of folders on IDE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149220 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-30 03:15:47 +00:00
James Molloy
2d8955a77c Ensure .AliasedSymbol() is called on all uses of getSymbol(). Affects ARM and MIPS ELF backends.
Fixes PR11877



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149180 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-28 15:58:32 +00:00
Rafael Espindola
8b01c82f25 Small improvement to the recursion detection logic from the previous commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149175 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-28 06:22:14 +00:00
Rafael Espindola
e71cc86ad1 Handle recursive variable definitions directly. This gives us better error
messages and allows us to fix PR11865.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149174 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-28 05:57:00 +00:00
Rafael Espindola
04594aeffa Add r149110 back with a fix for when the vector and the int have the same
width.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149151 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-27 23:33:07 +00:00
Rafael Espindola
41cedd740d Revert r149110 and add a testcase that was crashing since that revision.
Unfortunately I also had to disable constant-pool-sharing.ll the code it tests has been
updated to use the IL logic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149148 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-27 22:42:48 +00:00
Devang Patel
a28101e61a Intel Syntax: Parse mem operand with seg reg. QWORD PTR FS:[320]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149142 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-27 19:48:28 +00:00
Matt Beaumont-Gay
2b343702aa Unix line endings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149115 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-27 02:31:29 +00:00
Chris Lattner
f983da030e enhance constant folding to be able to constant fold bitcast of
ConstantVector's to integer type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149110 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-27 01:44:03 +00:00
Lang Hames
3b0714d993 Rewrite instruction operands in AdjustCopiesBackFrom. Fixes PR11861.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149097 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-27 00:05:42 +00:00
Jakob Stoklund Olesen
53fa56e8dc Handle call-clobbered ymm registers on Win64.
The Win64 calling convention has xmm6-15 as callee-saved while still
clobbering all ymm registers.

Add a YMM_HI_6_15 pseudo-register that aliases the clobbered part of the
ymm registers, and mark that as call-clobbered.  This allows live xmm
registers across calls.

This hack wouldn't be necessary with RegisterMask operands representing
the call clobbers, but they are not quite operational yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149088 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-26 22:59:28 +00:00
Chad Rosier
0162ff421d Replace the use of isPredicable() with isPredicated() in
MachineBasicBlock::canFallThrough().  We're interested in the state of the
instruction (i.e., is this a barrier or not?), not if the instruction is
predicable or not.
rdar://10501092

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149070 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-26 18:24:25 +00:00
Jakob Stoklund Olesen
1a96c91431 Clear kill flags before propagating a copy.
The live range of the source register may be extended when a redundant
copy is eliminated. Make sure any kill flags between the two copies are
cleared.

This fixes PR11765.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149069 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-26 17:52:15 +00:00
James Molloy
34982576a4 Add support for the R_ARM_TARGET1 relocation, which should be given to relocations applied to all C++ constructors and destructors.
This enables the linker to match concrete relocation types (absolute or relative) with whatever library or C++ support code is being linked against.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149057 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-26 09:25:43 +00:00
Victor Umansky
668f7ac9e4 Fix for the following bug in AVX codegen for double-to-int conversions:
.	"fptosi" and "fptoui" IR instructions are defined with round-to-zero rounding mode.
.	Currently for AVX mode for <4xdouble> and <8xdouble>  the "VCVTPD2DQ.128" and "VCVTPD2DQ.256" instructions are selected (for .fp_to_sint. DAG node operation ) by AVX codegen. However they use round-to-nearest-even rounding mode.
.	Consequently, the conversion produces incorrect numbers.
 
The fix is to replace selection of VCVTPD2DQ instructions with VCVTTPD2DQ instructions. The latter use truncate (i.e. round-to-zero) rounding mode. 
As .fp_to_sint. DAG node operation is used only for lowering of  "fptosi" and "fptoui" IR instructions, the fix in X86InstrSSE.td definition file doesn.t have an impact on other LLVM flows.
 
The patch includes changes in the .td file, LIT test for the changes and a fix in a legacy LIT test (which produced asm code conflicting with LLVN IR spec). 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149056 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-26 08:51:39 +00:00
Jakob Stoklund Olesen
e8838d5c5f Improve sub-register def handling in ProcessImplicitDefs.
This boils down to using MachineOperand::readsReg() more.

This fixes PR11829 where a use ended up after the first def when
lowering REG_SEQUENCE instructions involving IMPLICIT_DEFs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148996 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 23:36:27 +00:00