6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-08-01 02:29:19 +00:00
Code Issues Projects Releases Wiki Activity
72,621 Commits 39 Branches 0 Tags 277 MiB
37d22d92df
Commit Graph

47370 Commits

Author SHA1 Message Date
Eli Friedman
21c60904ce PR7952: Make isa<> use the same logic as cast<>, so that they both work 
consistently.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131803 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-21 19:13:10 +00:00
Benjamin Kramer
b22da2a72c X86: smulo -> add is now done target-independently in DAGCombiner, remove the patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131801 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-21 18:32:01 +00:00
Benjamin Kramer
f55d26e788 Implement mulo x, 2 -> addo x, x in DAGCombiner. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131800 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-21 18:31:55 +00:00
Benjamin Kramer
cd89d4d524 Revert "InstCombine: Turn mul.with.overflow(X, 2) into the cheaper add.with.overflow(X, X)" 
It's better to do this in codegen, mul.with.overflow(X, 2) is more canonical because it has only one use on "X".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131798 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-21 18:31:42 +00:00
Charles Davis
81f3830f2e Don't allow .seh_handler and .seh_handlerdata directives inside chained 
unwind areas.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131795 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-21 17:36:25 +00:00
Charles Davis
321fe74b2d A handler for a function in the Win64 EH scheme can be both an unwind handler 
and an exception handler. Handle that case.

Also, add an 'Emitted' member to the MCWin64EHUnwindInfo struct. It will be
needed later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131791 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-21 15:57:49 +00:00
Benjamin Kramer
c21b205f93 InstCombine: Turn mul.with.overflow(X, 2) into the cheaper add.with.overflow(X, X) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131789 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-21 09:22:06 +00:00
Cameron Zwarich
37fed38ec1 Fix PR9978 by adding RIP to GR64_TC so it can be used as an address in PIC code. It 
is already in GR64 for the same reasons. Since it isn't allocatable it can't cause
any problems.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131787 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-21 04:13:49 +00:00
Akira Hatanaka
52106e1e25 Use the correct register to access stack frame objects. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131785 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-21 03:01:03 +00:00
Akira Hatanaka
f346c69530 Insert instructions that copy $sp to or from $fp at the right locations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131784 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-21 02:29:26 +00:00
Dan Gohman
424b777171 When BasicAA can determine that two pointers have the same base but 
differ by a dynamic offset, return PartialAlias instead of MayAlias.
See the comment in the code for details. This fixes PR9971.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131781 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-21 01:05:08 +00:00
Andrew Trick
dc5948d472 Have Program::Wait return -2 for crashed and timeouts instead of embedding 
info in the error message. Per Dan's request.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131780 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-21 00:56:46 +00:00
Charles Davis
5c2256a571 Set the "LastFrameInst" field when streaming a .seh_setframe directive. This 
is needed for an upcoming patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131772 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-21 00:09:04 +00:00
Cameron Zwarich
345968c82d Fix PR9962 by properly constraining register classes in RemoveCopyByCommutingDef(). This 
actually fixes most of the VerifyCoalescing failures in test-suite.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131768 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 23:25:36 +00:00
Akira Hatanaka
43299776d7 Change the order fixed objects are created in MipsTargetLowering::LowerCall in 
preparation for reversing StackDirection.

Fixed objects are created in the following order:  
 1. Incoming arguments passed on stack.
 2. va_arg objects (include both arguments that are passed in registers and
    pointer to the location of the first va_arg argument).
 3. $gp restore slot.
 4. Outgoing arguments passed on stack.
 5. Pointer to alloca'd space.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131767 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 23:22:14 +00:00
Charles Davis
98eb7be103 Fix typo. When will I learn? 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131765 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 22:23:34 +00:00
Eli Friedman
c088345f13 Add fast-isel support for byval calls on x86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131764 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 22:21:04 +00:00
Charles Davis
f3ffc2cd76 Add .pdata and .xdata sections to the COFF TLOF implementation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131763 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 22:13:55 +00:00
Jim Grosbach
958b68140e No reason not to allow defining the CFA as a reg w/ offset zero. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131760 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 21:50:09 +00:00
Akira Hatanaka
d37776d1c1 In CC_MipsO32, allocate a stack space regardless of whether the argument is 
passed in register or on the stack.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131758 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 21:39:54 +00:00
Jim Grosbach
1585ce7e8c Fix typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131757 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 21:35:39 +00:00
Jim Grosbach
2b6f7117f5 Add support for frame info use of the .cfi_def_cfa directive. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131756 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 21:23:17 +00:00
Jim Grosbach
ae8e829d39 Add missing leading \t when printing .cfi_def_cfa in the asmstreamer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131755 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 21:22:37 +00:00
Akira Hatanaka
6ffbf82e22 Define functions that get/set maximum call frame size. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131752 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 20:11:17 +00:00
Rafael Espindola
b8adb8af0f adds some attributes to attribute section when cpu is "xscale" 
(this is what used in Android NDK, when architecture is ARMv5)

patch by Koan-Sin Tan

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131751 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 20:10:34 +00:00
Rafael Espindola
298c8e12ea fixes target address tBL and tBLX and sets relocation type 
of tBL/tBLX to R_ARM_THM_CALL (ARM ELF 4.7.1.6)

Patch by koan-sin tan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131748 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 20:01:01 +00:00
Stuart Hastings
0e29ed081b Re-commit 131641 with fixes; de-pseudoize MOVSX16rr8 and friends. 
rdar://problem/8614450


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131746 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 19:04:40 +00:00
Akira Hatanaka
17a1e87751 Make $fp and $ra callee-saved registers and let PrologEpilogInserter handle 
saving and restoring them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131745 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 18:39:33 +00:00
Andrew Trick
f85092c255 indvars: Prototyping Sign/ZeroExtend elimination without canonical IVs. 
No functionality enabled by default. Use -disable-iv-rewrite.
Extended IVUsers to keep track of the phi that represents the users' IV.
Added the WidenIV transform to replace a narrow IV with a wide IV
by doing a one-for-one replacement of IV users instead of expanding the
SCEV expressions. [sz]exts are removed and truncs are inserted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131744 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 18:25:42 +00:00
Charles Davis
cde87e2377 Now that they're implemented, make the Win64 EH MCAsmStreamer methods call 
super.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131743 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 18:19:22 +00:00
Evan Cheng
0b65599015 Revert accidental commit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131739 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 17:38:48 +00:00
Charles Davis
d0b76d0004 "Implement" the HandlerData Win64 EH method in the base MCStreamer. 
There's really nothing to implement. All this really does is swap to a
pseudo-section that later gets written to the unwind info struct. That
needs to be implemented in the object streamers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131734 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 16:06:22 +00:00
Benjamin Kramer
eb274e6bdd Rename the "sandybridge" subtarget to "corei7-avx", for GCC compatibility. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131730 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 15:11:26 +00:00
Benjamin Kramer
6e35e4c8c1 Remove noisy semicolons. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131724 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 09:20:25 +00:00
Cameron Zwarich
21a70bf4a5 Fix PR9960 by teaching SimpleRegisterCoalescing::AdjustCopiesBackFrom() to preserve 
the phikill flag.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131717 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 03:54:04 +00:00
Andrew Trick
074397d75e indvars: minor cleanup in preparation for sign/zero extend elimination. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131716 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 03:37:48 +00:00
Akira Hatanaka
cd0f90f831 Fix bug in which nodes that write to argument registers do not get glued with the JALR node. Patch by Sasa Stankovic 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131714 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 02:30:51 +00:00
Akira Hatanaka
d992f6c666 Remove code that creates unnecessary frame objects. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131711 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 01:45:06 +00:00
Akira Hatanaka
da0a3571d6 Define variables and functions in MipsFunctionInfo. 
This is the first of a series of patches that attempt to simplify handling of 
stack frame objects. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131710 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 01:17:58 +00:00
Chad Rosier
a166089f36 Don't attempt to tail call optimize for Win64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131709 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 00:59:28 +00:00
Evan Cheng
2e6496026f Revert r131664 and fix it in instcombine instead. rdar://9467055 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131708 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-20 00:54:37 +00:00
Cameron Zwarich
5a4b3d8c8f Fix PR9955 by only attaching load memory operands to load instructions and 
similarly for stores. Now "make check" passes with the MachineVerifier forced
on with the VerifyCoalescing option!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131705 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 23:44:34 +00:00
Eli Friedman
dc51575a5f Add fast-isel support for zeroext and signext ret instructions on x86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131689 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 22:16:13 +00:00
Rafael Espindola
78ff647e44 Looks like OS X assemblers (including MC) don't like 
foo:
bar = foo
.quad bar

Avoid producing it. Fixes PR9951.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131687 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 22:05:56 +00:00
Rafael Espindola
a6f2678f08 Misc code refactorings: 
* Remove unnecessary arguments now that ForceExpAbs is a method.
* Use ForceExpAbs in EmitAbsValue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131683 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 21:40:34 +00:00
Eric Christopher
2bbecd8f6d Oddly people want to use the 'r' constraint for fp constants on x86. 
Fixes rdar://9218925
Fixes PR9601


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131682 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 21:33:47 +00:00
Charles Davis
61558aaf4f Implement the EndProlog Win64 EH method on the base MCStreamer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131679 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 21:24:54 +00:00
Jason W Kim
861b9c6a39 This fixes one divergence between LLVM and binutils for ARM in the 
text section.

Assume the following bit of annotated assembly:

.section	.data.rel.ro,"aw",%progbits
.align	2
.LAlpha:
.long	startval(GOTOFF)

.text
.align	2
.type	main,%function
.align	4

main: ;;; assume "main" starts at offset 0x20
0x0	push	{r11, lr}
0x4	movw	r0, :lower16:(.LAlpha-(.LBeta+8))
;;; ==> (.AddrOf(.LAlpha) - ((.AddrOf(.LBeta) - .AddrOf(".")) + 8)
;;; ==> (??? - ((16-4) + 8) = -20
0x8	movt	r0, :upper16:(.LAlpha-(.LBeta+8))
;;; ==> (.AddrOf(.LAlpha) - ((.AddrOf(.LBeta) - .AddrOf(".")) + 8)
;;; ==> (??? - ((16-8) + 8) = -16
0xc	... blah

.LBeta:
0x10	add	r0, pc, r0
0x14	... blah

.LGamma:
0x18	add	r1, pc, r1

Above snippet results in the following relocs in the .o file for the
first pair of movw/movt instructions

00000024 R_ARM_MOVW_PREL_NC .LAlpha
00000028 R_ARM_MOVT_PREL .LAlpha

And the encoded instructions in the .o file for main: must be

00000020 <main>:
20:	e92d4800 push	{fp, lr}
24:	e30f0fec movw	r0, #65516	; 0xffec i.e. -20
28:	e34f0ff0 movt	r0, #65520	; 0xfff0 i.e. -16

However, llc (prior to this commit) generates the following sequence

00000020 <main>:
20:	e92d4800 push	{fp, lr}
24:	e30f0fec movw	r0, #65516	; 0xffec - i.e. -20
28:	e34f0fff movt	r0, #65535	; 0xffff - i.e. -1

What has to happen in the ArmAsmBackend is that if the relocation is PC
relative, the 16 bits encoded as part of movw and movt must be both addends,
not addresses. It makes sense to encode addresses by right shifting the value
by 16, but the result is incorrect for PIC.
i.e., the right shift by 16 for movt is ONLY valid for the NON-PCRel case.

This change agrees with what GNU as does, and makes the PIC code run.

MC/ARM/elf-movt.s covers this case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131674 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 20:55:25 +00:00
Devang Patel
d3a1788da1 Reapply r131605. This time with a fix, which is to use NoFolder. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131673 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 20:52:46 +00:00
Rafael Espindola
a3bff99f0a ADD64ri32 sign extends its argument, so we need to use a R_X86_64_32S. 
Fixes PR9934.

We really need to start tblgening the relocation info :-(

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131669 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 20:32:34 +00:00
Akira Hatanaka
a1a7ba8382 Align i64 arguments to 64 bit boundaries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131668 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 20:29:48 +00:00
Charles Davis
c3b162857a Implement the Win64 EH prolog instruction methods on the base MCStreamer. 
I had to change the API slightly to avoid overloading issues.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131666 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 19:35:55 +00:00
Evan Cheng
0efaa5e6a1 crc32 with 64-bit output zeros upper 32-bits. rdar://9467055 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131664 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 18:57:12 +00:00
Stuart Hastings
3dfc4b1222 Update some currently-disabled code, preparing for eventual use. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131663 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 18:48:20 +00:00
Akira Hatanaka
59d266029c Increase number of available registers when target is MIPS32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131660 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 18:25:03 +00:00
Evan Cheng
aaa7f499c1 Add comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131659 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 18:18:39 +00:00
Akira Hatanaka
95b8ae190e Simplify CC_MipsO32 and merge it with CC_MipsO32_VarArgs. Patch by Sasa Stankovic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131657 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 18:06:05 +00:00
Joerg Sonnenberger
f8cd708f14 Reapply 131644 including the missing header changes: 
Introduce -fatal-assembler-warnings for the obvious purpose


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131655 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 18:00:13 +00:00
Stuart Hastings
d22f036c2a Reverting 131641 to investigate 'bot complaint. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131654 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 17:54:42 +00:00
Eli Friedman
8bd71a1ec1 Revert r131644; it's breaking the build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131653 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 17:48:09 +00:00
Charles Davis
440596ffe5 Turns out GAS does have Win64 EH directives. (It also supports WinCE EH.) Make 
ours compatible with GAS.

In retrospect, I should have emailed binutils about this earlier. Thanks to
Kai Tietz for pointing out that GAS already had SEH directives.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131652 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 17:46:39 +00:00
Jim Grosbach
6635b04a43 80 columns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131649 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 17:34:53 +00:00
Joerg Sonnenberger
bae1c924ce Introduce -fatal-assembler-warnings for the obvious purpose 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131644 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 17:27:01 +00:00
Akira Hatanaka
d48cfaec35 Fix data layout string. i64 is aligned to 64 bit boundaries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131642 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 17:21:09 +00:00
Stuart Hastings
b6dcf3c514 Revise MOVSX16rr8/MOVZX16rr8 (and rm variants) to no longer be 
pseudos.  rdar://problem/8614450


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131641 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 16:59:50 +00:00
Cameron Zwarich
055cdfc541 Use the correct register class for Cell varargs spilling. This fixes all of the 
verifier failures in the CodeGen/CellSPU tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131631 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 04:44:19 +00:00
Mon P Wang
28e2b1d29a Fixed sdiv and udiv for <4 x i16>. The test from r125402 still applies for this change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131630 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 04:15:07 +00:00
Charles Davis
91d9a1c0f7 Implement the StartChained and EndChained Win64 EH methods on MCStreamer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131629 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 04:04:13 +00:00
Cameron Zwarich
d76773a221 Make CodeGen/PowerPC/2007-09-11-RegCoalescerAssert.ll pass with the verifier. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131627 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 03:11:06 +00:00
Cameron Zwarich
0113e4e3f2 Fix PR8828 by removing the explicit def in MovePCToLR as well as the pointless 
piclabel operand. The operand in the tablegen definition doesn't actually turn
into an MI operand, so it just confuses anything checking the TargetInstrDesc
for the number of operands. It suffices to just have an implicit def of LR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131626 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 02:56:28 +00:00
Cameron Zwarich
462b6dc6bf Reuse the TargetInstrDesc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131625 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 02:56:23 +00:00
Charles Davis
0855bc5b97 Implement the StartProc and EndProc Win64 EH methods on the base MCStreamer. 
Based largely on Rafael Espindola's work on CFI. Other methods soon to follow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131623 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 02:49:00 +00:00
Rafael Espindola
216dde91d1 revert 131605 to fix PR9946. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131620 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 02:26:30 +00:00
Cameron Zwarich
21803721d5 Correctly constrain a register class when computing frame offsets, as the Thumb2 
add instruction takes an rGPR. This fixes the last of PR8825.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131619 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 02:18:27 +00:00
Cameron Zwarich
6fcb6e454b Revert r128961 because it didn't include a test and causes the verifier to fail 
on CodeGen/X86/2007-05-07-InvokeSRet.ll. There is probably a bug here that was
fixed by r128961, but since there is no test or reference to a source file I have
to revert it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131618 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 01:56:19 +00:00
Eli Friedman
6fd5a6000b Make the demanded bits/elements optimizations preserve debug line information. 
I'm not sure this is quite ideal, but I can't really think of any better way to do it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131616 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 01:20:42 +00:00
Jim Grosbach
c0ceedb6f8 Avoid a Twine that referenced a tmp (which proceded to go out of scope before 
the Twine was used).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131612 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 00:45:05 +00:00
Devang Patel
1f5812bd99 Use IRBuilder. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131609 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 00:13:33 +00:00
Devang Patel
1aa89a2f91 Use IRBuilder while simplifying unreachable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131607 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 00:09:21 +00:00
Rafael Espindola
7205d431f1 Revert my previous patch. The cmake build had already been fixed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131606 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-19 00:02:45 +00:00
Devang Patel
0b4ccdc98c Use IRBuilder while simplifying conditional branch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131605 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 23:59:51 +00:00
Eli Friedman
e6f364b6c4 More instcombine cleanup, towards improving debug line info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131604 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 23:58:37 +00:00
Jim Grosbach
e0b58634a1 Restore sanity to 131601. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131603 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 23:56:43 +00:00
Rafael Espindola
e37234739e Fix the cmake build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131602 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 23:56:40 +00:00
Jim Grosbach
3ec2c7c3e4 Objective C functions may use a magic '\1' on the name. Handle that when 
dealing with them in the MCJIT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131601 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 23:53:21 +00:00
Eli Friedman
49fcf571da Shuffle StandardPasses.cpp into VMCore; add it to CMake. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131600 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 23:51:11 +00:00
Devang Patel
02dd5418d2 Use IRBuilder while simplifying branch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131598 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 23:18:47 +00:00
Eli Friedman
22486c9aba Revert unintentional commit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131597 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 23:13:10 +00:00
Eli Friedman
107ffd58f7 More instcombine simplifications towards better debug locations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131596 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 23:11:30 +00:00
Cameron Zwarich
631fcbf810 Add missing mayLoad / mayStore flags to instruction definitions without patterns, 
which fixes all of the CodeGen/MBlaze verifier failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131595 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 23:03:10 +00:00
Cameron Zwarich
e4c6445405 Reserve the segment registers on x86 to fix verifier failures in any code that 
uses them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131591 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 22:24:48 +00:00
Charles Davis
8b3e5e5afa Remove comments as Chris requested. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131590 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 22:13:51 +00:00
Cameron Zwarich
20a41cb2b2 Reserve r29 on Alpha. This fixes all verifier failures in CodeGen/Alpha. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131587 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 21:54:32 +00:00
Tanya Lattner
db28247522 Handle perfect shuffle case that generates a vrev for vectors of floats. 
Add test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131582 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 21:44:54 +00:00
Eli Friedman
10a818809d Third pass at allowing plugins to modify default passes. This time with a tweak so that we don't depend on an uninitialized argument. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131581 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 21:40:04 +00:00
Devang Patel
176ec40cb1 Use IRBuilder while simplifying return instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131580 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 21:33:11 +00:00
Cameron Zwarich
d36d26d008 Fix an obvious typo in r131572. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131579 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 21:29:07 +00:00
Cameron Zwarich
955db42568 Fix more of PR8825. Now all of CodeGen/ARM passes with VerifyCoalescing turned on. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131578 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 21:25:14 +00:00
Dan Gohman
673968ae78 When forming an ICmpZero LSRUse, normalize the non-IV operand 
of the comparison, so that the resulting expression is fully
normalized. This fixes PR9939.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131576 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 21:02:18 +00:00
Charles Davis
f07090134d Add some more Win64 EH directives: 
- StartChained and EndChained delimit a chained unwind area, which can contain
  additional operations to be undone if an exception occurs inside of it.
- UnwindOnly declares that this function doesn't handle any exceptions. If it
  has a handler, it's an unwind handler instead of an exception handler.
- Lsda declares the location and size of the LSDA, which in the Win64 EH
  scheme is kept inside the UNWIND_INFO struct. Windows itself ignores the
  LSDA; it's used by the Language-Specific Handler (the "Personality Function"
  from DWARF).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131572 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 20:54:10 +00:00
Devang Patel
b55d924b1e Spread use of IRBuilder even more. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131571 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 20:53:17 +00:00
Eli Friedman
f9a74cf069 Revert r131556; it's breaking buildbots/clang tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131567 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 20:39:27 +00:00
Devang Patel
007349dafd Use IRBuilder while simplifying switch instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131566 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 20:35:38 +00:00
Johnny Chen
a96581f4f7 Disassembly of tBcc was wrongly adding 4 to the SignExtend'ed imm8:'0' immediate operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131565 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 20:32:41 +00:00
Devang Patel
d46ba26a6b Use IRBuilder while simplifying unwind. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131561 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 20:01:18 +00:00
Chad Rosier
871f664093 Enables vararg functions that pass all arguments via registers to be optimized into tail-calls when possible. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131560 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 19:59:50 +00:00
Eli Friedman
59f15918c2 More instcombine cleanup aimed towards improving debug line info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131559 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 19:57:14 +00:00
David Chisnall
b2a00dca1b Second pass at allowing plugins to modify default passes. This time without bonus inter-library dependencies. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131556 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 19:00:41 +00:00
Evan Cheng
b936e3006f Revise r131553. Just use the type of the input node and forgo the bitcast. rdar://9449159. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131555 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 18:59:17 +00:00
Evan Cheng
d48fda46f5 Fix an ARMTargetLowering::LowerSELECT bug: legalized result must have same type as input. Sorry test cases only trigger when dag combine is disabled. rdar://9449178 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131553 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 18:47:27 +00:00
Devang Patel
d3372b85e6 Use IRBuilder while simplifying terminator. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131552 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 18:43:31 +00:00
Devang Patel
a23812cfbd Use IRBuilder while simplifying unconditional branch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131551 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 18:28:48 +00:00
Devang Patel
f60364de44 Use IRBuilder while folding two entry PHINode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131548 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 18:16:44 +00:00
Eli Friedman
976e7e1cc8 Switch more inst insertion in instcombine to IRBuilder. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131547 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 18:10:28 +00:00
Devang Patel
3e410c6607 Set up IRBuilder for use during simplification. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131545 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 18:01:27 +00:00
Eli Friedman
1eca76a611 Switch more inst insertion in instcombine to IRBuilder. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131544 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 17:58:37 +00:00
Matt Beaumont-Gay
f88ad9aeee fix typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131543 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 17:37:10 +00:00
Eli Friedman
e87ca454ba Switch inst insertion in instcombine transform to IRBuilder. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131542 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 17:31:55 +00:00
Devang Patel
62fb3556ea Use IRBuiler while constant folding terminator. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131541 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 17:26:46 +00:00
Stuart Hastings
d116611e0a Fix inelegant initialization. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131538 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 15:54:26 +00:00
Justin Holewinski
657d1bed23 PTX: add flag to disable mad/fma selection 
Patch by Dan Bailey

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131537 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 15:42:23 +00:00
Duncan Sands
d6dde76090 Revert commit 131534 since it seems to have broken several buildbots. 
Original log entry:
Refactor getActionType and getTypeToTransformTo ; place all of the 'decision'
code in one place.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131536 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 14:57:56 +00:00
Nadav Rotem
fe3f5d7538 Refactor getActionType and getTypeToTransformTo ; place all of the 'decision' 
code in one place.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131534 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 12:26:38 +00:00
Duncan Sands
7016ec1a45 Now that SrcBits and DestBits always represent the primitive size, rather 
than either the primitive size or the element primitive size (in the case
of vectors), simplify the vector logic.  No functionality change.  There
is some distracting churn in the patch because I lined up comments better
while there - sorry about that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131533 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 10:59:25 +00:00
Duncan Sands
bb1695e333 Tighten up checking of the validity of casts. (1) The IR parser would 
happily accept things like "sext <2 x i32> to <999 x i64>".  It would
also accept "sext <2 x i32> to i64", though the verifier would catch
that later.  Fixed by having castIsValid check that vector lengths match
except when doing a bitcast.  (2) When creating a cast instruction, check
that the cast is valid (this was already done when creating constexpr
casts).  While there, replace getScalarSizeInBits (used to allow more
vector casts) with getPrimitiveSizeInBits in getCastOpcode and isCastable
since vector to vector casts are now handled explicitly by passing to the
element types; i.e. this bit should result in no functional change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131532 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 09:21:57 +00:00
Duncan Sands
117feba971 Teach getCastOpcode about element-by-element vector casts. For example, "trunc" 
can be used to turn a <4 x i64> into a <4 x i32> but getCastOpcode would assert
if you passed these types to it.  Note that this strictly extends the previous
functionality: if getCastOpcode previously accepted two vector types (i.e. didn't
assert) then it still will and returns the same opcode (BitCast).  That's because
before it would only accept vectors with the same bitwidth, and the new code only
touches vectors with the same length.  However if two vectors have both the same
bitwidth and the same length then their element types have the same bitwidth, so
the new logic will return BitCast as before.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131530 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 07:13:41 +00:00
Tanya Lattner
2a8eb722c7 In r131488 I misunderstood how VREV works. It splits the vector in half and splits each half. Therefore, the real problem was that we were using a VREV64 for a 4xi16, when we should have been using a VREV32. 
Updated test case and reverted change to the PerfectShuffle Table.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131529 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 06:42:21 +00:00
Charles Davis
0e30f02f44 Implement the Win64 EH directive methods for the assembly language streamer. 
GAS has no such directives (not even mingw-w64 GAS has them), so I took
creative license with their names in assembly. I prefixed them all with
"w64_" to avoid namespace collisions, for example. If I discover that GAS
has taken a different approach, I'll change ours to match.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131525 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 04:58:05 +00:00
Jakob Stoklund Olesen
54f0d1e021 Eliminate dead dead code elimination code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131524 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 04:51:15 +00:00
Jakob Stoklund Olesen
c6b9ebdd64 Also use shrinkToUses after AdjustCopiesBackFrom(). 
The 'last use' may not be in the same basic block, and we still want a correct
live range.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131523 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 04:51:12 +00:00
Charles Davis
9c77398d1c While thinking about how to know where the functions' boundaries are for 
the purposes of the Win64 EH tables, I realized we had no way to tell where
the function ends. (MASM bounds functions with PROC and ENDP keywords.)
Add a directive to delimit the end of the function, and rename the 'frame'
directive to more accurately reflect its duality with the new directive.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131522 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 04:47:22 +00:00
Jakob Stoklund Olesen
fc2fcb4165 Properly shrink live ranges after deleting dead copies. Clean up after all joined copies. 
LiveInterval::shrinkToUses recomputes the live range from scratch instead of
removing snippets. This should avoid the problem with dangling live ranges.

Leave physreg identity copies alone. They can be created when joining a virtreg
with a physreg. They don't affect register allocation, and they will be removed
by the rewriter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131521 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 04:18:19 +00:00
Cameron Zwarich
141ec63962 Fix typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131519 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 02:29:50 +00:00
Cameron Zwarich
7d336c0c68 Fix more of PR8825 by correctly using rGPR registers when lowering atomic 
compare-and-swap intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131518 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 02:20:07 +00:00
Eli Friedman
ef819d0ed8 Start trying to make InstCombine preserve more debug info. The idea here is to set the debug location on the IRBuilder, which will be then right location in most cases. This should magically give many transformations debug locations, and fixing places which are missing a debug location will usually just means changing the code creating it to use the IRBuilder. 
As an example, the change to InstCombineCalls catches a common case where a call to a bitcast of a function is rewritten.

Chris, does this approach look reasonable?



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131516 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 01:28:27 +00:00
Eli Friedman
3e22cb9ec3 Use ReplaceInstUsesWith instead of replaceAllUsesWith where appropriate in instcombine. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131512 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 00:32:01 +00:00
Devang Patel
d80e8ed2fa Preseve line numbers while simplifying CFG. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131508 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 23:29:05 +00:00
Cameron Zwarich
d6ffcd88ba Actually, the address operand of the Thumb2 LDREX / STREX instructions *can* 
take r13, so we can just make it a GPR. This fixes PR8825.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131507 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 23:26:20 +00:00
Cameron Zwarich
3c60ff4f3d Correct a minor problem with the Thumb2 LDREX and STREX instruction encodings. They 
were marked as taking a tGPR when in reality they take an rGPR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131506 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 23:11:12 +00:00
Bill Wendling
f5c95b889f Conditionalize the format of the GCOV files by target type. Darwin uses the 4.2 
format.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131503 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 23:05:13 +00:00
Eli Friedman
9c4dae6b0b Make fast-isel miss counting in -stats and -fast-isel-verbose take terminators into account; since there are many fewer isel misses with recent changes, misses caused by terminators are more significant. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131502 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 23:02:10 +00:00
Dan Gohman
1b32896bd2 Misc. code cleanups. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131497 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 22:22:52 +00:00
Dan Gohman
71dc7c9d89 Misc. code cleanups. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131495 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 22:20:36 +00:00
Stuart Hastings
ca1ef48585 X86 pmovsx/pmovzx ignore the upper half of their inputs. 
rdar://problem/6945110


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131493 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 22:13:31 +00:00
Tanya Lattner
c81c9709ef vrev is incorrectly defined in the perfect shuffle table. The ordering is backwards (should be 0x3210 versus 0x1032) which exposed a bug when doing a shuffle on a 4xi16. I've attached a test case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131488 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 20:48:40 +00:00
Devang Patel
de98568bf8 Preserve line number information. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131482 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 20:00:02 +00:00
Devang Patel
d9b4996637 Set debug loc for new load instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131481 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 19:43:38 +00:00
Devang Patel
c9ea771cb8 Preserve line number information. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131480 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 19:43:06 +00:00
Mon P Wang
fee22869ca Enable autodetect of popcnt 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131476 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 18:33:37 +00:00
Eli Friedman
19515b4e52 Add x86 fast-isel for calls returning first-class aggregates. rdar://9435872. 
This is r131438 with a couple small fixes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131474 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 18:29:03 +00:00