Commit Graph

1150 Commits

Author SHA1 Message Date
Evan Cheng
3e2351fa2a Update test to reflect command line option name change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62836 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-23 05:45:31 +00:00
Dan Gohman
760f86f339 Don't create ISD::FNEG nodes after legalize if they aren't legal.
Simplify x+0 to x in unsafe-fp-math mode. This avoids a bunch of
redundant work in many cases, because in unsafe-fp-math mode,
ISD::FADD with a constant is considered free to negate, so the
DAGCombiner often negates x+0 to -0-x thinking it's free, when
in reality the end result is -x, which is more expensive than x.

Also, combine x*0 to 0.

This fixes PR3374.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62789 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-22 21:58:43 +00:00
Devang Patel
5e3c013f81 Do not use buggy llvm-gcc to generate testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62770 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-22 18:28:11 +00:00
Bill Wendling
708f5a8fb6 Now with RUN line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62716 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 21:28:03 +00:00
Bill Wendling
e3b014a05f Run this through -simplifycfg and -mem2reg to test only what we need to test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62714 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 21:02:27 +00:00
Dan Gohman
764fd0cbc8 Simplify ReduceLoadWidth's logic: it doesn't need several different
special cases after producing the new reduced-width load, because the
new load already has the needed adjustments built into it. This fixes
several bugs due to the special cases, including PR3317.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62692 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 15:17:51 +00:00
Dan Gohman
1ef4d8f7ee Fix a recent regression. ClrOpcode is not set for i8; for i8, if
we want to clear %ah to zero before a division, just use a
zero-extending mov to %al. This fixes PR3366.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62691 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 14:50:16 +00:00
Evan Cheng
aaf414c92c Favors generating "not" over "xor -1". For example.
unsigned test(unsigned a) {
  return ~a;
}
llvm used to generate:
movl    $4294967295, %eax
xorl    4(%esp), %eax

Now it generates:
movl      4(%esp), %eax
notl      %eax

It's 3 bytes shorter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62661 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 02:09:05 +00:00
Owen Anderson
6cf7c390ec Be more aggressive about renumbering vregs after splitting them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62639 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 00:13:28 +00:00
Evan Cheng
a894ae130b Fix PR3243: a LiveVariables bug. When HandlePhysRegKill is checking whether the last reference is also the last def (i.e. dead def), it should also check if last reference is the current machine instruction being processed. This can happen when it is processing a physical register use and setting the current machine instruction as sub-register's last ref.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62617 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-20 21:25:12 +00:00
Evan Cheng
c99031b02a Add test case for PR3154.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62604 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-20 19:29:54 +00:00
Bill Wendling
20394494cc Testcase for limited precision stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62572 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-20 06:23:59 +00:00
Dan Gohman
f5add58549 Fix a dagcombine to not generate loads of non-round integer types,
as its comment says, even in the case where it will be generating
extending loads. This fixes PR3216.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62557 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-20 01:06:45 +00:00
Evan Cheng
d0deec20f6 Make linear scan's trivial coalescer slightly more aggressive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62547 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-20 00:16:18 +00:00
Dale Johannesen
549170206e Move & restructure test per review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62538 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-19 22:33:12 +00:00
Dan Gohman
dbe664adcd Fix SelectionDAG::ReplaceAllUsesWith to behave correctly when
uses are added to the From node while it is processing From's
use list, because of automatic local CSE. The fix is to avoid
visiting any new uses.

Fix a few places in the DAGCombiner that assumed that after
a RAUW call, the From node has no users and may be deleted.

This fixes PR3018.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62533 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-19 21:44:21 +00:00
Dale Johannesen
1f54f58e64 compile-time fmod was done incorrectly. PR 3316.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62528 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-19 21:17:05 +00:00
Evan Cheng
2722e7b139 DIVREM isel deficiency: If sign bit is known zero, zero out DX/EDX/RDX instead of sign extending the low part (in AX/EAX/RAX) into it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62519 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-19 19:06:11 +00:00
Evan Cheng
a06ec9efe1 Now not UINT_TO_FP is legal (it's marked custom), dag combiner won't
optimize it to a SINT_TO_FP when the sign bit is known zero. X86 isel should perform the optimization itself.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62504 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-19 08:08:22 +00:00
Chris Lattner
d62284a804 Fix rdar://6505632, an llc crash on 483.xalancbmk
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62470 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-18 20:35:00 +00:00
Bill Wendling
959fb88949 Testcase for last commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62418 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-17 07:42:44 +00:00
Evan Cheng
8e27826649 Fix MatchAddress bug that's preventing negative displacement from being folded in 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62413 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-17 07:09:27 +00:00
Mon P Wang
7ac9cdfc99 Simplify extract element of a scalar to vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62383 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-17 00:07:25 +00:00
Dan Gohman
3326f16036 Disable the post-RA scheduler on this test, since it uses a
simple %prcontext which doesn't find what it's looking for
if the scheduler has rearranged the instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62363 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-16 21:40:12 +00:00
Evan Cheng
e57187cbe3 CreateVirtualRegisters does trivial copy coalescing. If a node def is used by a single CopyToReg, it reuses the virtual register assigned to the CopyToReg. This won't work for SDNode that is a clone or is itself cloned. Disable this optimization for those nodes or it can end up with non-SSA machine instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62356 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-16 20:57:18 +00:00
Bill Wendling
64e87326d9 Add support for non-zero __builtin_return_address values on X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62338 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-16 19:25:27 +00:00
Mon P Wang
fa9c5eac33 Added missing support to widen an operand from a bit convert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62285 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 22:43:38 +00:00
Mon P Wang
f0fcdd8e26 Expand insert/extract of a <4 x i32> with a variable index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62281 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 21:10:20 +00:00
Rafael Espindola
bb46f52027 Add the private linkage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62279 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 20:18:42 +00:00
Dan Gohman
f31408d75c Disable the register+memory forms of the bt instructions for now. Thanks
to Eli for pointing out that these forms don't ignore the high bits of
their index operands, and as such are not immediately suitable for use
by isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62194 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 23:23:30 +00:00
Duncan Sands
2ecf88d175 When replacing uses and the same node is reached
via two paths, process it once not twice, d'oh!
Analysis, testcase and original patch thanks to
Mon Ping Wang.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62169 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 15:17:14 +00:00
Evan Cheng
1d8a76d7d5 FIX llvm-gcc bootstrap on x86_64 linux. If a virtual register is copied to a physical register, it's not necessarily defined by a copy. We have to watch out it doesn't clobber any sub-register that might be live during its live interval. If the live interval crosses a basic block, then it's not safe to check with the less conservative check (by scanning uses and defs) because it's possible a sub-register might be live out of the block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62144 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 03:57:45 +00:00
Devang Patel
6fbbe4390b Use DebugInfo interface to lower dbg_* intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62126 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 00:32:17 +00:00
Evan Cheng
c29a56dedb Fix PR3241: Currently EmitCopyFromReg emits a copy from the physical register to a virtual register unless it requires an expensive cross class copy. That means we are only treating "expensive to copy" register dependency as physical register dependency.
Also future proof the scheduler to handle "normal" physical register dependencies. The code is not exercised yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62074 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-12 03:19:55 +00:00
Evan Cheng
5c30667af9 This is a dup of pr2659.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62029 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-10 19:06:32 +00:00
Evan Cheng
5c3c5a4d9c Duplicated node may produce a non-physical register def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62015 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-09 22:44:02 +00:00
Evan Cheng
0cb24f8131 Add test case from PR2659.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62006 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-09 21:01:31 +00:00
Dan Gohman
b24380804c PR2659 was fixed by r61847. Add the testcase as a regression test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61986 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-09 08:16:12 +00:00
Evan Cheng
8f90b6eb2f The coalescer does not coalesce a virtual register to a physical register if any of the physical register's sub-register live intervals overlaps with the virtual register. This is overly conservative. It prevents a extract_subreg from being coalesced away:
v1024 = EDI  // not killed
      =
      = EDI

One possible solution is for the coalescer to examine the sub-register live intervals in the same manner as the physical register. Another possibility is to examine defs and uses (when needed) of sub-registers. Both solutions are too expensive. For now, look for "short virtual intervals" and scan instructions to look for conflict instead.

This is a small win on x86-64. e.g. It shaves 403.gcc by ~80 instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61847 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-07 02:08:57 +00:00
Chris Lattner
d37eaa3b97 add a testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61845 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-07 01:48:08 +00:00
Dan Gohman
fbb7486560 Add patterns to match conditional moves with loads folded
into their left operand, rather than their right. Do this
by commuting the operands and inverting the condition.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61842 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-07 01:00:24 +00:00
Dan Gohman
653456c351 X86_COND_C and X86_COND_NC are alternate mnemonics for
X86_COND_B and X86_COND_AE, respectively.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61835 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-07 00:15:08 +00:00
Dan Gohman
0a79a2f8b0 Now that fold-pcmpeqd-0.ll is effectively testing that scheduling helps
avoid the need for spilling, add a new testcase that tests that the
pcmpeqd used for V_SETALLONES is changed to a constant-pool load as
needed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61831 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-06 23:48:10 +00:00
Dan Gohman
cca2983291 Revert r42653 and forward-port the code that lets INC64_32r be
converted to LEA64_32r in x86's convertToThreeAddress. This
replaces code like this:
   movl  %esi, %edi
   inc   %edi
with this:
   lea   1(%rsi), %edi
which appears to be beneficial.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61830 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-06 23:34:46 +00:00
Dan Gohman
fd2163bcf7 Use a latency value of 0 for the artificial edges inserted by
AddPseudoTwoAddrDeps. This lets the scheduling infrastructure
avoid recalculating node heights. In very large testcases this
was a major bottleneck. Thanks to Roman Levenstein for finding
this!

As a side effect, fold-pcmpeqd-0.ll is now scheduled better
and it no longer requires spilling on x86-32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61778 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-06 01:19:04 +00:00
Evan Cheng
7e66c0d43a Find loop back edges only after empty blocks are eliminated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61752 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-05 21:17:27 +00:00
Dan Gohman
cc91d63ab7 Fix a DAGCombiner abort on an invalid shift count constant. This fixes PR3250.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61613 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-03 19:22:06 +00:00
Evan Cheng
ccb6976a69 Do not isel load folding bt instructions for pentium m, core, core2, and AMD processors. These are significantly slower than a load followed by a bt of a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61557 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-02 05:35:45 +00:00
Evan Cheng
52ceafa5c7 Use movaps / movd to extract vector element 0 even with sse4.1. It's still cheaper than pextrw especially if the value is in memory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61555 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-02 05:29:08 +00:00
Chris Lattner
1323e8bf6a add PR #
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61427 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-25 05:40:38 +00:00