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52 Commits

Author SHA1 Message Date
Bob Wilson
6c4c982f83 Add support for NEON VLD3-dup instructions. 
The encoding for alignment in VLD4-dup instructions is still a work in progress.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120356 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-30 00:00:35 +00:00
Bob Wilson
86c6d80a7a Add support for NEON VLD3-dup instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120312 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 19:35:29 +00:00
Bob Wilson
b1dfa7a8e0 Add support for NEON VLD2-dup instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120236 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-28 06:51:26 +00:00
Bob Wilson
2a0e97431e Add NEON VLD1-dup instructions (load 1 element to all lanes). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120194 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-27 06:35:16 +00:00
Benjamin Kramer
7920d96964 Avoid release build warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119804 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-19 16:36:02 +00:00
Anton Korobeynikov
d0c3817669 Move hasFP() and few related hooks to TargetFrameInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119740 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-18 21:19:35 +00:00
Bill Wendling
73fe34a3ee Encode the multi-load/store instructions with their respective modes ('ia', 
'db', 'ib', 'da') instead of having that mode as a separate field in the
instruction. It's more convenient for the asm parser and much more readable for
humans.
<rdar://problem/8654088>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119310 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-16 01:16:36 +00:00
Evan Cheng
63f3544a7f Add conditional move of large immediate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118968 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-13 02:25:14 +00:00
Evan Cheng
893d7fe209 Eliminate ARM::MOVi2pieces. Just use MOVi32imm and expand it to either movi+orr or movw+movt depending on the subtarget. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118938 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-12 23:03:38 +00:00
Bob Wilson
d0c6bc2204 Add NEON VST1-lane instructions. Partial fix for Radar 8599955. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118069 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 21:18:25 +00:00
Bob Wilson
b796bbb6de Add NEON VLD1-lane instructions. Partial fix for Radar 8599955. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117964 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 22:04:05 +00:00
Jim Grosbach
8e0a3eb957 Convert ARM::MOVi2pieces to a true pseudo-instruction and expand it in 
the ARMExpandPseudos pass rather than during the asm lowering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117714 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 21:35:25 +00:00
Chandler Carruth
100c267249 Switch attribute macros to use 'LLVM_' as a prefix. We retain the old names 
until other LLVM projects using these are cleaned up.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117200 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-23 08:10:43 +00:00
Duncan Sands
dbbd99faf1 The return value of this call is not used, so no point 
in assigning it to a variable (gcc-4.6 warning).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117024 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 16:06:28 +00:00
Jim Grosbach
b8e67fc92b Fix backwards conditional. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116897 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-20 01:10:01 +00:00
Jim Grosbach
8b95c3ebfb Add dynamic realignment when rematerializing the base register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116886 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-20 00:02:50 +00:00
Jim Grosbach
e4ad387a5a Add a pre-dispatch SjLj EH hook on the unwind edge for targets to do any 
setup they require. Use this for ARM/Darwin to rematerialize the base
pointer from the frame pointer when required. rdar://8564268

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116879 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-19 23:27:08 +00:00
Bob Wilson
01b35c25de Use simple RegState::Define flag instead of getDefRegState(true). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116601 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 18:25:59 +00:00
Jim Grosbach
6bdc8ae291 When expanding the MOVsr[la]_flag pseudos, the CPSR implicit def becomes 
an explicit def. Make sure to capture that properly. rdar://8556556

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116591 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 17:35:17 +00:00
Jim Grosbach
7032f922b1 Refactor the MOVsr[al]_flag and RRX pseudo-instructions to really be pseudos 
and let the ARMExpandPseudoInsts pass fix them up into the real (MOVs)
instruction form.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116534 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 22:57:13 +00:00
Jim Grosbach
65dc30340c Change the NEON VDUPfdf and VDUPfqf pseudo-instructions to actually be 
pseudo instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115840 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-06 21:16:16 +00:00
Bob Wilson
823611bfba When expanding ARM pseudo registers, copy the existing predicate operands 
instead of using default predicates on the expanded instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114066 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 04:25:37 +00:00
Bob Wilson
ea606bb76b Add missing break. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114048 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 00:31:32 +00:00
Bob Wilson
9d4ebc0eb8 Change VLDMQ and VSTMQ to be pseudo instructions. They are expanded after 
register allocation to VLDMD and VSTMD respectively.  This avoids using the
dregpair operand modifier.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114047 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 00:31:02 +00:00
Bob Wilson
fe3ac088ee Avoid warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113857 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-14 21:12:05 +00:00
Bob Wilson
bd916c54b7 Convert some VTBL and VTBX instructions to use pseudo instructions prior to 
register allocation.  Remove the NEONPreAllocPass, which is no longer needed.
Yeah!!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113818 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-13 23:55:10 +00:00
Bob Wilson
8466fa1842 Switch all the NEON vld-lane and vst-lane instructions over to the new 
pseudo-instruction approach.  Change ARMExpandPseudoInsts to use a table
to record all the NEON load/store information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113812 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-13 23:01:35 +00:00
Bob Wilson
19d644d5a9 For double-spaced VLD3/VLD4 instructions, copy the explicit super-register use 
operand from the pseudo instruction to the new instruction as an implicit use.
This will preserve any other flags (e.g., kill) on the operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113456 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-09 00:38:32 +00:00
Bob Wilson
63569c99ec Simplify copying over operands from pseudo NEON load/store instructions. 
For VLD3/VLD4 with double-spaced registers, add the implicit use of the
super register for both the instruction loading the even registers and the
instruction loading the odd registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113452 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-09 00:15:32 +00:00
Bob Wilson
656edcf138 Clean up a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113442 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 23:39:54 +00:00
Bob Wilson
f572191fe4 Finish converting the rest of the NEON VLD instructions to use pseudo- 
instructions prior to regalloc.  Since it's getting a little close to
the 2.8 branch deadline, I'll have to leave the rest of the instructions
handled by the NEONPreAllocPass for now, but I didn't want to leave half
of the VLD instructions converted and the other half not.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112983 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-03 18:16:02 +00:00
Bob Wilson
82a9c8480e Fill in a missing comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112826 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-02 16:17:29 +00:00
Bob Wilson
ffde080ae6 Convert VLD1 and VLD2 instructions to use pseudo-instructions until 
after regalloc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112825 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-02 16:00:54 +00:00
Anton Korobeynikov
6d1e29d2f2 Expand MOVi32imm in ARM mode after regalloc. This provides 
scheduling opportunities (extra instruction can go in between
MOVT / MOVW pair removing the stall).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112546 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-30 22:50:36 +00:00
Bob Wilson
7e701979ad When expanding NEON VST pseudo instructions, if the original super-register 
operand is killed, add it to the expanded instruction as an implicit kill
operand instead of marking the individual subregs with kill flags.  This
should work better in general and also handles the case for VST3 where one
of the subregs was not referenced in the expanded instruction and so was
not marked killed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112494 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-30 18:10:48 +00:00
Bob Wilson
e5ce4f68c7 Use pseudo instructions for VST1 and VST2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112357 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-28 05:12:57 +00:00
Bob Wilson
01ba461af7 Use pseudo instructions for VST3. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112208 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-26 18:51:29 +00:00
Bob Wilson
70e48b23a3 Use pseudo instructions for VST1d64Q. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112170 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-26 05:33:30 +00:00
Bob Wilson
709d59255a Start converting NEON load/stores to use pseudo instructions, beginning here 
with the VST4 instructions.  Until after register allocation, we want to
represent sets of adjacent registers by a single super-register.  These
VST4 pseudo instructions have a single QQ or QQQQ source register operand.
They get expanded to the real VST4 instructions with 4 separate D register
operands.  Once this conversion is complete, we'll be able to remove the
NEONPreAllocPass and avoid some fragile and hacky code elsewhere.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112108 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-25 23:27:42 +00:00
Owen Anderson
90c579de5a Reapply r110396, with fixes to appease the Linux buildbot gods. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110460 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-06 18:33:48 +00:00
Owen Anderson
1f74590e9d Revert r110396 to fix buildbots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110410 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-06 00:23:35 +00:00
Owen Anderson
9ccaf53ada Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static 
ID member as the sole unique type identifier.  Clean up APIs related to this change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110396 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-05 23:42:04 +00:00
Chris Lattner
4dbbe3433f prune #includes a little. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108929 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 21:17:29 +00:00
Jim Grosbach
18f30e6f5e Clean up 80 column violations. No functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105350 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 21:53:11 +00:00
Jakob Stoklund Olesen
558661d271 Switch ARMRegisterInfo.td to use SubRegIndex and eliminate the parallel enums 
from ARMRegisterInfo.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104508 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-24 16:54:32 +00:00
Evan Cheng
d929f77738 Expand VMOVQQ into a pair of VMOVQ. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103684 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-13 00:17:02 +00:00
Evan Cheng
431300797b Fix some potential issues in the pseudo instruction expansion phase: copy implicit operands and memoperands. Also, expand instructions even if their defs are "dead" since they may have implicit kill operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103667 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-12 23:13:12 +00:00
Evan Cheng
a4d73d01c4 Remove a dead fixme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103642 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-12 20:20:22 +00:00
Dan Gohman
46510a73e9 Add const qualifiers to CodeGen's use of LLVM IR constructs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101334 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-15 01:51:59 +00:00
Chris Lattner
7896c9f436 improve portability to avoid conflicting with std::next in c++'0x. 
Patch by Howard Hinnant!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90365 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-03 00:50:42 +00:00