Commit Graph

9699 Commits

Author SHA1 Message Date
Chris Lattner
438949aa9d fold immediates into stores in simple cases, this produces diffs like
this:

-	movl	$0, %eax
-	movl	%eax, _yy_n_chars
+	movl	$0, _yy_n_chars




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57555 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-15 05:30:52 +00:00
Chris Lattner
d53886bb48 fold compare of null pointer into compare with 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57553 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-15 05:18:04 +00:00
Chris Lattner
160f6cc209 Some minor cleanups:
1. Compute action in X86SelectSelect based on MVT instead of type.
2. Use TLI.getValueType(..) instead of MVT::getVT(..) because the former
   handles pointers and the later doesn't.
3. Don't pass TLI into isTypeLegal, since it already has access to it as 
   an ivar.

#2 gives fast isel some minor new functionality: handling load/stores of
pointers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57552 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-15 05:07:36 +00:00
Chris Lattner
45ac17f521 Use switch on VT instead of Type* comparisons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57551 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-15 04:32:45 +00:00
Chris Lattner
51ccb3deba Use X86FastEmitCompare for FCMP_OEQ and FCMP_UNE: it doesn't
change the generated code, but makes the code simpler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57550 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-15 04:29:23 +00:00
Chris Lattner
9a08a61d79 refactor compare emission out into a new X86FastEmitCompare method,
which makes it easy to share the compare/imm folding logic with 'setcc'.
This shaves a bunch of instructions off the common select case, which
happens a lot in llvm-gcc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57549 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-15 04:26:38 +00:00
Chris Lattner
0e13c78347 Fold immediates into compares when possible, producing "cmp $4, %eax" instead of
loading 4 into a register and then doing the compare.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57548 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-15 04:13:29 +00:00
Chris Lattner
709d829d3c more minor refactoring of X86SelectBranch, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57547 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-15 04:02:26 +00:00
Chris Lattner
871d246fd4 factor buildmi calls in X86SelectBranch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57546 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-15 03:58:05 +00:00
Chris Lattner
8aeeeb9d24 factor some more BuildMI's in X86SelectCmp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57545 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-15 03:52:54 +00:00
Chris Lattner
54aebde0be factor some BuildMI calls, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57544 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-15 03:47:17 +00:00
Evan Cheng
7f04268176 - Add target lowering hooks that specify which setcc conditions are illegal,
i.e. conditions that cannot be checked with a single instruction. For example,
SETONE and SETUEQ on x86.
- Teach legalizer to implement *illegal* setcc as a and / or of a number of
legal setcc nodes. For now, only implement FP conditions. e.g. SETONE is
implemented as SETO & SETNE, SETUEQ is SETUO | SETEQ.
- Move x86 target over.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57542 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-15 02:05:31 +00:00
Dan Gohman
dd5b58ad7b FastISel support for exception-handling constructs.
- Move the EH landing-pad code and adjust it so that it works
   with FastISel as well as with SDISel.
 - Add FastISel support for @llvm.eh.exception and
   @llvm.eh.selector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57539 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-14 23:54:11 +00:00
Dale Johannesen
2194d46624 Accept -march=i586, because gcc does (a synonym
for pentium).  Fixes
gcc.target/i386/20000720-1.c
gcc.target/i386/pr26826.c



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57528 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-14 22:06:33 +00:00
Evan Cheng
0329466b6b Rename LoadX to LoadExt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57526 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-14 21:26:46 +00:00
Jim Grosbach
2642196a65 Update ARM Insn encoding to get endian-ness to match the documentation (31-0 left to right)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57524 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-14 20:36:24 +00:00
Dan Gohman
b8cab9227a Fix command-line option printing to print two spaces where needed,
instead of requiring all "short description" strings to begin with
two spaces. This makes these strings less mysterious, and it fixes
some cases where short description strings mistakenly did not
begin with two spaces.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57521 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-14 20:25:08 +00:00
Evan Cheng
552e3be775 Fix indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57508 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-14 17:15:39 +00:00
Dan Gohman
7b8e96401c When doing the very-late shift-and address-mode optimization,
create a new DAG node to represent the new shift to keep the
DAG consistent, even though it'll almost always be folded into
the address.

If a user of the resulting address has multiple uses, the
nodes may get revisited by a later MatchAddress call, in which
case DAG inconsistencies do matter.

This fixes PR2849.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57465 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-13 20:52:04 +00:00
Anton Korobeynikov
d21a6305ea Update size of inst correctly with segment override.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57414 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-12 10:30:11 +00:00
Chris Lattner
e563bbc312 Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's as
parameters instead of raw Constants.  This prevents the constants from
being selected by the isel pass, fixing PR2735.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57385 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-11 22:08:30 +00:00
Duncan Sands
a4bb48adc3 Fix comment typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57381 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-11 19:34:24 +00:00
Anton Korobeynikov
ef93cecd80 Add ability to override segment (mostly for code emitter purposes).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57380 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-11 19:09:15 +00:00
Dale Johannesen
e397acce9d Fix SSE4.1 roundss, roundsd. While the instructions have
the same pattern as roundpd/roundps, the Intel compiler 
builtins do not:  rounds* has an extra operand.  Fixes
gcc.target/i386/sse4_1-rounds[sd]-[1234].c



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57370 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10 23:51:03 +00:00
Anton Korobeynikov
875314bb52 Fix a thinko and unbreak sparc default CC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57368 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10 21:47:37 +00:00
Anton Korobeynikov
df75bbae94 Extend set of return registers on sparc until someone will implement MRV support there. At least, this will allow libgcc compile, however we are not ABI-compatible with stuff compiled with native gcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57364 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10 20:30:14 +00:00
Anton Korobeynikov
4cf5e2eb6c Ignore extra 'r' modifier for now
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57363 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10 20:29:50 +00:00
Anton Korobeynikov
4b58b6a5b4 Use expand for smul_lohi for now
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57362 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10 20:29:31 +00:00
Anton Korobeynikov
0eefda1335 Add rudimentary support for 'r' register operand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57359 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10 20:28:10 +00:00
Anton Korobeynikov
53835708e1 Cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57358 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10 20:27:31 +00:00
Anton Korobeynikov
f369330c2d Add rudimentary asmprinter support for printing inline asm operands for sparc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57346 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10 10:15:03 +00:00
Anton Korobeynikov
2fcfd83cb4 Add dummy 'm' inline asm constraint handler for Sparc. I'm not sure, whether it is correct, however :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57345 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10 10:14:47 +00:00
Anton Korobeynikov
a43e51d0fe Cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57344 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10 10:14:15 +00:00
Dale Johannesen
23a98551ab Add a "loses information" return value to APFloat::convert
and APFloat::convertToInteger.  Restore return value to
IEEE754.  Adjust all users accordingly.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57329 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-09 23:00:39 +00:00
Dale Johannesen
7111b02c73 Rename APFloat::convertToAPInt to bitcastToAPInt to
make it clearer what the function does.  No functional
change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57325 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-09 18:53:47 +00:00
Chris Lattner
d2a27ee974 get CodeGen/Alpha/mul128.ll to work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57318 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-09 04:50:56 +00:00
Dale Johannesen
585457e37e (re)Put const weak strings in appropriate section on Darwin.
g++dg/abi/key2.C



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57309 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-08 21:49:47 +00:00
Jim Grosbach
309c80adb5 Comment to be explicit that the enumeration values for CondCodes matter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57295 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-08 16:24:35 +00:00
Duncan Sands
43d9c8cd56 Use template to distinguish between function variants.
GCC 4.4.0 gives an error on the "int" declaration for example
saying that it has already been declared (using the "short"
one). Using templates here allow the compiler to distinguish
between the function to choose.

Also, "llvm/Support/DataTypes.h" was not included, leading to
error messages about not knowing "uint32_t" for example.

Patch by Samuel Tardieu.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57292 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-08 07:44:52 +00:00
Duncan Sands
4520dd2b7b Add <cstdio> include where needed by gcc-4.4.
Patch by Samuel Tardieu.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57291 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-08 07:23:46 +00:00
Dan Gohman
8c3f8b6dea Add MBB successors and physreg Uses in the same order that
SDISel typically adds them in. This makes it a little easier
to compare FastISel output with SDISel output.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57266 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07 22:10:33 +00:00
Dan Gohman
145b828014 Instead of emitting an implicit use for the super-register of
X86::CL that was used, emit an EXTRACT_SUBREG from the CL
super-register to CL. This more precisely describes how the
CL register is being used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57264 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07 21:50:36 +00:00
Jim Grosbach
76e9661b6c Unconditional branch instruction encoding fix. Needs to use ABI, not AXI, to get the proper opcode bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57262 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07 21:08:09 +00:00
Jim Grosbach
cbc47b8934 need ARM.h for ARMCC definition
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57261 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07 21:01:51 +00:00
Owen Anderson
95dad830bb Add an option to enable StrongPHIElimination, for ease of testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57259 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07 20:22:28 +00:00
Jim Grosbach
3341262de2 Encode the conditional execution predicate when JITing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57258 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07 19:05:35 +00:00
Dale Johannesen
2cb48eaeb8 Model hardwired inputs & outputs of x86 8-bit divides correctly.
Fixes local RA miscompilation of gcc.c-torture/execute/20020904-1.c -O0.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57257 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07 18:54:28 +00:00
Jim Grosbach
9e729a2de5 Clarify naming and correct conditional so that CMP and CMN instructions get the Rn operand encoded properly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57252 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07 17:42:09 +00:00
Jim Grosbach
17a415a4f2 Fix Opcode values of CMP and CMN
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57251 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07 17:40:46 +00:00
Anders Carlsson
ae436cecca Certain patterns involving the "movss" instruction were marked as requiring SSE2, when in reality movss is an SSE1 instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57246 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07 16:14:11 +00:00