Commit Graph

2034 Commits

Author SHA1 Message Date
Duncan Sands
06f0aff69e Add a bunch of libcalls for ppcf128 that were somehow
completely forgotten about when writing LegalizeTypes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58508 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-31 14:06:52 +00:00
Dan Gohman
d17cfbe1ca Use MOVSSmr instead of EXTRACTPSmr in the case of extracting
vector element 0 for a store, as it's smaller and faster.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58483 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-31 00:57:24 +00:00
Duncan Sands
d383ff313b Testcase for PR2986.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58456 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-30 20:34:30 +00:00
Scott Michel
d976c21241 Resolve bug 2947: vararg-marked functions must spill registers R3-R79 to stack
so that va_start/va_arg/et.al. will walk arguments correctly for Cell SPU.

N.B.: Because neither clang nor llvm-gcc-4.2 can be built for CellSPU, this is
still unexorcised code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58415 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-30 01:51:48 +00:00
Chris Lattner
db97348400 add testcase for PR2964
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58393 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-29 18:42:22 +00:00
Duncan Sands
21c2972f7d Fix PR2977: LegalizeTypes support for expanding
VAARG.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58379 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-29 14:25:28 +00:00
Evan Cheng
5489893867 - More pre-split fixes: spill slot live interval computation bug; restore point bug.
- If a def is spilt, remember its spill index to allow its reuse.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58375 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-29 08:39:34 +00:00
Duncan Sands
57760d96e2 Fix darwin ppc llvm-gcc build breakage: intercept
ppcf128 to i32 conversion and expand it into a code
sequence like in LegalizeDAG.  This needs custom
ppc lowering of FP_ROUND_INREG, so turn that on and
make it work with LegalizeTypes.  Probably PPC should
simply custom lower the original conversion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58329 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-28 15:00:32 +00:00
Duncan Sands
42d4499a16 Turn off LegalizeTypes for this test for the
moment, while waiting for a proper solution.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58324 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-28 09:55:04 +00:00
Duncan Sands
1acb29c8ea Fix a testcase provided by Bill in which the node
id could end up being wrong mostly because of
forgetting to remap new nodes that morphed into
processed nodes through CSE.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58323 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-28 09:38:36 +00:00
Chris Lattner
4002a1b6f1 Fix a nasty miscompilation of 176.gcc on linux/x86 where we synthesized
a memset using 16-byte XMM stores, but where the stack realignment code
didn't work.  Until it does (PR2962) disable use of xmm regs in memcpy
and memset formation for linux and other targets with insufficiently
aligned stacks.

This is part of PR2888



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58317 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-28 05:49:35 +00:00
Evan Cheng
f62ce370a4 Avoid putting a split past the end of the live range; always shrink wrap live interval in the barrier mbb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58309 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-28 00:47:49 +00:00
Evan Cheng
b3990d5e94 Remove val# defined by a remat'ed def that is now dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58294 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-27 23:21:01 +00:00
Chris Lattner
4af2c40c63 rename vec_spat -> vec_splat, pointed out by duncan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58260 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-27 18:28:24 +00:00
Duncan Sands
7cb07874dc Turn on LegalizeTypes, the new type legalization
codegen infrastructure, by default.  Please report
any breakage to the mailing lists.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58232 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-27 08:42:46 +00:00
Evan Cheng
23066288fd For now, don't split live intervals around x87 stack register barriers. FpGET_ST0_80 must be right after a call instruction (and ADJCALLSTACKUP) so we need to find a way to prevent reload of x87 registers between them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58230 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-27 07:14:50 +00:00
Chris Lattner
629b52697b remove eh output from this test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58196 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-26 18:53:07 +00:00
Evan Cheng
aaf510c932 Do not shrink wrap live interval in a mbb if it's livein any of its successor blocks. The mbb can be revisited again after all of the successors are processed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58184 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-26 07:49:03 +00:00
Evan Cheng
79d5b5acae Handle cases where there aren't uses in the barrier mbb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58174 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-25 23:49:39 +00:00
Gordon Henriksen
a2cbe6c5b5 Related to PR2911, reject as invalid non-pointer GC roots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58143 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-25 16:28:35 +00:00
Evan Cheng
78dfef771b If val# def is ~0U, meaning it's defined by a PHI, and it's previously split, spill before the barrier because it's impossible to determine if all the defs are spilled in the same spill slot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58129 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-25 00:52:41 +00:00
Dale Johannesen
47106ba658 Be kind to non-x86 hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58113 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-24 21:20:25 +00:00
Duncan Sands
4047f4a0b4 Fix translateX86CC: if SetCCOpcode is SETULE and
LHS is a foldable load, then LHS and RHS are swapped
and SetCCOpcode is changed to SETUGT.  But the later
code is expecting operands to be the wrong way round
for SETUGT, but they are not in this case, resulting
in an inverted compare.  The solution is to move the
load normalization before the correction for SETUGT.
This bug was tickled by LegalizeTypes which happened
to legalize the testcase slightly differently to
LegalizeDAG.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58092 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-24 13:03:10 +00:00
Evan Cheng
06587497dc Avoid splitting an interval multiple times; avoid splitting re-materializable val# (for now).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58068 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-24 02:05:00 +00:00
Chris Lattner
aecc22a7b8 Fix PR2907 by digging through constant expressions to find FP constants that
are their operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57956 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-22 04:53:16 +00:00
Dan Gohman
7ea1ca6229 Fix SelectionDAGBuild lowering of Select instructions to
handle first-class aggregate values. Also, fix a bug in
the Ret handling for empty aggregates.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57925 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-21 20:00:42 +00:00
Chris Lattner
7fb501c9cd really fix run line
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57889 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-21 03:55:19 +00:00
Chris Lattner
0294ac2e9a fix run line
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57888 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-21 03:54:49 +00:00
Chris Lattner
402135f9e9 remove some unneeded eh generation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57887 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-21 03:49:19 +00:00
Dan Gohman
4401361a2f Don't create TargetGlobalAddress nodes with offsets that don't fit
in the 32-bit signed offset field of addresses. Even though this
may be intended, some linkers refuse to relocate code where the
relocated address computation overflows.

Also, fix the sign-extension of constant offsets to use the
actual pointer size, rather than the size of the GlobalAddress
node, which may be different, for example on x86-64 where MVT::i32
is used when the address is being fit into the 32-bit displacement
field.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57885 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-21 03:38:42 +00:00
Dan Gohman
279c22e6da Optimized FCMP_OEQ and FCMP_UNE for x86.
Where previously LLVM might emit code like this:

        ucomisd %xmm1, %xmm0
        setne   %al
        setp    %cl
        orb     %al, %cl
        jne     .LBB4_2

it now emits this:

        ucomisd %xmm1, %xmm0
        jne     .LBB4_2
        jp      .LBB4_2

It has fewer instructions and uses fewer registers, but it does
have more branches. And in the case that this code is followed by
a non-fallthrough edge, it may be followed by a jmp instruction,
resulting in three branch instructions in sequence. Some effort
is made to avoid this situation.

To achieve this, X86ISelLowering.cpp now recognizes FCMP_OEQ and
FCMP_UNE in lowered form, and replace them with code that emits
two branches, except in the case where it would require converting
a fall-through edge to an explicit branch.

Also, X86InstrInfo.cpp's branch analysis and transform code now
knows now to handle blocks with multiple conditional branches. It
uses loops instead of having fixed checks for up to two
instructions. It can now analyze and transform code generated
from FCMP_OEQ and FCMP_UNE.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57873 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-21 03:29:32 +00:00
Dan Gohman
3afda6e9d1 When the coalescer is doing rematerializing, have it remove
the copy instruction from the instruction list before asking the
target to create the new instruction. This gets the old instruction
out of the way so that it doesn't interfere with the target's
rematerialization code. In the case of x86, this helps it find
more cases where EFLAGS is not live.

Also, in the X86InstrInfo.cpp, teach isSafeToClobberEFLAGS to check
to see if it reached the end of the block after scanning each
instruction, instead of just before. This lets it notice when the
end of the block is only two instructions away, without doing any
additional scanning.

These changes allow rematerialization to clobber EFLAGS in more
cases, for example using xor instead of mov to set the return value
to zero in the included testcase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57872 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-21 03:24:31 +00:00
Chris Lattner
01426e1a27 Fix gcc.c-torture/compile/920520-1.c by inserting bitconverts
for strange asm conditions earlier.  In this case, we have a
double being passed in an integer reg class.  Convert to like
sized integer register so that we allocate the right number 
for the class (two i32's for the f64 in this case).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57862 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-21 00:45:36 +00:00
Chris Lattner
2a0b96c2c7 Reapply r57699 with a fix to not crash on asms with multiple results. Unlike
the previous patch this one actually passes make check.

"Fix PR2356 on PowerPC: if we have an input and output that are tied together
that have different sizes (e.g. i32 and i64) make sure to reserve registers for
the bigger operand."



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57771 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-18 18:49:30 +00:00
Dan Gohman
6520e20e4f Teach DAGCombine to fold constant offsets into GlobalAddress nodes,
and add a TargetLowering hook for it to use to determine when this
is legal (i.e. not in PIC mode, etc.)

This allows instruction selection to emit folded constant offsets
in more cases, such as the included testcase, eliminating the need
for explicit arithmetic instructions.

This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp
that attempted to achieve the same effect, but wasn't as effective.

Also, fix handling of offsets in GlobalAddressSDNodes in several
places, including changing GlobalAddressSDNode's offset from
int to int64_t.

The Mips, Alpha, Sparc, and CellSPU targets appear to be
unaware of GlobalAddress offsets currently, so set the hook to
false on those targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-18 02:06:02 +00:00
Dan Gohman
95915730de Revert r57699. It's causing regressions in
test/CodeGen/X86/2008-09-17-inline-asm-1.ll
and a few others, and it breaks the llvm-gcc build.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57747 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-18 01:03:45 +00:00
Evan Cheng
af42fe36ac Fix PR2898. Spiller delete a store for reuse before it knows for sure the reuse happened.
Patch by Lang Hames!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57720 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 20:56:41 +00:00
Chris Lattner
3d0c4c4657 Fix a bug where the x86 backend would reject 64-bit r constraints when
in 32-bit mode instead of assigning a register pair.  This has nothing to
do with PR2356, but I happened to notice it while working on it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57704 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 17:59:52 +00:00
Chris Lattner
0c52644cd8 Fix PR2356 on PowerPC: if we have an input and output that are tied together
that have different sizes (e.g. i32 and i64) make sure to reserve registers for
the bigger operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57699 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 17:52:49 +00:00
Chris Lattner
0f046c3c99 remove an xfailed test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57695 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 17:26:48 +00:00
Chris Lattner
42a3adc346 remove this test: it is xfailed anyway, and is failing for a reason
other than why it was xfailed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57694 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 17:26:19 +00:00
Evan Cheng
6784598895 Fix a very subtle spiller bug: UpdateKills should not forget to track defs of aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57673 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 06:16:07 +00:00
Dan Gohman
63f97201dc Fun x86 encoding tricks: when adding an immediate value of 128,
use a SUB instruction instead of an ADD, because -128 can be
encoded in an 8-bit signed immediate field, while +128 can't be.
This avoids the need for a 32-bit immediate field in this case.

A similar optimization applies to 64-bit adds with 0x80000000,
with the 32-bit signed immediate field.

To support this, teach tablegen how to handle 64-bit constants.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57663 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 01:33:43 +00:00
Dan Gohman
74feef261a Define patterns for shld and shrd that match immediate
shift counts, and patterns that match dynamic shift counts
when the subtract is obscured by a truncate node.

Add DAGCombiner support for recognizing rotate patterns
when the shift counts are defined by truncate nodes.

Fix and simplify the code for commuting shld and shrd
instructions to work even when the given instruction doesn't
have a parent, and when the caller needs a new instruction.

These changes allow LLVM to use the shld, shrd, rol, and ror
instructions on x86 to replace equivalent code using two
shifts and an or in many more cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57662 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 01:23:35 +00:00
Dan Gohman
c90a5c2878 Fix this test so it actually runs the grep lines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57653 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-16 23:57:54 +00:00
Duncan Sands
078ae1e6ee Testcase for PR2762.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57633 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-16 08:56:46 +00:00
Bill Wendling
eabb8866d8 Testcase for PR1638.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57590 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-15 18:27:15 +00:00
Evan Cheng
7f04268176 - Add target lowering hooks that specify which setcc conditions are illegal,
i.e. conditions that cannot be checked with a single instruction. For example,
SETONE and SETUEQ on x86.
- Teach legalizer to implement *illegal* setcc as a and / or of a number of
legal setcc nodes. For now, only implement FP conditions. e.g. SETONE is
implemented as SETO & SETNE, SETUEQ is SETUO | SETEQ.
- Move x86 target over.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57542 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-15 02:05:31 +00:00
Dan Gohman
7b8e96401c When doing the very-late shift-and address-mode optimization,
create a new DAG node to represent the new shift to keep the
DAG consistent, even though it'll almost always be folded into
the address.

If a user of the resulting address has multiple uses, the
nodes may get revisited by a later MatchAddress call, in which
case DAG inconsistencies do matter.

This fixes PR2849.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57465 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-13 20:52:04 +00:00
Evan Cheng
efa533957d FIX PR2794. Make sure SIGN_EXTEND_INREG nodes introduced by LegalizeSetCCOperands are leglized. Patch by Richard Pennington.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57460 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-13 18:46:18 +00:00