Stuart Hastings
03d5826164
Revert 127359; it broke lencod.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127382 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-10 00:25:53 +00:00
Daniel Dunbar
edfab0ca1e
Revert "Re-enable test and hope to silence the buildbots", still broken.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127369 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 22:48:46 +00:00
Benjamin Kramer
7bff3e7c1b
Fix mistyped CHECK lines.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127366 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 22:07:31 +00:00
Stuart Hastings
167831dcac
Tweak test to work on Linux.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127364 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 21:35:10 +00:00
Stuart Hastings
2f5443be11
Disable this test temporarily to reduce BuildBot complaints.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127363 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 21:33:47 +00:00
Stuart Hastings
2f26fa4838
X86 byval copies no longer always_inline. <rdar://problem/8706628>
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127359 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 21:10:30 +00:00
Bruno Cardoso Lopes
842db07c61
Add a testcase for the addc improvements introduced some commits ago. Patch by Akira Hatanaka
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127358 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 21:05:32 +00:00
Bruno Cardoso Lopes
2c19ed9d67
Re-enable test and hope to silence the buildbots
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127357 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 21:00:16 +00:00
Bruno Cardoso Lopes
557ce71ec9
try to make o32 cc tests less specific to silence some buildbots. The test isn't enabled yet, this is will be done in a subsequent commit. Patch by Akira Hatanaka.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127356 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 20:59:05 +00:00
Jakob Stoklund Olesen
5d96e5a1cc
Make physreg coalescing independent on the number of uses of the virtual register.
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The damage done by physreg coalescing only depends on the number of instructions
the extended physreg live range covers. This fixes PR9438.
The heuristic is still luck-based, and physreg coalescing really should be
disabled completely. We need a register allocator with better hinting support
before that is possible.
Convert a test to FileCheck and force spilling by inserting an extra call. The
previous spilling behavior was dependent on misguided physreg coalescing
decisions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127351 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 19:27:06 +00:00
Jakob Stoklund Olesen
dda386c44d
Delete a test case that is very sensitive to coalescer behavior.
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The test is derived from an old miscompilation of
MultiSource/Benchmarks/VersaBench/8b10b which is run regularly, so we are not
losing coverage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127350 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 19:27:02 +00:00
Bruno Cardoso Lopes
954dac0f88
Improve varags handling, with testcases. Patch by Sasa Stankovic
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127349 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 19:22:22 +00:00
Andrew Trick
5d332e0c3e
This test case should work with list-ilp or list-burr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127348 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 19:17:10 +00:00
NAKAMURA Takumi
3ca99435e9
Target/X86: Tweak va_arg for Win64 not to miss taking va_start when number of fixed args > 4.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127328 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 11:33:15 +00:00
Eric Christopher
e11128dd9d
Fix testcase.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127298 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 00:41:41 +00:00
Benjamin Kramer
e5ef311ee3
Strip cruft.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127269 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 20:19:10 +00:00
Eric Christopher
2b24e7f3df
Add a testcase for r127263.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127266 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 19:49:15 +00:00
Benjamin Kramer
c175a4bd7e
X86: Fix the (saddo/ssub x, 1) -> incl/decl selection to check the right operand for 1.
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Found by inspection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127247 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 15:20:20 +00:00
Justin Holewinski
c6f24f4086
PTX: Add intrinsic support for ntid, ctaid, and nctaid registers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127246 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 14:10:18 +00:00
Eric Christopher
7c2cdb1c05
Turn on list-ilp scheduling by default on x86 and x86-64, fix up
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testcases accordingly. Some are currently xfailed and will be filed
as bugs to be fixed or understood.
Performance results:
roughly neutral on SPEC
some micro benchmarks in the llvm suite are up between 100 and 150%, only
a pair of regressions that are due to be investigated
john-the-ripper saw:
10% improvement in traditional DES
8% improvement in BSDI DES
59% improvement in FreeBSD MD5
67% improvement in OpenBSD Blowfish
14% improvement in LM DES
Small compile time impact.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127208 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 02:42:25 +00:00
Bob Wilson
79f56c9618
Fix a compiler crash where a Glue value had multiple uses. Radar 9049552.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127198 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 01:17:20 +00:00
Che-Liang Chiou
0df2c50c2b
ptx: add basic intrinsic support
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127084 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-05 14:17:37 +00:00
NAKAMURA Takumi
89be0acecf
test/CodeGen/X86/vec_cast.ll: [PR8311] Add explicit -mtriple=x86_64-linux and -mtriple=x86_64-win32. Thanks to Nadav, it might be fixed in r126424.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127060 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-05 02:38:02 +00:00
Bruno Cardoso Lopes
38b5e86b9c
Improve div/rem node handling on mips. Patch by Akira Hatanaka
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127034 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-04 21:03:24 +00:00
Bruno Cardoso Lopes
650af5d0f8
Add testcase for r127032
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127033 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-04 20:48:39 +00:00
Dan Gohman
a7a841adb8
When decling to reuse existing expressions that involve casts, ignore
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bitcasts, which are really no-ops here. This fixes slowdowns on
MultiSource/Applications/aha and others.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127031 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-04 20:46:46 +00:00
Joerg Sonnenberger
89e0f386f3
Be nice to Xcore and the XMOS assembler and avoid quoting section names
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that contain only letters, digits and the characters "_" and ".".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127028 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-04 20:03:14 +00:00
Bruno Cardoso Lopes
ca8a2aa921
Lowers block address. Currently asserts when relocation model is not PIC. Patch by Akira Hatanaka
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127027 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-04 20:01:52 +00:00
Devang Patel
c8888c7d80
XFAIL for all. These tests are darwin specific anyway.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127022 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-04 19:38:10 +00:00
Devang Patel
53dc40a45f
Disable ARMGlobalMerge on darwin. The debugger is not yet able to extract individual variable's info from merged global.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127019 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-04 19:11:05 +00:00
Kalle Raiskila
31cbac1cfe
Allow vector shifts (shl,lshr,ashr) on SPU.
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There was a previous implementation with patterns that would
have matched e.g.
shl <v4i32> <i32>,
but this is not valid LLVM IR so they never were selected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126998 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-04 13:19:18 +00:00
Kalle Raiskila
7f5de8b4c6
Allow load from constant on SPU.
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A 'load <4 x i32>* null' crashes llc before this fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126995 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-04 12:00:11 +00:00
Eli Friedman
81c5ef8649
Revert r123908; the code in question is completely untested and wrong.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126964 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-03 22:33:23 +00:00
Joerg Sonnenberger
ea83b13350
Bug#9033: For the ELF assembler output, always quote the section name.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126963 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-03 22:31:08 +00:00
Stuart Hastings
44456e86c8
Test case for r126864. Radar 9056407.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126900 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-02 23:41:40 +00:00
David Greene
a20244d1ba
[AVX] Fix mask predicates for 256-bit UNPCKLPS/D and implement
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missing patterns for them.
Add a SIMD test subdirectory to hold tests for SIMD instruction
selection correctness and quality.
'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126845 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-02 17:23:43 +00:00
Cameron Zwarich
56e3793acf
Eliminate the unused CodeGenPrepare option to split critical edges.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126825 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-02 03:31:46 +00:00
Che-Liang Chiou
fd8978b021
Extend initial support for primitive types in PTX backend
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- Allow i16, i32, i64, float, and double types, using the native .u16,
.u32, .u64, .f32, and .f64 PTX types.
- Allow loading/storing of all primitive types.
- Allow primitive types to be passed as parameters.
- Allow selection of PTX Version and Shader Model as sub-target attributes.
- Merge integer/floating-point test cases for load/store.
- Use .u32 instead of .s32 to conform to output from NVidia nvcc compiler.
Patch by Justin Holewinski
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126824 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-02 03:20:28 +00:00
Dan Gohman
0cbe91ba3b
Don't re-use existing addrec expansions if they contain casts.
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This fixes PR9259.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126812 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-02 01:34:10 +00:00
Evan Cheng
f06e6c2ba7
Catch more cases where 2-address pass should 3-addressify instructions. rdar://9002648.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126811 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-02 01:08:17 +00:00
Bill Wendling
a656b63ee4
Narrow right shifts need to encode their immediates differently from a normal
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shift.
16-bit: imm6<5:3> = '001', 8 - <imm> is encded in imm6<2:0>
32-bit: imm6<5:4> = '01',16 - <imm> is encded in imm6<3:0>
64-bit: imm6<5> = '1', 32 - <imm> is encded in imm6<4:0>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126723 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-01 01:00:59 +00:00
Jakob Stoklund Olesen
bafd516d3e
Fix typo introduced by r126661: "Fix a typo which ..."
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126666 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-28 19:18:59 +00:00
Evan Cheng
c24ab5c654
Fix a typo which cause dag combine crash. rdar://9059537.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126661 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-28 18:45:27 +00:00
Duncan Sands
377ffe3b11
Windows codegen also dies on this, so restrict to the platform it was
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actually tested on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126652 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-28 14:22:08 +00:00
Duncan Sands
443612e165
Make this test x86 specific because the ARM backend can't handle it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126650 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-28 12:30:47 +00:00
Che-Liang Chiou
f71720231f
Add preliminary support for .f32 in the PTX backend.
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- Add appropriate TableGen patterns for fadd, fsub, fmul.
- Add .f32 as the PTX type for the LLVM float type.
- Allow parameters, return values, and global variable declarations
to accept the float type.
- Add appropriate test cases.
Patch by Justin Holewinski
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126636 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-28 06:34:09 +00:00
Duncan Sands
9c45251e11
Legalize support for fpextend of vector. PR9309.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126574 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-27 14:41:27 +00:00
NAKAMURA Takumi
419f232783
Target/X86: Always emit "push/pop GPRs" in prologue/epilogue and emit "spill/reload frames" for XMMs.
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It improves Win64's prologue/epilogue but it would not affect ia32 and amd64 (lack of nonvolatile XMMs).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126568 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-27 08:47:19 +00:00
Cameron Zwarich
eee444cc4e
Fix PR9324 / <rdar://problem/9052489> by handling the case where a PHI has no uses.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126567 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-27 08:06:01 +00:00
Cameron Zwarich
60c8b22dad
Give a test file a more sensible name so that it can hold more test cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126566 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-27 08:05:57 +00:00