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211 Commits

Author SHA1 Message Date
Venkatraman Govindaraju
fcb6800dd4 [Sparc] Add support for parsing floating point instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199033 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-12 04:48:54 +00:00
Venkatraman Govindaraju
8ce28c812b [Sparc] Add support for parsing jmpl instruction and make indirect call and jmp instructions as aliases to jmpl. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198909 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-10 01:48:17 +00:00
Venkatraman Govindaraju
3102565082 [Sparc] Multiclass for loads/stores. No functionality change intended. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198893 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-09 21:49:18 +00:00
Venkatraman Govindaraju
7ceaa8623c [Sparc] Add support for parsing branch instructions and conditional moves. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198738 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-08 06:14:52 +00:00
Venkatraman Govindaraju
a16f1ce2d9 [Sparc] Add support for parsing memory operands in sparc AsmParser. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198658 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-07 01:49:11 +00:00
Venkatraman Govindaraju
9429f47d83 [Sparc] Add initial implementation of disassembler for sparc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198591 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-06 08:08:58 +00:00
Venkatraman Govindaraju
5d02c84191 [Sparc] Add initial implementation of MC Code emitter for sparc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198533 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-05 02:13:48 +00:00
Venkatraman Govindaraju
72d2b05254 [Sparc] Add the initial implementation of an asm parser for sparc/sparcv9. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198484 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-04 11:30:13 +00:00
Venkatraman Govindaraju
447c3480e5 [Sparc] Handle atomic loads/stores in sparc backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198286 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-01 22:11:54 +00:00
Venkatraman Govindaraju
ca0ef6fe4f [SparcV9]: Use SRL instead of SLL to clear top 32-bits in ctpop:i32. SLL does not clear top 32 bit, only SRL does. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198280 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-01 19:00:10 +00:00
Venkatraman Govindaraju
a71d72a059 [SparcV9] Use separate instruction patterns for 64 bit arithmetic instructions instead of reusing 32 bit instruction patterns. 
This is done to avoid spilling the result of the 64-bit instructions to a 4-byte slot.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198157 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-12-29 07:15:09 +00:00
Venkatraman Govindaraju
845e93818a [Sparc]: Implement LEA pattern for sparcv9. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195575 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-11-24 20:07:35 +00:00
Venkatraman Govindaraju
fcd5e86396 [SparcV9] Handle i64 <-> float conversions in sparcv9 mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193957 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-11-03 12:28:40 +00:00
Venkatraman Govindaraju
38aceb8714 [Sparc] Implement JIT for SPARC. 
No new testcases. However, this patch makes all supported JIT testcases in 
test/ExecutionEngine  pass on Sparc.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192176 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-08 07:15:22 +00:00
Venkatraman Govindaraju
3bd3419e86 [Sparc] Do not hardcode nop in the delay slot of TLS_CALL. Use DelaySlotFiller to fill the delay slot instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192160 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-08 02:50:29 +00:00
Venkatraman Govindaraju
79c5e0c5ca [Sparc] Do not emit nop after fcmp* instruction with V9. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192056 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-06 07:06:44 +00:00
Venkatraman Govindaraju
bb0ec9840b [Sparc] Use addxcc/subxcc for adde/sube instead of addx/subx. 
addx/subx does not modify conditional codes whereas addxcc/subxx does.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192053 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-06 02:11:10 +00:00
Venkatraman Govindaraju
ff96efee98 [Sparc] Use correct instruction pattern for CMPri. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191180 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-22 18:54:54 +00:00
Venkatraman Govindaraju
0821c72f11 [Sparc] Make SPARC instructions' encoding well defined such that TableGen can automatically generate code emitter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191168 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-22 09:54:42 +00:00
Venkatraman Govindaraju
69ae8f1abd [Sparc] Clean up MOVcc instructions so that TableGen can encode them correctly. No functionality change intended. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191167 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-22 09:18:26 +00:00
Venkatraman Govindaraju
a432a97b62 [Sparc] Clean up branch instructions, so that TableGen can encode branch conditions as well. No functionality change intended. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191166 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-22 08:51:55 +00:00
Venkatraman Govindaraju
7d052f272d [Sparc] Add support for TLS in sparc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191164 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-22 06:48:52 +00:00
Venkatraman Govindaraju
75ddb2bb34 [Sparc] Add support for soft long double (fp128). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189780 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-03 04:11:59 +00:00
Venkatraman Govindaraju
2f17d0facf [Sparc] Add long double (f128) instructions to sparc backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189198 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-25 18:30:06 +00:00
Jakob Stoklund Olesen
b581261240 Use register masks on SPARC call instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189085 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-23 02:33:47 +00:00
Venkatraman Govindaraju
e3b29fbc5f [Sparc] Use HWEncoding instead of unused Num field in Sparc register definitions. Also, correct the definitions of RETL and RET instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188738 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-20 01:26:14 +00:00
Venkatraman Govindaraju
1799921672 [Sparc] Delete FPMover Pass and remove Fp* Pseudo-instructions from Sparc backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183613 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-08 15:32:59 +00:00
Venkatraman Govindaraju
01021a8b93 [Sparc]: Use cmp instruction instead of subcc to compare integers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183463 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-07 00:03:36 +00:00
Venkatraman Govindaraju
1e06bcbd63 Sparc: No functionality change. Cleanup whitespaces, comment formatting etc., 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183243 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-04 18:33:25 +00:00
Venkatraman Govindaraju
e7cbb792c9 Sparc: Add support for indirect branch and blockaddress in Sparc backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183094 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-03 05:58:33 +00:00
Venkatraman Govindaraju
85cc972a06 Sparc: When storing 0, use %g0 directly in the store instruction instead of 
using two instructions (sethi and store).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183090 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-03 00:21:54 +00:00
Jakob Stoklund Olesen
89db6732fb Implement SPselectfcc for i64 operands. 
Also clean up the arguments to all the MOVCC instructions so the
operands always are (true-val, false-val, cond-code).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182221 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-05-19 20:20:54 +00:00
Jakob Stoklund Olesen
00ce0f6512 Handle i64 FrameIndex nodes in SPARC v9 mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182216 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-05-19 19:14:24 +00:00
Jakob Stoklund Olesen
2c6b5a8d33 Fix the SETHIimm pattern for 64-bit code. 
Don't ignore the high 32 bits of the immediate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179985 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-21 21:18:03 +00:00
Jakob Stoklund Olesen
ef596e1a80 Fix patterns for 64-bit pointers. 
This fixes the pic32 code model for SPARC v9.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179469 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-14 01:53:23 +00:00
Jakob Stoklund Olesen
0e16488442 Add SPARC v9 support for select on 64-bit compares. 
This requires v9 cmov instructions using the %xcc flags instead of the
%icc flags.

Still missing:
- Select floats on %xcc flags.
- Select i64 on %fcc flags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178737 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-04 03:08:00 +00:00
Jakob Stoklund Olesen
8534e9998c Add 64-bit compare + branch for SPARC v9. 
The same compare instruction is used for 32-bit and 64-bit compares. It
sets two different sets of flags: icc and xcc.

This patch adds a conditional branch instruction using the xcc flags for
64-bit compares.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178621 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-03 04:41:44 +00:00
Jakob Stoklund Olesen
c3ff3f42ee Add 64-bit shift instructions. 
SPARC v9 defines new 64-bit shift instructions. The 32-bit shift right
instructions are still usable as zero and sign extensions.

This adds new F3_Sr and F3_Si instruction formats that probably should
be used for the 32-bit shifts as well. They don't really encode an
simm13 field.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178525 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-02 04:09:12 +00:00
Jakob Stoklund Olesen
a10fd6d3d1 Add predicates for distinguishing 32-bit and 64-bit modes. 
The 'sparc' architecture produces 32-bit code while 'sparcv9' produces
64-bit code.

It is also possible to run 32-bit code using SPARC v9 instructions with:

  llc -march=sparc -mattr=+v9

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178524 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-02 04:09:06 +00:00
Jakob Stoklund Olesen
fcb25e60f5 Add an I64Regs register class for 64-bit registers. 
We are going to use the same registers for 32-bit and 64-bit values, but
in two different register classes. The I64Regs register class has a
larger spill size and alignment.

The addition of an i64 register class confuses TableGen's type
inference, so it is necessary to clarify the type of some immediates and
the G0 register.

In 64-bit mode, pointers are i64 and should use the I64Regs register
class. Implement getPointerRegClass() to dynamically provide the pointer
register class depending on the subtarget. Use ptr_rc and iPTR for
memory operands.

Finally, add the i64 type to the IntRegs register class. This register
class is not used to hold i64 values, I64Regs is for that. The type is
required to appease TableGen's type checking in output patterns like this:

  def : Pat<(add i64:$a, i64:$b), (ADDrr $a, $b)>;

SPARC v9 uses the same ADDrr instruction for i32 and i64 additions, and
TableGen doesn't know to check the type of register sub-classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178522 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-02 04:08:54 +00:00
Jakob Stoklund Olesen
d28e30fcf4 Clean up Sparc patterns. 
The types of register variables no longer need to be specified in output
patterns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177845 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-24 19:37:04 +00:00
Jakob Stoklund Olesen
15a3c18623 Give Sparc instruction patterns direct types instead of register classes. 
Also update the documentation since Sparc is the nicest backend, and
used as an example in WritingAnLLVMBackend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177835 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-24 00:56:20 +00:00
Jakob Stoklund Olesen
edf03820f1 Use direct types in Sparc def : Pat patterns. 
The SelectionDAG graph has MVT type labels, not register classes, so
this makes it clearer what is happening.

This notation is also robust against adding more types to the IntRegs
register class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177829 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-23 20:35:05 +00:00
Jakob Stoklund Olesen
067e5a2a1a Move MRI liveouts to Sparc return instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174413 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-05 18:16:58 +00:00
Jakob Stoklund Olesen
02c63803e5 Add missing SDNP properties on the flushw node. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162515 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-08-24 00:31:13 +00:00
Jia Liu
31d157ae1a Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-18 12:03:15 +00:00
Venkatraman Govindaraju
58269b9732 Generate correct Sparc32 ABI compliant code for functions that return a struct. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126108 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-21 03:42:44 +00:00
Venkatraman Govindaraju
e105a3901f Added ICC, FCC as uses of movcc instruction to generate correct code when -mattr=v9 is used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124027 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-22 11:36:24 +00:00
Venkatraman Govindaraju
fc3faa75cb Sparc backend: 
Rename FLUSH to FLUSHW.
 Output "ta 3" instead of a "flushw" instruction if v8 instruction set is used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123997 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-21 22:00:00 +00:00
Venkatraman Govindaraju
71e39dac0c Sparc backend: Implements a delay slot filler that attempt to fill delay slots 
with useful instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123884 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-20 05:08:26 +00:00