Commit Graph

1390 Commits

Author SHA1 Message Date
Evan Cheng
e3c1cfb181 Remove xfail. This is fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45254 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-20 02:25:21 +00:00
Scott Michel
86c041f50e More working CellSPU tests:
- vec_const.ll: Vector constant loads
- immed64.ll: i64, f64 constant loads


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45242 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-20 00:44:13 +00:00
Scott Michel
0e5665bf03 CellSPU testcase, extract_elt.ll: extract vector element.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45219 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-19 21:17:42 +00:00
Scott Michel
0a92af487b More working CellSPU test cases:
- call.ll: Function call
- ctpop.ll: Count population
- dp_farith.ll: DP arithmetic
- eqv.ll: Equivalence primitives
- fcmp.ll: SP comparisons
- fdiv.ll: SP division
- fneg-fabs.ll: SP negation, aboslute value
- int2fp.ll: Integer -> SP conversion
- rotate_ops.ll: Rotation primitives
- select_bits.ll: (a & c) | (b & ~c) bit selection
- shift_ops.ll: Shift primitives
- sp_farith.ll: SP arithmentic


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45217 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-19 20:50:49 +00:00
Scott Michel
170783a5fc Two more test cases: or_ops.ll (arithmetic or operations) and vecinsert.ll
(vector insertions)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45216 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-19 20:15:47 +00:00
Scott Michel
9999e685ea Add new immed16.ll test case, fix CellSPU errata to make test case work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45196 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-19 07:35:06 +00:00
Evan Cheng
636e5a216c Fix PR1872: SrcValue and SrcValueOffset should not be used to compute load / store node id.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45167 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-18 19:38:14 +00:00
Evan Cheng
beec823d4b FIX for PR1799: When a load is unfolded from an instruction, check if it is a new node. If not, do not create a new SUnit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45157 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-18 08:42:10 +00:00
Scott Michel
4a5b66bc2f i32 immediate constant test case for CellSPU
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45134 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-17 23:45:52 +00:00
Scott Michel
504c369213 - Restore some i8 functionality in CellSPU
- New test case: nand.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45130 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-17 22:32:34 +00:00
Duncan Sands
fd7b326bea Make invokes of inline asm legal. Teach codegen
how to lower them (with no attempt made to be
efficient, since they should only occur for
unoptimized code).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45108 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-17 18:08:19 +00:00
Evan Cheng
7a831ce85f Make better use of instructions that clear high bits; fix various 2-wide shuffle bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45058 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-15 03:00:47 +00:00
Scott Michel
ec2a08ff06 Start committing working test cases for CellSPU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45050 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-15 00:38:50 +00:00
Evan Cheng
152804e9c1 Fix ctlz and cttz. llvm definition requires them to return number of bits in of the src type when value is zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45029 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-14 08:30:15 +00:00
Evan Cheng
18efe269b1 Implement ctlz and cttz with bsr and bsf.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45024 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-14 02:13:44 +00:00
Evan Cheng
f9785f92b6 Be extra careful with extension use optimation. Now turned on by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44981 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-13 03:32:53 +00:00
Evan Cheng
1314b00cf2 Fold some and + shift in x86 addressing mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44970 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-13 00:43:27 +00:00
Evan Cheng
6e141fd048 Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44960 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-12 23:12:09 +00:00
Dan Gohman
890813243f Allow vector integer constants to be created with
SelectionDAG::getConstant, in the same way as vector floating-point
constants. This allows the legalize expansion code for @llvm.ctpop and
friends to be usable with vector types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44954 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-12 22:21:26 +00:00
Evan Cheng
794405e6aa Use shuffles to implement insert_vector_elt for i32, i64, f32, and f64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44929 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-12 07:55:34 +00:00
Evan Cheng
2044bccd1a Add a test case for -optimize-ext-uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44928 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-12 07:54:08 +00:00
Evan Cheng
db2d524d5f Lower a build_vector with all constants into a constpool load unless it can be done with a move to low part.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44921 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-12 06:45:40 +00:00
Evan Cheng
14b32e1941 - Improved v8i16 shuffle lowering. It now uses pshuflw and pshufhw as much as
possible before resorting to pextrw and pinsrw.
- Better codegen for v4i32 shuffles masquerading as v8i16 or v16i8 shuffles.
- Improves (i16 extract_vector_element 0) codegen by recognizing
  (i32 extract_vector_element 0) does not require a pextrw.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44836 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-11 01:46:18 +00:00
Christopher Lamb
11a4f64bd4 Improve branch folding by recgonizing that explict successor relationships impact the value of fall-through choices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44785 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-10 07:24:06 +00:00
Gordon Henriksen
80a75bfae9 Adding a collector name attribute to Function in the IR. These
methods are new to Function:

  bool hasCollector() const;
  const std::string &getCollector() const;
  void setCollector(const std::string &);
  void clearCollector();

The assembly representation is as such:

  define void @f() gc "shadow-stack" { ...

The implementation uses an on-the-side table to map Functions to 
collector names, such that there is no overhead. A StringPool is 
further used to unique collector names, which are extremely
likely to be unique per process.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44769 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-10 03:18:06 +00:00
Gordon Henriksen
38200692fa Upgrading this test to 2.0 .ll syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44738 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-09 15:03:01 +00:00
Chris Lattner
d96428597b Fix a significant code quality regression I introduced on PPC64 quite
a while ago.  We now produce:

_foo:
	mflr r0
	std r0, 16(r1)
	ld r2, 16(r1)
	std r2, 0(r3)
	ld r0, 16(r1)
	mtlr r0
	blr 

instead of:

_foo:
	mflr r0
	std r0, 16(r1)
	lis r0, 0
	ori r0, r0, 16
	ldx r2, r1, r0
	std r2, 0(r3)
	ld r0, 16(r1)
	mtlr r0
	blr 

for:

void foo(void **X) {
  *X = __builtin_return_address(0);
}

on ppc64.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44701 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-08 07:04:58 +00:00
Chris Lattner
3fc027df4f implement __builtin_return_addr(0) on ppc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44700 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-08 06:59:59 +00:00
Evan Cheng
8a86c3f3ae Much improved v8i16 shuffles. (Step 1).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44676 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-07 08:07:39 +00:00
Evan Cheng
a97159336d New test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44672 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-07 01:48:46 +00:00
Evan Cheng
b0e370abdf Fix a bogus test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44668 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-06 22:12:45 +00:00
Evan Cheng
33faddc35d Turning simple splitting on. Start testing new coalescer heuristics as new llcbeta.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44660 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-06 08:54:31 +00:00
Chris Lattner
d3fd6d2b25 third time around: instead of disabling this completely,
only disable it if we don't know it will be obviously profitable.
Still fixme, but less so. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44658 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-06 07:47:55 +00:00
Chris Lattner
e00cbad78d Actually, disable this code for now. More analysis and improvements to
the X86 backend are needed before this should be enabled by default.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44657 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-06 07:44:31 +00:00
Chris Lattner
e70da20f9a implement a readme entry, compiling the code into:
_foo:
	movl	$12, %eax
	andl	4(%esp), %eax
	movl	_array(%eax), %eax
	ret

instead of:

_foo:
	movl	4(%esp), %eax
	shrl	$2, %eax
	andl	$3, %eax
	movl	_array(,%eax,4), %eax
	ret

As it turns out, this triggers all the time, in a wide variety of
situations, for example, I see diffs like this in various programs:

-       movl    8(%eax), %eax
-       shll    $2, %eax
-       andl    $1020, %eax
-       movl    (%esi,%eax), %eax
+       movzbl  8(%eax), %eax
+       movl    (%esi,%eax,4), %eax


-       shll    $2, %edx
-       andl    $1020, %edx
-       movl    (%edi,%edx), %edx
+       andl    $255, %edx
+       movl    (%edi,%edx,4), %edx

Unfortunately, I also see stuff like this, which can be fixed in the
X86 backend:

-       andl    $85, %ebx
-       addl    _bit_count(,%ebx,4), %ebp
+       shll    $2, %ebx
+       andl    $340, %ebx
+       addl    _bit_count(%ebx), %ebp



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44656 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-06 07:33:36 +00:00
Chris Lattner
7f3a75a529 fix this when run on non x86 hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44645 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-06 01:05:52 +00:00
Evan Cheng
5ef3a04b54 Fix for PR1831: if all defs of an interval are re-materializable, then it's a preferred spill candiate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44644 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-06 00:01:56 +00:00
Evan Cheng
e62f97c094 Allow some reloads to be folded in multi-use cases. Specifically testl r, r -> cmpl [mem], 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44479 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-01 02:07:52 +00:00
Evan Cheng
cddbb83ea8 Do not fold reload into an instruction with multiple uses. It issues one extra load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44467 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-30 21:23:43 +00:00
Evan Cheng
213ee902cc Update tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44435 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-29 10:03:54 +00:00
Chris Lattner
4b341b4178 upgrade this test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44405 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-28 18:22:12 +00:00
Chris Lattner
95d859332b xfail a test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44395 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-28 05:37:13 +00:00
Chris Lattner
2adcf10a80 update this test after the fmrrd fix
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44393 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-28 05:27:07 +00:00
Tanya Lattner
727842e9d7 Fix bug in regression tests that ignored stderr output in RUN lines. Updated tests and fixed broken run lines.
XFAILed 3 arm regressions (will file bugs)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44389 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-28 04:57:00 +00:00
Chris Lattner
a5d4a4e33e commit testcase I forgot to svn add.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44383 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-27 22:43:37 +00:00
Chris Lattner
789db09cde Fix a crash on invalid code due to memcpy lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44378 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-27 22:14:42 +00:00
Andrew Lenharth
19914ed97f something wrong with this opt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44370 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-27 18:31:30 +00:00
Dan Gohman
b51947817d Remove unnecessary && from the RUN lines of this test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44342 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-27 00:03:38 +00:00
Dan Gohman
77003040b2 Don't lower srem/urem X%C to X-X/C*C unless the division is actually
optimized. This avoids creating illegal divisions when the combiner is
running after legalize; this fixes PR1815. Also, it produces better
code in the included testcase by avoiding the subtract and multiply
when the division isn't optimized.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44341 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-26 23:46:11 +00:00
Chris Lattner
8a594489bf Fix a long standing deficiency in the X86 backend: we would
sometimes emit "zero" and "all one" vectors multiple times,
for example:

_test2:
	pcmpeqd	%mm0, %mm0
	movq	%mm0, _M1
	pcmpeqd	%mm0, %mm0
	movq	%mm0, _M2
	ret

instead of:

_test2:
	pcmpeqd	%mm0, %mm0
	movq	%mm0, _M1
	movq	%mm0, _M2
	ret

This patch fixes this by always arranging for zero/one vectors
to be defined as v4i32 or v2i32 (SSE/MMX) instead of letting them be
any random type.  This ensures they get trivially CSE'd on the dag.
This fix is also important for LegalizeDAGTypes, as it gets unhappy
when the x86 backend wants BUILD_VECTOR(i64 0) to be legal even when
'i64' isn't legal.

This patch makes the following changes:

1) X86TargetLowering::LowerBUILD_VECTOR now lowers 0/1 vectors into
   their canonical types.
2) The now-dead patterns are removed from the SSE/MMX .td files.
3) All the patterns in the .td file that referred to immAllOnesV or
   immAllZerosV in the wrong form now use *_bc to match them with a
   bitcast wrapped around them.
4) X86DAGToDAGISel::SelectScalarSSELoad is generalized to handle 
   bitcast'd zero vectors, which simplifies the code actually.
5) getShuffleVectorZeroOrUndef is updated to generate a shuffle that
   is legal, instead of generating one that is illegal and expecting
   a later legalize pass to clean it up.
6) isZeroShuffle is generalized to handle bitcast of zeros.
7) several other minor tweaks.

This patch is definite goodness, but has the potential to cause random
code quality regressions.  Please be on the lookout for these and let 
me know if they happen.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44310 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-25 00:24:49 +00:00