Brian Gaeke
bda4a3c61a
Hack it so we do not try to allocate values to G0.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12184 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-06 05:31:32 +00:00
Brian Gaeke
d69b3c58d3
Make prolog align stack properly. Make epilog not touch any registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12183 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-06 05:31:21 +00:00
Brian Gaeke
a8b00cafc4
Emit register names in lowercase, as required by the assembler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12182 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-06 05:30:21 +00:00
Brian Gaeke
a98e051417
Teach getRegClassForType where to find FP registers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12180 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-06 03:54:13 +00:00
Brian Gaeke
62aa28aef3
Asm output is looking a lot better; not correct for all operands yet though.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12143 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-05 08:39:09 +00:00
Brian Gaeke
7a3ae1fbad
Support -print-machineinstrs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12124 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-04 19:22:16 +00:00
Brian Gaeke
4acfd039f9
Asm printer support, based on x86 - only prints mnemonics for now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12113 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-04 06:00:41 +00:00
Brian Gaeke
da69e7d9b3
Double-FP pseudo-registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12112 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-04 05:15:03 +00:00
Brian Gaeke
775158d62a
Subtract instructions; minor cleanups
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12111 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-04 04:37:45 +00:00
Brian Gaeke
e7173b7e8e
Floating point regs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12110 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-04 04:37:22 +00:00
Brian Gaeke
e806173ab6
Simple copyConstantToReg support, SETHIi and ORri
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12107 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-04 00:56:25 +00:00
Brian Gaeke
bc1d27aa6e
Support add - note, still missing important copyConstantToRegister stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12106 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-03 23:03:14 +00:00
Brian Gaeke
05b15fb075
TargetCacheInfo has been removed; its only uses were to propagate a constant
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(16) into certain areas of the SPARC V9 back-end. I'm fairly sure the US IIIi's
dcache has 32-byte lines, so I'm not sure where the 16 came from. However, in
the interest of not breaking things any more than they already are, I'm going
to leave the constant alone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12043 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-01 06:43:29 +00:00
Chris Lattner
dce363d5ec
Adjust to change in TII ctor arguments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11987 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 06:31:44 +00:00
Chris Lattner
1ddf475b6a
These two virtual methods are never called.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11984 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 05:59:33 +00:00
Chris Lattner
e1274de2c9
Implement initial prolog/epilog code insertion methods.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11979 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 05:18:30 +00:00
Chris Lattner
1c809c594b
Add an instruction selector capable of selecting 'ret void'
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11973 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 00:27:00 +00:00
Chris Lattner
9ff6ba1ea1
Change this so that LLC actually tries to run the code generator, though it will
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immediately abort due to lack of an instruction selector. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11963 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 20:21:45 +00:00
Chris Lattner
8d8a6bc7a3
Finegrainify namespacification
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11958 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 19:52:49 +00:00
Chris Lattner
a85d46eea8
Tab completion is our friend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11957 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 19:45:39 +00:00
Chris Lattner
83ba99ac46
Clean up rules
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11956 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 19:43:40 +00:00
Chris Lattner
275f6459ab
Bring this directory into "it actually compiles" land
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11955 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 19:37:18 +00:00
Chris Lattner
f13bd49d6a
Fix multiple inclusion problem
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11954 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 19:31:32 +00:00
Misha Brukman
23e6c1ff45
Instructions to call and return from functions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11858 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-26 00:37:12 +00:00
Misha Brukman
757df02826
SparcV8 regs are really 32-bit, not 64! Thanks, Chris.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11835 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-25 21:03:02 +00:00
Misha Brukman
e07c2aa67c
Clean up the tablegen descriptions for SparcV8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11834 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-25 21:02:21 +00:00
Misha Brukman
5914bf6ef5
Fix the SparcV8 register definitions that were imported from PPC template.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11833 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-25 21:00:05 +00:00
Misha Brukman
3dff822988
SparcV8 has different types of instructions, but F1 is only used for CALL.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11832 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-25 20:52:20 +00:00
Brian Gaeke
e785e531f4
SparcV8 skeleton
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11828 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-25 19:28:19 +00:00