Chris Lattner
5b85654844
Change the X86 backend to stop using the evil ADDC/ADDE/SUBC/SUBE nodes (which
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their carry depenedencies with MVT::Flag operands) and use clean and beautiful
EFLAGS dependences instead.
We do this by changing the modelling of SBB/ADC to have EFLAGS input and outputs
(which is what requires the previous scheduler change) and change X86 ISelLowering
to custom lower ADDC and friends down to X86ISD::ADD/ADC/SUB/SBB nodes.
With the previous series of changes, this causes no changes in the testsuite, woo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122213 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-20 00:59:46 +00:00
Mon P Wang
a0fd0d5b27
Prevents PerformShuffleCombine from creating a node with an illegal type after legalize types
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has run, e.g., prevent creating an i64 node from a v2i64 when i64 is not a legal type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122206 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19 23:55:53 +00:00
Chris Lattner
c19d1c3ba2
improve the setcc -> setcc_carry optimization to happen more
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consistently by moving it out of lowering into dag combine.
Add some missing patterns for matching away extended versions of setcc_c.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122201 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19 22:08:31 +00:00
Chris Lattner
481eebc931
simplify some code to just reuse a setcc if we can instead of
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going through the CSE maps to get it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122196 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19 21:23:48 +00:00
Nick Lewycky
476b242fe7
Add missing standard headers. Patch by Joerg Sonnenberger!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122193 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19 20:43:38 +00:00
Nick Lewycky
2402123413
Add missing std:: prefixes to some calls. C++ doesn't require that <cfoo>
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headers provide symbols outside namespace std and the LLVM coding standards
state that we should prefix all of them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122192 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19 20:42:43 +00:00
Chris Lattner
2a786eb030
now that generic vector types aren't selected onto MMX operations,
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we don't need -disable-mmx anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122189 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19 20:19:20 +00:00
Chris Lattner
e019ec168b
reduce copy/paste programming with the power of for loops.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122187 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19 20:07:10 +00:00
Chris Lattner
a34b3cf953
X86 supports i8/i16 overflow ops (except i8 multiplies), we should
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generate them.
Now we compile:
define zeroext i8 @X(i8 signext %a, i8 signext %b) nounwind ssp {
entry:
%0 = tail call %0 @llvm.sadd.with.overflow.i8(i8 %a, i8 %b)
%cmp = extractvalue %0 %0, 1
br i1 %cmp, label %if.then, label %if.end
into:
_X: ## @X
## BB#0: ## %entry
subl $12, %esp
movb 16(%esp), %al
addb 20(%esp), %al
jo LBB0_2
Before we were generating:
_X: ## @X
## BB#0: ## %entry
pushl %ebp
movl %esp, %ebp
subl $8, %esp
movb 12(%ebp), %al
testb %al, %al
setge %cl
movb 8(%ebp), %dl
testb %dl, %dl
setge %ah
cmpb %cl, %ah
sete %cl
addb %al, %dl
testb %dl, %dl
setge %al
cmpb %al, %ah
setne %al
andb %cl, %al
testb %al, %al
jne LBB0_2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122186 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19 20:03:11 +00:00
Chris Lattner
e5cbdca3bd
recognize an unsigned add with overflow idiom into uadd.
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This resolves a README entry and technically resolves PR4916,
but we still get poor code for the testcase in that PR because
GVN isn't CSE'ing uadd with add, filed as PR8817.
Previously we got:
_test7: ## @test7
addq %rsi, %rdi
cmpq %rdi, %rsi
movl $42, %eax
cmovaq %rsi, %rax
ret
Now we get:
_test7: ## @test7
addq %rsi, %rdi
movl $42, %eax
cmovbq %rsi, %rax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122182 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19 19:37:52 +00:00
Anton Korobeynikov
c8bd78c16b
Restore the behavior of frame lowering before my refactoring.
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It turns out that ppc backend has really weird interdependencies
over different hooks and all stuff is fragile wrt small changes.
This should fix PR8749
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122155 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18 19:53:14 +00:00
Rafael Espindola
1ec5bd31fe
Remove the MCObjectFormat class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122147 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18 05:37:28 +00:00
Rafael Espindola
bff66a86e6
Move some data to the TargetWriter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122134 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18 03:27:34 +00:00
Bill Wendling
a68a4fdf37
r120333 changed the opcode for the Thumb1 stuff from ARM::tMOVr to
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ARM::tMOVgpr2gpr. But this check didn't change. As a result, we were getting
misaligned references to the jump table from an ADR instruction.
There is a test case, but unfortunately it's sensitive to random code changes.
<rdar://problem/8782223>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122131 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18 02:13:59 +00:00
Bill Wendling
cd080249fc
RemoveUnusedCPEntries can change things. Track it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122129 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18 01:53:06 +00:00
Rafael Espindola
1ee03a835e
Relax push instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122121 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18 01:01:34 +00:00
Bob Wilson
094dd80ecc
Rearrange some Neon multiclasses. No functional changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122119 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18 00:42:58 +00:00
Bob Wilson
3deb45149a
Fix result type of Neon floating-point comparisons against zero.
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The result vector elements are always integers. Radar 8782191.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122112 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18 00:04:33 +00:00
Bob Wilson
3a75b9bc8f
Add some missing entries in ARMTargetLowering::getTargetNodeName.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122111 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18 00:04:26 +00:00
Bill Wendling
976ef86689
During local stack slot allocation, the materializeFrameBaseRegister function
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may be called. If the entry block is empty, the insertion point iterator will be
the "end()" value. Calling ->getParent() on it (among others) causes problems.
Modify materializeFrameBaseRegister to take the machine basic block and insert
the frame base register at the beginning of that block. (It's very similar to
what the code does all ready. The only difference is that it will always insert
at the beginning of the entry block instead of after a previous materialization
of the frame base register. I doubt that that matters here.)
<rdar://problem/8782198>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122104 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 23:09:14 +00:00
Bob Wilson
9bb43e1675
Avoid report_fatal_error in ARM's PrintAsmOperand method.
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The standard error handling in AsmPrinter::EmitInlineAsm handles this much
better, so just use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122100 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 23:06:42 +00:00
Nate Begeman
b65c175d32
Add support for matching psign & plendvb to the x86 target
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Remove unnecessary pandn patterns, 'vnot' patfrag looks through bitcasts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122098 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 22:55:37 +00:00
Jim Grosbach
a3dbd3a244
If The ARM WriteNopData() gets an unaligned byte count to pad out, fill in with
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a partial value. rdar://8782954
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122078 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 19:03:02 +00:00
Jim Grosbach
f0db261e97
Add bits 31-28 to the Thumb2 encoding of TBB/TBH.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122076 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 18:42:56 +00:00
Jim Grosbach
6ec6eeb692
Handle 2 and 4 byte data blob fixup values for ARM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122075 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 18:39:10 +00:00
Benjamin Kramer
d53f3c864b
Pass StringRefs by value, for consistency.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122074 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 18:19:06 +00:00
Rafael Espindola
6024c97ffa
Stub out explicit MCELFObjectTargetWriter interface.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122067 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 17:45:22 +00:00
Rafael Espindola
285b3e5b61
Move createELFObjectWriter to its own header.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122064 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 16:59:53 +00:00
Kalle Raiskila
18aa393153
Don't feed 19 bit immediates to ILA.
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Patch (slightly modified) by Visa Putkinen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122052 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 09:36:09 +00:00
Daniel Dunbar
1139d5090a
MC/ARM: Use aggressive symbol folding (important for jump tables, for example).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122044 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 06:00:24 +00:00
Daniel Dunbar
b87422778c
MC/Mach-O: On second thought, use a custom hook for enabling aggressive
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IsSymbolRefDifferenceFullyResolved, it turns out this does change behavior on
enough cases for x86-32 that I would rather wait a bit on it.
- In practice, we will want to change this eventually because it only means we
generate less relocations (it also eliminates the need for the horrible
'.set' hack that Darwin requires in some places).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122042 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 05:50:29 +00:00
Daniel Dunbar
7b62afac0a
MC/Target: Remove HasScatteredSymbols target hook variable, which has been
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superceded and was effectively dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122024 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 02:06:08 +00:00
Bob Wilson
a1f544b62e
Use PairDRegs to implement ConcatVectors. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122017 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 01:21:08 +00:00
Rafael Espindola
3ee33aa6f9
Make pushq produce signed relocations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122005 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 22:50:01 +00:00
Wesley Peck
8a28f21379
Fix MBlaze backend call instructions so that arguments passed through registers
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are correctly marked as used. This removes a hack where the call instructions
marked all possible argument registers as used in the tablegen description.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121994 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 19:41:31 +00:00
Jim Grosbach
3efad8fad4
Pseudo-ize the Thumb1 tBfar pattern. rdar://8777974
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121990 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 19:11:16 +00:00
Daniel Dunbar
5d05d9769e
MC/Mach-O: Lift some MachObjectWriter arguments into the target specific
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interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121981 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 17:21:02 +00:00
Daniel Dunbar
ae5abd595f
MC/Mach-O: Stub out explicit MCMachObjectTargetWriter interface.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121973 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 16:09:19 +00:00
Daniel Dunbar
297ed28bf9
Fix indentation (per style guide).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121972 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 16:08:43 +00:00
Daniel Dunbar
aa4b7dd13b
MC/Mach-O: Move createMachObjectWriter into MCMachObjectWriter.h.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121971 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 16:08:33 +00:00
Daniel Dunbar
2761fc4270
MC: Move target specific fixup info descriptors to TargetAsmBackend instead of
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the MCCodeEmitter, which seems like a better organization.
- Also, cleaned up some magic constants while in the area.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121953 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 03:20:06 +00:00
Daniel Dunbar
745dacc91d
MC: Make TargetAsmBackend available to the AsmStreamer.
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- Treaty talks on the non-proliferation of MC objects broke down.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121949 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 03:05:59 +00:00
Matt Beaumont-Gay
656b3d22f7
Delete an extra "Imm5 = ", caught by GCC's -Wsequence-point but not by Clang
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(see PR4579).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121939 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 01:34:26 +00:00
Bill Wendling
6baf46dbea
Remove fixup_arm_thumb_ldst. The code was never calling the "fixup" stuff for
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it. I.e., it was always an immediate value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121932 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 00:50:33 +00:00
Bill Wendling
5a54516adf
Add tSpill and tRestore to the opcodes to replace with tSTRi and tLDRi
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respectively.
It may be a bug that these opcodes are getting this far into machine code
generation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121931 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 00:49:54 +00:00
Bill Wendling
dedec2b89d
Add encodings for Thumb1 Spill and Restore pseudos.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121929 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 00:38:41 +00:00
Jim Grosbach
3e333637f1
Thumb1 had two patterns for the same load-from-constant-pool instruction.
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Canonicalize on tLDRpci and remove tLDRcp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121920 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 23:52:36 +00:00
Eric Christopher
836c6245ad
Don't handle -arm-long-calls in fast isel for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121919 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 23:47:29 +00:00
Bill Wendling
7a905a82f7
If we're changing the frame register to a physical register other than SP, we
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need to use tLDRi and tSTRi instead of tLDRspi and tSTRspi respectively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121915 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 23:32:27 +00:00
Bill Wendling
dc3813750e
Whitespace cleanups.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121914 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 23:31:24 +00:00