Chad Rosier
6871d1eceb
Add a few functions to TargetLibraryInfo as part of PR13574.
...
Patch by Weiming Zhao <weimingz@codeaurora.org>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162329 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21 23:28:56 +00:00
Richard Smith
fca01b5e2b
Fix unaligned memory accesses when performing relocations in X86 JIT. There's
...
no cost to using memcpy here: the fixed code is optimized by LLVM to perfect
machine code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162311 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21 20:48:36 +00:00
Chad Rosier
b4fdadef51
[ms-inline asm] Do not report a Parser error when matching inline assembly.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162306 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21 19:36:59 +00:00
Chad Rosier
64bfcbbc58
[ms-inline asm] Expose the ErrorInfo from the MatchInstructionImpl. In general,
...
this is the index of the operand that failed to match.
Note: This may cause a buildbot failure due to an API mismatch in clang. Should
recover with my next commit to clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162295 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21 18:14:59 +00:00
Craig Topper
4dea906e1a
Fix up indentation and remove a couple else's after returns.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162270 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21 08:29:51 +00:00
Craig Topper
a182367e59
Use uint16_t for tables of opcodes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162267 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21 08:23:21 +00:00
Craig Topper
630e33a857
Fix up indentation. No functional change.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162264 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21 08:17:07 +00:00
Craig Topper
195f1b8a26
Add a couple llvm_unreachables. Add a message to several others.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162263 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21 08:16:16 +00:00
Craig Topper
cba48d8c05
Replace a break with llvm_unreachable in the default case of a nested switch. Condense code a bit. No functional change.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162261 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21 07:32:16 +00:00
Craig Topper
5f67d94697
Cleanup the scalar FMA3 definitions. Add patterns to fold loads with scalar forms.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162260 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21 07:11:11 +00:00
Craig Topper
e4b6189658
Merge FMA3 instructions with and without patterns into single classes using null_frag.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162257 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21 05:56:45 +00:00
Jakob Stoklund Olesen
5379904807
Add a missing def flag.
...
*** Bad machine code: Explicit definition marked as use ***
- function: test_cos
- basic block: BB#0 L.entry (0x7ff2a2024fd0)
- instruction: VSETLNi32 %D11, %D11<undef>, %R0, 0, pred:14, pred:%noreg, %Q5<imp-use,kill>, %Q5<imp-def>
- operand 0: %D11
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162247 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21 00:34:53 +00:00
Jakob Stoklund Olesen
a0708d1109
Use a SmallPtrSet to dedup successors in EmitSjLjDispatchBlock.
...
The test case ARM/2011-05-04-MultipleLandingPadSuccs.ll was creating
duplicate successor list entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162222 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-20 20:52:03 +00:00
Sebastian Pop
b72a939d8d
fix HexagonSubtarget parsing of -mv flag
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162217 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-20 19:56:47 +00:00
Michael Liao
24438b8359
fix a case where all operands of BUILD_VECTOR are undefined
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162214 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-20 17:59:18 +00:00
Akira Hatanaka
b862f094b7
Fix coding style violations in 162135 and 162136.
...
Patch by Petar Jovanovic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162213 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-20 17:53:24 +00:00
Craig Topper
75d8ad461f
Remove FMA3 intrinsic instructions in favor of patterns.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162194 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-20 06:21:25 +00:00
Craig Topper
f4eb22a01c
Use correct intrinsic for 256-bit VFMSUBADDPS.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162193 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-20 06:03:04 +00:00
Craig Topper
8f9c7417b4
Remove trailing white space and tab characters. No functional change.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162192 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-19 23:37:46 +00:00
Nadav Rotem
d60cb11afd
When unsafe math is used, we can use commutative FMAX and FMIN. In some cases
...
this allows for better code generation.
Added a new DAGCombine transformation to convert FMAX and FMIN to FMANC and
FMINC, which are commutative.
For example:
movaps %xmm0, %xmm1
movsd LC(%rip), %xmm0
minsd %xmm1, %xmm0
becomes:
minsd LC(%rip), %xmm0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162187 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-19 13:06:16 +00:00
Benjamin Kramer
51bfb0fe50
Fabs folding is implemented.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162186 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-19 09:51:44 +00:00
Jakob Stoklund Olesen
0a8f898000
Remove the CAND/COR/CXOR custom ISD nodes and their select code.
...
These nodes are no longer needed because the peephole pass can fold
CMOV+AND into ANDCC etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162179 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18 21:49:50 +00:00
Craig Topper
35fc62bf70
Remove virtual from many methods. These methods replace methods in the base class, but the base class methods aren't virtual so it just increased call overhead.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162178 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18 21:38:45 +00:00
Jakob Stoklund Olesen
864c8702ba
Also combine zext/sext into selects for ARM.
...
This turns common i1 patterns into predicated instructions:
(add (zext cc), x) -> (select cc (add x, 1), x)
(add (sext cc), x) -> (select cc (add x, -1), x)
For a function like:
unsigned f(unsigned s, int x) {
return s + (x>0);
}
We now produce:
cmp r1, #0
it gt
addgt.w r0, r0, #1
Instead of:
movs r2, #0
cmp r1, #0
it gt
movgt r2, #1
add r0, r2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162177 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18 21:25:22 +00:00
Jakob Stoklund Olesen
dcd2342d32
Also pass logical ops to combineSelectAndUse.
...
Add these transformations to the existing add/sub ones:
(and (select cc, -1, c), x) -> (select cc, x, (and, x, c))
(or (select cc, 0, c), x) -> (select cc, x, (or, x, c))
(xor (select cc, 0, c), x) -> (select cc, x, (xor, x, c))
The selects can then be transformed to a single predicated instruction
by peephole.
This transformation will make it possible to eliminate the ISD::CAND,
COR, and CXOR custom DAG nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162176 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18 21:25:16 +00:00
Nadav Rotem
b9d6b8449d
Reapply r162160 with a fix: Optimize Arith->Trunc->SETCC sequence to allow better compare/branch code.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162172 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18 17:53:03 +00:00
Anton Korobeynikov
6d655a50f9
fp16-to-fp32 conversion instructions are available in Thumb mode as well.
...
Make sure the generic pattern is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162170 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18 13:08:43 +00:00
Craig Topper
acaaa6fae6
Refactor code a bit to reduce number of calls in the final compiled code. No functional change intended.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162166 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18 06:39:34 +00:00
Craig Topper
8188955b2b
Reorder initialization list to silence -Wreorder
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162165 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18 06:20:54 +00:00
Nadav Rotem
d5c66a0b1f
Revert r162160 because it made a few buildbots fail.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162164 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18 05:02:36 +00:00
Nadav Rotem
b5838689c6
The X86 backend has a number of optimizations for SETCC nodes which use
...
arithmetic instructions. However, when small data types are used, a truncate
node appears between the SETCC node and the arithmetic operation. This patch
adds support for this pattern.
Before:
xorl %esi, %edi
testb %dil, %dil
setne %al
ret
After:
xorb %dil, %sil
setne %al
ret
rdar://12081007
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162160 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18 02:43:28 +00:00
Akira Hatanaka
3028d38f6e
Add MipsELFWriterInfo.{h,cpp}.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162136 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 21:38:47 +00:00
Akira Hatanaka
b889e0cd2f
Correct MCJIT functionality for MIPS32 architecture.
...
No new tests are added.
All tests in ExecutionEngine/MCJIT that have been failing pass after this patch
is applied (when "make check" is done on a mips board).
Patch by Petar Jovanovic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162135 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 21:28:04 +00:00
Jakob Stoklund Olesen
a7fb3f6804
Avoid folding ADD instructions with FI operands.
...
PEI can't handle the pseudo-instructions. This can be removed when the
pseudo-instructions are replaced by normal predicated instructions.
Fixes PR13628.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162130 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 20:55:34 +00:00
Akira Hatanaka
72e9b6aeb4
Add stub methods for mips assembly matcher.
...
Patch by Vladimir Medic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162124 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 20:16:42 +00:00
Bill Wendling
32811bef95
Change the linker_private_weak_def_auto' linkage to
linkonce_odr_auto_hide' to
...
make it more consistent with its intended semantics.
The `linker_private_weak_def_auto' linkage type was meant to automatically hide
globals which never had their addresses taken. It has nothing to do with the
`linker_private' linkage type, which outputs the symbols with a `l' (ell) prefix
among other things.
The intended semantic is more like the `linkonce_odr' linkage type.
Change the name of the linkage type to `linkonce_odr_auto_hide'. And therefore
changing the semantics so that it produces the correct output for the linker.
Note: The old linkage name `linker_private_weak_def_auto' will still parse but
is not a synonym for `linkonce_odr_auto_hide'. This should be removed in 4.0.
<rdar://problem/11754934>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162114 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 18:33:14 +00:00
Jakob Stoklund Olesen
1f1ab3e9c4
Add comment, clean up code. No functional change.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162107 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 16:59:09 +00:00
Tim Northover
3c8ad92455
Implement NEON domain switching for scalar <-> S-register vmovs on ARM
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162094 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 11:32:52 +00:00
Craig Topper
63a99ff53a
Use nested switch to select arguments to reduce calls to EmitPCMP.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162089 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 07:15:56 +00:00
Craig Topper
c087870c47
Make ReplaceATOMIC_BINARY_64 a static function. Use a nested switch to reduce to only a single call to it thus allowing it to be inlined by the compiler.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162088 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 06:55:11 +00:00
Craig Topper
960fb74370
Remove unnecessary include of ARMGenInstrInfo.inc.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162086 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 06:21:09 +00:00
Jakob Stoklund Olesen
083b48af14
Add ADD and SUB to the predicable ARM instructions.
...
It is not my plan to duplicate the entire ARM instruction set with
predicated versions. We need a way of representing predicated
instructions in SSA form without requiring a separate opcode.
Then the pseudo-instructions can go away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162061 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 23:21:55 +00:00
Jakob Stoklund Olesen
053b5b0b3c
Handle ARM MOVCC optimization in PeepholeOptimizer.
...
Use the target independent select analysis hooks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162060 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 23:14:20 +00:00
Roman Divacky
05b2bc8781
Revert r162034, r162035 and r162037.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162039 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 19:07:59 +00:00
Roman Divacky
e88d17de99
Define and handle additional fixup kinds. By Adhemerval Zanella.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162037 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 18:37:52 +00:00
Roman Divacky
0016f73ae5
Fix typo and grammar. By Adhemerval Zanella.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162032 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 18:19:29 +00:00
Jush Lu
2ff4e9d5af
[arm-fast-isel] Add support for fastcc.
...
Without fastcc support, the caller just falls through to CallingConv::C
for fastcc, but callee still uses fastcc, this inconsistency of calling
convention is a problem, and fastcc support can fix it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162013 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 05:15:53 +00:00
Anitha Boyapati
9418f17652
Patch to enable FMA on bdver2 target. Make XOP feature enable FMA4 as well.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162012 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 04:04:02 +00:00
Anitha Boyapati
2e7a01cb42
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162010 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 03:50:04 +00:00
Akira Hatanaka
bb2e1b581a
Add Android ABI to Mips backend to handle functions returning vectors of four
...
floats.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162008 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 03:48:05 +00:00