Commit Graph

117320 Commits

Author SHA1 Message Date
Andrew Trick
688ae334a3 SimplifyIV comments and dead argument cleanup.
Remove crufty comments. IVUsers hasn't been used here for a long time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237586 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 16:49:31 +00:00
James Y Knight
ccafe05df1 Sparc: support the "set" synthetic instruction.
This pseudo-instruction expands into 'sethi' and 'or' instructions,
or, just one of them, if the other isn't necessary for a given value.

Differential Revision: http://reviews.llvm.org/D9089

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237585 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 16:43:33 +00:00
Hal Finkel
292c78ba68 Preserve the order of READ_REGISTER and WRITE_REGISTER
At the present time, we don't have a way to represent general dependency
relationships, so everything is represented using memory dependency. In order
to preserve the data dependency of a READ_REGISTER on WRITE_REGISTER, we need
to model WRITE_REGISTER as writing (which we had been doing) and model
READ_REGISTER as reading (which we had not been doing). Fix this, and also the
way that the chain operands were generated at the SDAG level.

Patch by Nicholas Paul Johnson, thanks! Test case by me.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237584 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 16:42:10 +00:00
Oliver Stannard
0139af335f Revert r237579, as it broke windows buildbots
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237583 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 16:39:16 +00:00
James Y Knight
1467a41471 Sparc: Support PSR, TBR, WIM read/write instructions.
Differential Revision: http://reviews.llvm.org/D8971

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237582 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 16:38:47 +00:00
James Y Knight
ee058202fa Sparc: Add the "alternate address space" load/store instructions.
- Adds support for the asm syntax, which has an immediate integer
  "ASI" (address space identifier) appearing after an address, before
  a comma.

- Adds the various-width load, store, and swap in alternate address
  space instructions. (ldsba, ldsha, lduba, lduha, lda, stba, stha,
  sta, swapa)

This does not attempt to hook these instructions up to pointer address
spaces in LLVM, although that would probably be a reasonable thing to
do in the future.

Differential Revision: http://reviews.llvm.org/D8904

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237581 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 16:35:04 +00:00
James Y Knight
f272788a95 Add support for the Sparc implementation-defined "ASR" registers.
(Note that register "Y" is essentially just ASR0).

Also added some test cases for divide and multiply, which had none before.

Differential Revision: http://reviews.llvm.org/D8670

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237580 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 16:29:48 +00:00
Oliver Stannard
d811b4bacb [LLVM - ARM/AArch64] Add ACLE special register intrinsics
This patch implements LLVM support for the ACLE special register intrinsics in
section 10.1, __arm_{w,r}sr{,p,64}.

This patch is intended to lower the read/write_register instrinsics, used to
implement the special register intrinsics in the clang patch for special
register intrinsics (see http://reviews.llvm.org/D9697), to ARM specific
instructions MRC,MCR,MSR etc. to allow reading an writing of coprocessor
registers in AArch32 and AArch64. This is done by inspecting the register
string passed to the intrinsic and then lowering to the appropriate
instruction.

Patch by Luke Cheeseman.

Differential Revision: http://reviews.llvm.org/D9699



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237579 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 16:23:33 +00:00
Hal Finkel
b6f6eee8fd [DAGCombine] Be more pedantic about use iteration in CombineToPreIndexedLoadStore
In CombineToPreIndexedLoadStore, when the offset is a constant, we have code
that looks for other uses of the pointer which are constant offset computations
so that they can be rewritten in terms of the updated pointer so that we don't
need to keep a copy of the base pointer to compute these constant offsets.

Unfortunately, when it iterated over the uses, it did so by SDNodes, and so we
could confuse ourselves if the base pointer was produced by a node that had
multiple results (because we would not immediately exclude uses of the other
node results). This was reported as PR22755. Unfortunately, we don't have a
test case (and I've also been unable to produce one thus far), but at least the
mistake is clear. The right way to fix this problem is to make use of the information
contained in the use iterators to filter out any uses of other results of the
node producing the base pointer.

This should be mostly NFC, but should also fix PR22755 (for which,
unfortunately, we have no in-tree test case).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237576 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 15:46:02 +00:00
Adam Nemet
a4c8c9292b [LoopAccesses] If shouldRetryWithRuntimeCheck, reset InterestingDependences
When dependence analysis encounters a non-constant distance between
memory accesses it aborts the analysis and falls back to run-time checks
only.  In this case we weren't resetting the array of dependences.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237574 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 15:37:03 +00:00
Adam Nemet
2f2bbe4ced [LoopAccesses] Rearrange printed lines in -analyze
"Store to invariant address..." is moved as the last line.  This is not
the prime result of the analysis.  Plus it simplifies some of the tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237573 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 15:36:57 +00:00
Adam Nemet
59f6c04f94 [LoopAccesses] Debug improvement
Report pointers with unknown bounds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237572 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 15:36:52 +00:00
Jozef Kolek
865eb964f3 [mips][microMIPSr6] Implement ALIGN and AUI instructions
This patch implements ALIGN and AUI instructions using mapping.

Differential Revision: http://reviews.llvm.org/D8782


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237563 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 11:44:30 +00:00
Elena Demikhovsky
1c21f2ef8c AVX-512: Added intrinsics for ADDSS/D, MULSS/D, SUBSS/D, DIVSS/D
instructions. These intrinsics are comming with rounding mode.
Added intrinsics for MAXSS/D, MINSS/D - with and without  sae.

By Asaf Badouh (asaf.badouh@intel.com)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237560 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 07:24:19 +00:00
Elena Demikhovsky
324d41ce49 fixed compilation warning/error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237559 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 07:10:25 +00:00
Elena Demikhovsky
d026e5020b AVX-512: Added patterns for scalar-to-vector broadcast
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237558 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 07:06:23 +00:00
Elena Demikhovsky
c4a426be4f AVX-512: Added VBROADCASTF64X4, VBROADCASTF64X2, VBROADCASTI32X8, and other instructions from this set
Added encoding tests.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237557 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 06:42:57 +00:00
Hal Finkel
78ce816d3f [PowerPC] Add extra r2 read deps on @toc@l relocations
If some commits are happy, and some commits are sad, this is a sad commit. It
is sad because it restricts instruction scheduling to work around a binutils
linker bug, and moreover, one that may never be fixed. On 2012-05-21, GCC was
updated not to produce code triggering this bug, and now we'll do the same...

When resolving an address using the ELF ABI TOC pointer, two relocations are
generally required: one for the high part and one for the low part. Only
the high part generally explicitly depends on r2 (the TOC pointer). And, so,
we might produce code like this:

.Ltmp526:
        addis 3, 2, .LC12@toc@ha
.Ltmp1628:
        std 2, 40(1)
        ld 5, 0(27)
        ld 2, 8(27)
        ld 11, 16(27)
        ld 3, .LC12@toc@l(3)
        rldicl 4, 4, 0, 32
        mtctr 5
        bctrl
        ld 2, 40(1)

And there is nothing wrong with this code, as such, but there is a linker bug
in binutils (https://sourceware.org/bugzilla/show_bug.cgi?id=18414) that will
misoptimize this code sequence to this:
        nop
        std     r2,40(r1)
        ld      r5,0(r27)
        ld      r2,8(r27)
        ld      r11,16(r27)
        ld      r3,-32472(r2)
        clrldi  r4,r4,32
        mtctr   r5
        bctrl
        ld      r2,40(r1)
because the linker does not know (and does not check) that the value in r2
changed in between the instruction using the .LC12@toc@ha (TOC-relative)
relocation and the instruction using the .LC12@toc@l(3) relocation.
Because it finds these instructions using the relocations (and not by
scanning the instructions), it has been asserted that there is no good way
to detect the change of r2 in between. As a result, this bug may never be
fixed (i.e. it may become part of the definition of the ABI). GCC was
updated to add extra dependencies on r2 to instructions using the @toc@l
relocations to avoid this problem, and we'll do the same here.

This is done as a separate pass because:
 1. These extra r2 dependencies are not really properties of the
    instructions, but rather due to a linker bug, and maybe one day we'll be
    able to get rid of them when targeting linkers without this bug (and,
    thus, keeping the logic centralized here will make that
    straightforward).
 2. There are ISel-level peephole optimizations that propagate the @toc@l
    relocations to some user instructions, and so the exta dependencies do
    not apply only to a fixed set of instructions (without undesirable
    definition replication).

The test case was reduced with the help of bugpoint, with minimal cleaning. I'm
looking forward to our upcoming MI serialization support, and with that, much
better tests can be created.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237556 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 06:25:59 +00:00
Andrew Trick
01c0018953 MachineScheduler debug output clarity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237545 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-17 23:40:31 +00:00
Andrew Trick
eddedaab45 RegisterPressureTracker: reword stale comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237544 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-17 23:40:27 +00:00
James Molloy
2bb2ea8105 Reapply r237520 with another fix for infinite looping
SimplifyDemandedBits was "simplifying" a constant by removing just sign bits.
This caused a canonicalization race between different parts of instcombine.

Fix and regression test added - third time lucky?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237539 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-17 08:27:27 +00:00
Elena Demikhovsky
a0eb803376 AVX-512: fixed extended load to 512-bit register
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237537 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-17 08:08:06 +00:00
Elena Demikhovsky
84b93666b3 AVX-512: fixed a bug in mask operations - (i1 1) pattern
Filling k-reg with all-ones value was wrong,
(i1 1) should switch on only one bit in mask register



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237536 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-17 07:28:51 +00:00
Logan Chien
9380329c4e Code cleanup: Reindent Fuzzer::MutateAndTestOne.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237533 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-17 02:44:31 +00:00
James Molloy
cca49027ef Revert commits r237521 and r237520.
The AArch64 LNT bot is unhappy - I've found that the problem is in
SimpliftDemandedBits, but that's going to require another code review
so reverting in the meantime.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237528 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 21:27:14 +00:00
Benjamin Kramer
e9fd02be07 Move Pass into anonymous namespace. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237526 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 16:16:35 +00:00
Benjamin Kramer
11ba91f321 [WinEH] Push unique_ptr through the Action interface.
This was the source of many leaks in the past, this should fix them once and
for all.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237524 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 15:40:03 +00:00
Benjamin Kramer
a0b851cb9c DenseMap: Remove poisoning of unused memory.
DenseMap has great support for catching invalidated iterators now so we can get
rid of this crude hack. Use after frees are covered by asan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237523 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 14:19:54 +00:00
Benjamin Kramer
8ef9968822 MC: Lower the default alignment of MCContext's operator new to 8
This is more than sufficient for all MC types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237522 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 13:54:08 +00:00
James Molloy
ea08c0b975 Update to r237520 - swap order of CHECK-NEXT lines.
... I'd copied the check-next lines from a previous test so they were
slightly wrong, and had managed to test the wrong source tree. D'oh!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237521 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 13:26:25 +00:00
James Molloy
bc71c2fd8e Reapply r237453 with a fix for the test timeouts.
The test timeouts were due to instcombine fighting itself. Regression test added.
Original log message:

Canonicalize min/max expressions correctly.

This patch introduces a canonical form for min/max idioms where one operand
is extended or truncated. This often happens when the other operand is a
constant. For example:

  %1 = icmp slt i32 %a, i32 0
    %2 = sext i32 %a to i64
      %3 = select i1 %1, i64 %2, i64 0

Would now be canonicalized into:

  %1 = icmp slt i32 %a, i32 0
    %2 = select i1 %1, i32 %a, i32 0
      %3 = sext i32 %2 to i64

This builds upon a patch posted by David Majenemer
(https://www.marc.info/?l=llvm-commits&m=143008038714141&w=2). That pass
passively stopped instcombine from ruining canonical patterns. This
patch additionally actively makes instcombine canonicalize too.

Canonicalization of expressions involving a change in type from int->fp
or fp->int are not yet implemented.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237520 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 13:10:45 +00:00
Daniel Sanders
f01f1c413a [x86] Distinguish the 'o', 'v', 'X', and 'i' inline assembly memory constraints.
Summary:
But still handle them the same way since I don't know how they differ on
this target.

Of these, 'o' and 'v' are not tested but were already implemented.

I'm not sure why 'i' is required for X86 since it's supposed to be an
immediate constraint rather than a memory constraint. A test asserts
without it so I've included it for now.

No functional change intended.

Reviewers: nadav

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8254


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237517 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 12:09:54 +00:00
Renato Golin
39dd163cdb Improve check on git-svnrevert, better error message
When the commit is not in the tree at all, find-rev returns 0
and prints an empty string. We need to catch that problem too,
when trying to revert.

Adding a list of possible problems, so that you can easily and
quickly correct without having to edit the script again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237516 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 10:23:48 +00:00
Craig Topper
d43901cbb1 [TableGen] Change 'car' to 'head' and 'cdr' to 'tail' in assert comments. These were the old names for these operations long ago. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237514 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 05:42:13 +00:00
Craig Topper
5dddb1909c [TableGen] Remove !! that I can't really explain why I wrote. Also remove some unnecessary curly braces from the same area.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237513 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 05:42:11 +00:00
Craig Topper
819ce3c51d Correct indentation. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237512 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 05:42:08 +00:00
Craig Topper
a4b093e2d3 [TableGen] Restructure a loop to make it exit early instead of skipping a portion of the body based on what will also be the terminating condition. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237511 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 05:42:03 +00:00
Matthias Braun
3ac70da982 MachineSink: Collect registers before clearing their killflags.
Currently whenever we sink any instruction, we do clearKillFlags for
every use of every use operand for that instruction, apparently there
are a lot of duplication, therefore compile time penalties.

This patch collect all the interested registers first, do clearKillFlags
for it all together at once at the end, so we only need to do
clearKillFlags once for one register, duplication is avoided.

Patch by Lawrence Hu!

Differential Revision: http://reviews.llvm.org/D9719

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237510 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 03:11:07 +00:00
Ahmed Bougacha
8081057fca [MemCpyOpt] Turn memcpy from just-memset'd source into memset.
There's no point in copying around constants, so, when all else fails,
we can still transform memcpy of memset into two independent memsets.

To quote the example, we can turn:
  memset(dst1, c, dst1_size);
  memcpy(dst2, dst1, dst2_size);
into:
  memset(dst1, c, dst1_size);
  memset(dst2, c, dst2_size);
When dst2_size <= dst1_size.

Like r235232 for copy constructors, this can occur in move constructors.

Differential Revision: http://reviews.llvm.org/D9682


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237506 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 01:32:26 +00:00
Ahmed Bougacha
487db4685a [MemCpyOpt] Remove dead argument. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237503 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 01:23:47 +00:00
Duncan P. N. Exon Smith
57e32d40b7 MC: Use MCSymbol in RelAndSymbol, NFC
Switch from `MCSymbolData` to `MCSymbol`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237502 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 01:14:19 +00:00
Ahmed Bougacha
43c7aeef66 Remove dead code in testcase. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237501 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 01:10:40 +00:00
Bill Schmidt
24f0469865 [PPC64] Add vector pack/unpack support from ISA 2.07
This patch adds support for the following new instructions in the
Power ISA 2.07:

  vpksdss
  vpksdus
  vpkudus
  vpkudum
  vupkhsw
  vupklsw

These instructions are available through the vec_packs, vec_packsu,
vec_unpackh, and vec_unpackl built-in interfaces.  These are
lane-sensitive instructions, so the built-ins have different
implementations for big- and little-endian, and the instructions must
be marked as killing the vector swap optimization for now.

The first three instructions perform saturating pack operations.  The
fourth performs a modulo pack operation, which means it can be
represented with a vector shuffle, and conversely the appropriate
vector shuffles may cause this instruction to be generated.  The other
instructions are only generated via built-in support for now.

Appropriate tests have been added.

There is a companion patch to clang for the rest of this support.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237499 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 01:02:12 +00:00
Duncan P. N. Exon Smith
9e6378de57 MC: Use MCSymbol in MCObject::IsSymbolRefDifferenceFullyResolvedImpl()
Transition one API from `MCSymbolData` to `MCSymbol`.  The function
needs both, and the backpointer from `MCSymbolData` to `MCSymbol` is
going away.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237498 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 01:01:55 +00:00
Duncan P. N. Exon Smith
5f7c1f8415 MC: Change MCFragment::Atom to an MCSymbol, NFC
Change `MCFragment::Atom` from an `MCSymbolData` to an `MCSymbol`,
moving in the direction of removing the back-pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237497 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 00:48:58 +00:00
Duncan P. N. Exon Smith
a5bb842d95 MC: Change MCAssembler::Symbols to store MCSymbol, NFC
Instead of storing a list of the `MCSymbolData` in use, store the
`MCSymbol`s.  Churning in the direction of removing the back pointer
from `MCSymbolData`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237496 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 00:35:24 +00:00
Filipe Cabecinhas
ddf553bb8d [BitcodeReader] Don't allow INSERTVAL/EXTRACTVAL with 0 indices
This would trigger an assertion later.

Bug found with AFL fuzz.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237494 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 00:33:12 +00:00
Duncan P. N. Exon Smith
c5f2ba0401 MC: Merge MCSymbol and MCSymbolData
Turn `MCSymbolData` into a field inside of `MCSymbol`.  Keep all the old
API alive for now, so that consumers can be updated in a later commit.
This means we still temporarily need the back pointer from
`MCSymbolData` to `MCSymbol`, but I'll remove it in a follow-up.

This optimizes for object emission over assembly emission.  By removing
the `DenseMap` in `MCAssembler`, llc memory usage drops from around 1040
MB to 1001 MB (3.8%).

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237490 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 00:03:06 +00:00
Duncan P. N. Exon Smith
b42b9f8563 MC: Move MCSymbolData to MCSymbol.h, NFC
Prepare for always including symbol data in MCSymbol.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237489 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 00:03:00 +00:00
Filipe Cabecinhas
6bde794d52 Remove redundant checks. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237488 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-15 23:57:13 +00:00