Anton Korobeynikov
6ad8256d76
Properly set arguments bitwidth of EHSELECT node
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36654 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-02 22:15:48 +00:00
Devang Patel
3e15bf33e0
Use 'static const char' instead of 'static const int'.
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Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36652 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-02 21:39:20 +00:00
Devang Patel
794fd75c67
Do not use typeinfo to identify pass in pass manager.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36632 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 21:15:47 +00:00
Evan Cheng
498f55989a
Forgot about chain result; also UNDEF cannot have multiple values.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36622 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 08:53:39 +00:00
Evan Cheng
45a7ca9b23
* Only turn a load to UNDEF if all of its outputs have no uses (indexed loads
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produce two results.)
* Do not touch volatile loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36604 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 00:38:21 +00:00
Chris Lattner
e7cf56aeee
Continue refactoring inline asm code. If there is an earlyclobber output
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register, preallocate all input registers and the early clobbered output.
This fixes PR1357 and CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36599 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-30 21:11:17 +00:00
Chris Lattner
bf996f1d5e
refactor GetRegistersForValue to take OpInfo as an argument instead of various
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pieces of it. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36592 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-30 17:29:31 +00:00
Chris Lattner
3ff90dc1c8
refactor some code, no functionality change
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36590 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-30 17:16:27 +00:00
Chris Lattner
6995cf6015
generalize aggregate handling
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36568 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-29 18:58:03 +00:00
Chris Lattner
09e4b7e1b7
memory operands that have a direct operand should have their stores created
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before the copies into physregs are done. This avoids having flag operands
skip the store, causing cycles in the dag at sched time. This fixes infinite
loops on these tests:
test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll for PR1308
test/CodeGen/PowerPC/2007-01-29-lbrx-asm.ll
test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll
test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll for PR828
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36547 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-28 21:12:06 +00:00
Chris Lattner
c83994e5d4
eliminate more redundant constraint type analysis
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36546 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-28 21:03:16 +00:00
Chris Lattner
2a600be226
merge constraint type analysis stuff together.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36545 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-28 21:01:43 +00:00
Chris Lattner
0c58340aea
Significant refactoring of the inline asm stuff, to support future changes.
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No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36544 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-28 20:49:53 +00:00
Chris Lattner
44b2c5098f
memory inputs to an inline asm are required to have an address available.
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If the operand is not already an indirect operand, spill it to a constant
pool entry or a stack slot.
This fixes PR1356 and CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36536 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-28 06:42:38 +00:00
Chris Lattner
f2f3cd5129
Fix CodeGen/Generic/2007-04-27-LargeMemObject.ll and
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CodeGen/Generic/2007-04-27-InlineAsm-X-Dest.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36534 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-28 06:08:13 +00:00
Chris Lattner
b017318122
Fix this to match change to InlineAsm class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36524 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-28 04:05:59 +00:00
Chris Lattner
eb7f34f2cb
Fix incorrect legalization of EHSELECTOR. This fixes
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CodeGen/Generic/2007-04-14-EHSelectorCrash.ll and PR1326
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36510 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 17:12:52 +00:00
Evan Cheng
4c6cfad85e
Expand UINT_TO_FP in turns of SINT_TO_FP when UINTTOFP_* libcalls are not available.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36501 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 07:33:31 +00:00
Chris Lattner
99f9a77c49
improve EH global handling, patch by Duncan Sands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36499 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 01:20:11 +00:00
Chris Lattner
64c0f84c72
enable Anton's shift/and switch lowering stuff! It now passes ppc bootstrap
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successfully! woohoo...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36496 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-26 21:09:43 +00:00
Anton Korobeynikov
ab8fd40403
Fixx off-by-one bug, which prevents llvm-gcc bootstrap on ppc32
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36490 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-26 20:44:04 +00:00
Dan Gohman
edc1d15984
Fix a typo in a comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36485 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-26 19:40:56 +00:00
Evan Cheng
c1a3520580
This was lefted out. Fixed sumarray-dbl.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36445 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 18:33:21 +00:00
Chris Lattner
6266c18ea1
allow support for 64-bit stack objects
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36420 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 04:08:28 +00:00
Chris Lattner
964dd86054
Be more careful about folding op(x, undef) when we have vector operands.
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This fixes CodeGen/X86/2007-04-24-VectorCrash.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36413 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 00:00:45 +00:00
Bill Wendling
95b3955034
Assertion when using a 1-element vector for an add operation. Get the
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real vector type in this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36402 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-24 21:13:23 +00:00
Scott Michel
f147a8d56e
Use '-1U' where '-1UL' is obvious overkill, eliminating gcc warnings about
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tests always being true in the process.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36387 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-24 01:24:20 +00:00
Christopher Lamb
95c218a83e
PR400 phase 2. Propagate attributed load/store information through DAGs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36356 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-22 23:15:30 +00:00
Lauro Ramos Venancio
2c5c111b6c
X86 TLS: Implement review feedback.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36318 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-21 20:56:26 +00:00
Reid Spencer
c67bdc288a
Revert Christopher Lamb's load/store alignment changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36309 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-21 18:36:27 +00:00
Christopher Lamb
2330e4d4c4
add support for alignment attributes on load/store instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36301 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-21 08:16:25 +00:00
Lauro Ramos Venancio
0d3b67809c
Allow the lowering of ISD::GLOBAL_OFFSET_TABLE.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36290 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-20 23:02:39 +00:00
Lauro Ramos Venancio
b3a0417cad
Implement "general dynamic", "initial exec" and "local exec" TLS models for
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X86 32 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36283 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-20 21:38:10 +00:00
Chris Lattner
61a4c072b9
allow SRL to simplify its operands, as it doesn't demand all bits as input.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36245 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-18 03:06:49 +00:00
Chris Lattner
ec06e9a670
When replacing a node in SimplifyDemandedBits, if the old node used any
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single-use nodes, they will be dead soon. Make sure to remove them before
processing other nodes. This implements CodeGen/X86/shl_elim.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36244 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-18 03:05:22 +00:00
Chris Lattner
0a16a1f738
fix a pasto
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36242 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-18 03:01:40 +00:00
Chris Lattner
8c7d2d56bf
Fix a bug in my previous patch, grabbing the shift amount width from the
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wrong operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36223 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 22:53:02 +00:00
Chris Lattner
895c4ab564
Fold (x << c1)>> c2 into a single shift if the bits shifted out aren't used.
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This compiles:
int baz(long long a) { return (short)(((int)(a >>24)) >> 9); }
into:
_baz:
srwi r2, r3, 1
extsh r3, r2
blr
on PPC, instead of:
_baz:
slwi r2, r3, 8
srwi r2, r2, 9
extsh r3, r2
blr
GCC produces:
_baz:
srwi r10,r4,24
insrwi r10,r3,24,0
srawi r9,r3,24
srawi r3,r10,9
extsh r3,r3
blr
This implements CodeGen/PowerPC/shl_elim.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36221 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 21:14:16 +00:00
Chris Lattner
95a5e0507e
SIGN_EXTEND_INREG does not demand its top bits. Give SimplifyDemandedBits
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a chance to hack on it. This compiles:
int baz(long long a) { return (short)(((int)(a >>24)) >> 9); }
into:
_baz:
slwi r2, r3, 8
srwi r2, r2, 9
extsh r3, r2
blr
instead of:
_baz:
srwi r2, r4, 24
rlwimi r2, r3, 8, 0, 23
srwi r2, r2, 9
extsh r3, r2
blr
This implements CodeGen/PowerPC/sign_ext_inreg1.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36212 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 19:03:21 +00:00
Anton Korobeynikov
bed2946a96
Removed tabs everywhere except autogenerated & external files. Add make
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target for tabs checking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36146 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-16 18:10:23 +00:00
Chris Lattner
1c35968d4d
disable switch lowering using shift/and. It still breaks ppc bootstrap for
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some reason. :( Will investigate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36011 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 19:39:41 +00:00
Anton Korobeynikov
e01017bba4
Fix PR1325: Case range optimization was performed in the case it
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shouldn't. Also fix some "latent" bug on 64-bit platforms
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35990 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 13:25:55 +00:00
Chris Lattner
3ff981749b
disable shift/and lowering to work around PR1325 for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35985 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 02:26:56 +00:00
Anton Korobeynikov
8085bcfdca
Fix PR1323 : we haven't updated phi nodes in good manner :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35963 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-13 06:53:51 +00:00
Chris Lattner
3a508c94a6
the result of an inline asm copy can be an arbitrary VT that the register
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class supports. In the case of vectors, this means we often get the wrong
type (e.g. we get v4f32 instead of v8i16). Make sure to convert the vector
result to the right type. This fixes CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35944 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 06:00:20 +00:00
Chris Lattner
4829b1c6ab
fold noop vbitconvert instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35943 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 05:58:43 +00:00
Chris Lattner
c2941779c3
Fix weirdness handling single element vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35941 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 04:44:28 +00:00
Reid Spencer
f75b874957
For PR1284:
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Implement the "part_set" intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35938 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 02:48:46 +00:00
Chris Lattner
c24bbaddf8
fix an infinite loop compiling ldecod, notice by JeffC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35910 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-11 16:51:53 +00:00
Chris Lattner
1eba01e9a0
Fix this harder.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35888 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-11 06:50:51 +00:00