Bill Wendling
6bc105a7b9
Add binary emission stuff for VLDM/VSTM. This reuses the
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"getRegisterListOpValue" logic. If the registers are double or single precision,
the value returned is suitable for VLDM/VSTM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119435 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 00:45:23 +00:00
Bill Wendling
3380f6a4d0
Use the correct variable names so that the encodings will be correct.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119403 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-16 23:44:49 +00:00
Jim Grosbach
7911916cf7
ARM conditional mov encoding fix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119354 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-16 18:13:42 +00:00
Bill Wendling
1eeb2806cb
L_bit doesn't work here.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119325 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-16 02:20:22 +00:00
Bill Wendling
7b71878d9f
- Remove dead patterns.
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- Add encodings to the *LDMIA_RET instrs. Probably not needed...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119323 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-16 02:08:45 +00:00
Bill Wendling
73c57e149c
vldm and vstm are mnemonics for vldmia and vstmia resp.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119321 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-16 02:00:24 +00:00
Bill Wendling
73fe34a3ee
Encode the multi-load/store instructions with their respective modes ('ia',
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'db', 'ib', 'da') instead of having that mode as a separate field in the
instruction. It's more convenient for the asm parser and much more readable for
humans.
<rdar://problem/8654088>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119310 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-16 01:16:36 +00:00
Owen Anderson
c56dcbf641
Add Thumb2 encodings for mov and friends.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119295 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-16 00:29:56 +00:00
Owen Anderson
da663f7b51
Attempt to provide encodings for some miscellaneous Thumb2 encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119187 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 21:30:39 +00:00
Evan Cheng
eb96a2f6c0
Code clean up. The peephole pass should be the one updating the instruction
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iterator, not TII->OptimizeCompareInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119186 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 21:20:45 +00:00
Owen Anderson
2c4c45deb6
Provide Thumb2 encodings for sxtb and friends.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119185 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 21:12:05 +00:00
Eric Christopher
76dda7ec1d
Recommit this change and remove the failing part of the test - it didn't
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pass in the first place and was masked by earlier failures not warning
and aborting the block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119184 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 21:11:06 +00:00
Jim Grosbach
99f53d13ef
ARM LDR_PRE/LDR_POST/STR_PRE/STR_POST (and the *B counterparts) binary encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119180 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 20:47:07 +00:00
Owen Anderson
bb6315d1e4
Add Thumb2 encodings for comparison and shift operators.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119176 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 19:58:36 +00:00
Owen Anderson
a99e778ed8
Add correct Thumb2 encodings for mvn and friends.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119170 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 18:45:17 +00:00
Jim Grosbach
11bbeecdf1
Add FIXMEs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119167 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 18:36:48 +00:00
Jim Grosbach
17e967eac2
Nuke redundant encoding bit set.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119164 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 18:17:24 +00:00
Chris Lattner
2ac190238e
add fields to the .td files unconditionally, simplifying tblgen a bit.
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Switch the ARM backend to use 'let' instead of 'set' with this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119120 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 05:19:05 +00:00
Evan Cheng
fbc8c67992
Make sure ARM multi load / store pass copies memoperands when forming ldrd / strd. pr8113.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119109 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 03:30:30 +00:00
Chris Lattner
65a0adb597
silence a ton of warnings from clang.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119102 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 01:45:44 +00:00
Anton Korobeynikov
a460e4a142
Attempt to unbreak cmake-based builds
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119098 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 00:48:12 +00:00
Anton Korobeynikov
3346491223
First step of huge frame-related refactoring: move emit{Prologue,Epilogue} out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119097 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 00:06:54 +00:00
Chris Lattner
77ec256be6
trim #includes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119075 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 21:16:04 +00:00
Chris Lattner
30e2cc254b
rename LowerToMCInst -> LowerARMMachineInstrToMCInst.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119071 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 21:00:02 +00:00
Chris Lattner
1612a619f1
even more simplifications. ARM MCInstLowering is now just
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a single function instead of a class. It doesn't need the
complexity that X86 does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119070 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 20:58:38 +00:00
Chris Lattner
b16ddb1fb3
more shrinkification
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119068 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 20:41:53 +00:00
Chris Lattner
de36af4c15
more simplifications.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119067 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 20:40:08 +00:00
Chris Lattner
112f2390e1
simplify and tidy up
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119066 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 20:31:06 +00:00
Chris Lattner
60d5b5fdee
stub out a powerpc MCInstPrinter implementation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119059 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 19:40:38 +00:00
Owen Anderson
83da6cd5e2
Second attempt at providing correct encodings for Thumb2 binary operators.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119029 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 05:37:38 +00:00
Bill Wendling
c93989a060
Comment out the defms until they're activated.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119000 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-13 11:20:05 +00:00
Bill Wendling
ddc918b379
Add uses of the *_ldst_multi multiclasses. These aren't used yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118999 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-13 10:57:02 +00:00
Bill Wendling
1f4abcfa5c
Convert the modes to lower case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118998 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-13 10:43:34 +00:00
Bill Wendling
04863d06fb
Minor cleanups:
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- Get the opcode once.
- Add a ParserMatchClass to reglist.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118997 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-13 10:40:19 +00:00
Bill Wendling
6c470b806f
Add *_ldst_mult multiclasses to the ARM back-end. These will be used in the
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future to separate out the ia, ib, da, db variants of the load/store multiple
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118995 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-13 09:09:38 +00:00
Daniel Dunbar
115a3dd066
MC: Simplify Mach-O and ELF object writer implementations.
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- What was I thinking?????
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118992 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-13 07:33:40 +00:00
Evan Cheng
c47f7d643e
Conditional moves are slightly more expensive than moves.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118985 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-13 05:14:20 +00:00
Evan Cheng
63f3544a7f
Add conditional move of large immediate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118968 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-13 02:25:14 +00:00
Jim Grosbach
df7e0f8d5d
Swap multiclass operand order for consistency with other patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118965 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-13 01:28:30 +00:00
Jim Grosbach
0f6e33b0c8
Continue ARM indexed load refactoring. Multiclass for LDR{B} pre/post indexed
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instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118963 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-13 01:07:20 +00:00
Jim Grosbach
9e0bfb5829
More ARM load/store indexed refactoring. Also fix an incorrect IndexMode
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flag for the LDRT/STRT family instructions as a side effect.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118955 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-13 00:35:48 +00:00
Evan Cheng
e5e0ef180e
Fix an obvious typo which inverted an immediate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118951 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-13 00:27:47 +00:00
Eric Christopher
84e86c0156
Temporarily revert this.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118946 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-12 23:50:48 +00:00
Evan Cheng
11c11f8ab0
For pre-v6t2 targets, only select MOVi32imm if the immediate can be handled with movi + orr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118945 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-12 23:46:13 +00:00
Owen Anderson
b9a643e2cd
Revert r118939 while I work out why it broke some buildbots.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118942 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-12 23:36:03 +00:00
Owen Anderson
7a6b810dcb
Attemt to provide correct encodings for Thumb2 binary operators.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118939 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-12 23:18:11 +00:00
Evan Cheng
893d7fe209
Eliminate ARM::MOVi2pieces. Just use MOVi32imm and expand it to either movi+orr or movw+movt depending on the subtarget.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118938 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-12 23:03:38 +00:00
Eric Christopher
c0394c0b8c
Make this happen for ARM like x86. Don't entirely bail out when
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an address is in a different block, get it into a register and go
from there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118936 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-12 22:52:32 +00:00
Evan Cheng
875a6ac09a
Add conditional mvn instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118935 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-12 22:42:47 +00:00
Jim Grosbach
e1634e9351
Zap a copy/paste-o bit of dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118926 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-12 21:29:10 +00:00