Bob Wilson
3a6756cb1c
Use pseudo instructions for 2-register Neon instructions for scalar FP.
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Partial fix for Radar 8711675.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-13 21:05:52 +00:00
Bob Wilson
6dbcea1f8e
Remove unused instruction class arguments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121715 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-13 21:05:44 +00:00
Evan Cheng
30fb13f97a
Generalize BFI isel lowering a bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121714 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-13 20:32:54 +00:00
Owen Anderson
c266600bec
In Thumb2, direct branches can be encoded as either a "short" conditional branch with a null predicate, or
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as a "long" direct branch. While the mnemonics are the same, they encode the branch offset differently, and
the Darwin assembler appears to prefer the "long" form for direct branches. Thus, in the name of bitwise
equivalence, provide encoding and fixup support for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121710 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-13 19:31:11 +00:00
Jim Grosbach
56a2535474
Use 32-bit types for 32-bit values.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121709 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-13 19:25:46 +00:00
Jim Grosbach
7e294cfcf9
Trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121708 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-13 19:18:13 +00:00
Evan Cheng
a9688c4b57
(or (and (shl A, #shamt), mask), B) => ARMbfi B, A, ~mask where lsb(mask) == #shamt. rdar://8752056
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121606 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-11 04:11:38 +00:00
Jim Grosbach
092e2cd569
Add FIXME
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121598 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 23:41:10 +00:00
Owen Anderson
63ee22065d
Attempt to get Thumb2 branch fixups working properly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121593 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 23:02:28 +00:00
Owen Anderson
5fd873d8e8
Fix merge error in my last fix to Thumb2 vldr fixups.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121588 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 22:53:48 +00:00
Owen Anderson
e2e0f58809
Fixups for Thumb2 vldr's need to have the effective PC aligned as well.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121587 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 22:46:47 +00:00
Bill Wendling
1591b293d6
The MCFixupKindInfo table needs to be in the order that the enums were
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declared. Add a note specifying this and spruce up the list a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121586 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 22:37:19 +00:00
Owen Anderson
ac00e96273
Provide the necessary post-encoder hook for Thumb2 encodings of VMOV and friends.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121585 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 22:32:08 +00:00
Bob Wilson
746fa17d59
Add float patterns for Neon vld1-lane/dup and vst1-lane operations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121583 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 22:13:32 +00:00
Bob Wilson
20d5515aa5
Remove unused arguments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121582 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 22:13:24 +00:00
Owen Anderson
0f4b60d43a
Fix encoding of Thumb1 LDRB and STRB.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121581 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 22:11:13 +00:00
Jim Grosbach
7bf4c02789
Trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121580 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 21:57:34 +00:00
Owen Anderson
808c7d1482
Fix Thumb2 encodings of STREX and LDREX.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121579 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 21:52:38 +00:00
Jim Grosbach
0be099da79
Correct encoding of rotation immediate for Thumb2 instructions. rdar://8755999
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121525 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 21:24:18 +00:00
Jim Grosbach
90cc533fda
Fix encoding of 'U' bit for Thumb2 STRD/LDRD instructions. rdar://8755726
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121524 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 21:05:07 +00:00
Jim Grosbach
683fc3e9af
More trivial cleanup. No need to define the EncoderMethod property type. Can
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just assign to it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121523 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 20:53:44 +00:00
Jim Grosbach
04da9bf9f1
Tidy up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121522 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 20:51:35 +00:00
Jim Grosbach
a79bd0e1e0
Trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121521 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 20:47:29 +00:00
Bob Wilson
a92bac64cb
Fix some invalid alignments for Neon vld-dup and vld/st-lane instructions.
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Alignments smaller than the total size of the memory being loaded or stored,
unless the alignment is 8 bytes, are not allowed. Add tests for this, too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121506 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 19:37:42 +00:00
Jim Grosbach
568f528c99
Teach isCSRestore() that ARM/Thumb2 functions will use post-modify LDR
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instructions to restore a single register rather than an LDM instruction.
rdar://8754999
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121498 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 18:41:15 +00:00
Jim Grosbach
e246717c3a
Thumb unconditional branch binary encoding. rdar://8754994
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121496 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 18:21:33 +00:00
Jim Grosbach
0108645139
Thumb conditional branch binary encodings. rdar://8745367
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121493 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 17:13:40 +00:00
Kevin Enderby
44a9e8f869
Fix the leak from r121401 of the Operands erased in the list but not deleted.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121450 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 01:41:56 +00:00
Bill Wendling
272df516d7
Thumb ldr reg+imm offsets were encoded incorrectly. The scaling factor of the
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t_addrmode_s# address modes is used for ASM printing, not for encoding.
<rdar://problem/8745375>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121417 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 21:49:07 +00:00
Owen Anderson
fe7fac74b4
Use the new IsAligned fixup flag to improve fixup encodings for Thumb2 branches. This is still not perfect,
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but it gets many more of them correct than it did previously.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121414 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 21:34:47 +00:00
Owen Anderson
05018c2f28
Fix an issue in some Thumb fixups, where the effective PC address needs to be 4-byte aligned when calculating
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the offset. Add a new fixup flag to represent this, and use it for the one fixups that I have a testcase for needing
this. It's quite likely that the other Thumb fixups will need this too, and to have their fixup encoding logic
adjusted accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121408 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 20:27:52 +00:00
Jim Grosbach
b492a7c213
Rename CB/CBZ specific fixup accordingly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121404 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 19:50:12 +00:00
Kevin Enderby
193c3acbe5
Add support for parsing ARM arithmetic instructions that update or don't update
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the condition codes. Where the ones that do have an 's' suffix and the ones
that don't don't have the suffix. The trick is if MatchInstructionImpl() fails
we try again after adding a CCOut operand with the correct value and removing
the 's' if present. Four simple test cases added for now, lots more to come.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121401 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 19:19:43 +00:00
Jim Grosbach
027d6e8d1c
Rename the encoder method for t_cbtarget to match.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121399 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 19:04:53 +00:00
Jim Grosbach
cf6220a9de
Thumb needs a few different encoding schemes for branch targets. Rename
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t_brtarget to be more specific.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121398 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 19:01:46 +00:00
Jim Grosbach
c6f9261711
ARM stm/ldm instructions require more than one register in the register list.
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Otherwise, a plain str/ldr should be used instead. Make sure we account for
that in prologue/epilogue code generation.
rdar://8745460
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121391 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 18:31:13 +00:00
Jim Grosbach
bfd0daa6a6
tidy up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121371 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 16:15:41 +00:00
Jim Grosbach
2a4f0986ac
80 columns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121370 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 16:14:46 +00:00
Owen Anderson
6b0fa635d5
Fix encoding of the immediate operands on post-indexed LDR and friends.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121354 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 02:56:12 +00:00
Eric Christopher
1a48c032bd
Fix up some comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121351 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 01:57:45 +00:00
Owen Anderson
d7b3f5870d
Fix Thumb2 fixups for ldr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121350 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 01:51:07 +00:00
Jim Grosbach
766a63d20e
Add a textual message to the assert.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121349 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 01:23:51 +00:00
Jim Grosbach
9702e6075c
Add a sanity check assert() for t2ADD/SUBrSPi instructions that they really are
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referencing the stack pointer as they say they are.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121347 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 01:22:19 +00:00
Jim Grosbach
cde31293d4
When using multiple instructions to reference a frame index, make sure to
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update the opcode when necessary as well as the source register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121346 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 01:22:13 +00:00
Jim Grosbach
a0e23c5e95
The add/sub SP instructions are really pseudos. The assembler should ignore
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them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121345 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 01:21:27 +00:00
Matt Beaumont-Gay
0a29c270b5
Remove unused variables
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121343 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 01:04:43 +00:00
Owen Anderson
8f07943317
Fix typo in Thumb2 branch fixup.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121342 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 01:02:09 +00:00
Bill Wendling
2fe813af23
Remove extraneous semicolon.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121338 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 00:51:54 +00:00
Bill Wendling
797b7aab35
Attempt to make the bit-twiddling readable resulted in the binary value being
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overwritten.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121337 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 00:44:33 +00:00
Bill Wendling
09aa3f0ef3
The BLX instruction is encoded differently than the BL, because why not? In
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particular, the immediate has 20-bits of value instead of 21. And bit 0 is '0'
always. Going through the BL fixup encoding was trashing the "bit 0 is '0'"
invariant.
Attempt to get the encoding at slightly more correct with this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121336 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 00:39:08 +00:00
Owen Anderson
fb20d89075
Fix Thumb2 BCC encoding and fixups.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121329 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 00:27:41 +00:00
Jason W Kim
045869c12a
Style nit and whitespace cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121317 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 23:35:25 +00:00
Jim Grosbach
60fc2ed2bb
Clean up the add/sub w/ SP source reg instructions in Thumb2 a bit. Add a FIXME
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for more thorough cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121315 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 23:30:19 +00:00
Jim Grosbach
20e0fa698d
Fix T2TwoRegImm and use it for t2ADDrSPi12 and friends.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121314 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 23:24:29 +00:00
Jason W Kim
0062db8b4f
Removed dead comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121313 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 23:19:44 +00:00
Jason W Kim
a0871e7927
ARM/MC/ELF TPsoft is now a proper pseudo inst.
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Added test to check bl __aeabi_read_tp gets emitted properly for ELF/ASM
as well as ELF/OBJ (including fixup)
Also added support for ELF::R_ARM_TLS_IE32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121312 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 23:14:44 +00:00
Jim Grosbach
7685ff84ad
T2TwoRegImm isn't right for t2SUBrSPi12. Use T2I instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121311 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 23:13:01 +00:00
Jim Grosbach
37474e6d68
Add operand encoding for Thumb2 subw SP + imm. rdar://8745434
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121310 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 23:12:09 +00:00
Jim Grosbach
07e9b26371
Add operand encoding for Thumb2 addw Rn + imm. rdar://8745434
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121309 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 23:04:16 +00:00
Bill Wendling
dff2f7151f
Support the "target" encodings for the CB[N]Z instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121308 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 23:01:43 +00:00
Evan Cheng
5d9e016025
Fix an obvious cut-n-paste error.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121307 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 23:01:18 +00:00
Jim Grosbach
b76dfe06d9
Add operand encoding for Thumb2 addw SP + imm. rdar://8745434
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121305 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 22:50:19 +00:00
Jim Grosbach
7c6d85a981
Parameterize opcode encoding bits for Thumb2 extended precision integer
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multiply instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121301 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 22:38:41 +00:00
Jim Grosbach
5208204899
Fix operand encoding for Thumb2 extended precision multiplies. rdar://8745555
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121297 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 22:29:28 +00:00
Jim Grosbach
8638692362
Simplify T2 operand assignment notation a bit. No need to specify a bit range
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for the source field when it's the whole thing that's being referenced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121291 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 22:10:43 +00:00
Jim Grosbach
0c2c217244
Tweak ARM fixup value adjustments for Thumb to better handle the half-word
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ordering of thumb mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121280 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 20:32:07 +00:00
Andrew Trick
6b1207267f
Generalize PostRAHazardRecognizer so it can be used in any pass for
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both forward and backward scheduling. Rename it to
ScoreboardHazardRecognizer (Scoreboard is one word). Remove integer
division from the scoreboard's critical path.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121274 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 20:04:29 +00:00
Owen Anderson
cc78f5c09c
Improve comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121272 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 19:31:11 +00:00
Jim Grosbach
022ab3779c
Add initializer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121262 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 15:36:45 +00:00
Evan Cheng
275bf63115
Add comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121238 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 06:29:02 +00:00
Bill Wendling
b8958b031e
Add support for loading from a constant pool.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121226 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 01:57:09 +00:00
Jim Grosbach
5be6d2af38
Let target asm backends see assembler flags as they go by. Use that to handle
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thumb vs. arm mode differences in WriteNopData().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121219 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 01:16:55 +00:00
Owen Anderson
255eafbd49
Simplify the byte reordering logic slightly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121216 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 00:21:33 +00:00
Owen Anderson
d8e351b96f
VLDR fixups need special handling under Thumb. While the encoding is the same,
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the order of the bytes in the data stream is flipped around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121215 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 00:18:36 +00:00
Matt Beaumont-Gay
2bf315f087
Fix a warning about a variable which is only used in an assertion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121206 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-07 23:26:21 +00:00
Bill Wendling
d832fa053b
Cleanup in the Darwin end. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121198 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-07 23:11:00 +00:00
Evan Cheng
06d65f5156
Fix a bad prologue / epilogue codegen bug where the compiler would emit illegal
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vpush instructions to save / restore VFP / NEON registers like this:
vpush {d8,d10,d11}
vpop {d8,d10,d11}
vpush and vpop do not allow gaps in the register list.
rdar://8728956
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121197 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-07 23:08:38 +00:00
Bill Wendling
52e635ea35
A bit of cleanup: early exit ApplyFixup and cache the Fixup offset. No
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functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121195 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-07 23:05:20 +00:00
Jim Grosbach
d967cd096a
Binary encoding for ARM tLDRspi and tSTRspi.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121186 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-07 21:50:47 +00:00
Owen Anderson
bdf714450b
Fix Thumb2 encoding of the S bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121182 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-07 20:50:15 +00:00
Jim Grosbach
97a884d602
Refactor the ARM CMPz* patterns to just use the normal CMP instructions when
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possible. They were duplicates for everything exception the source pattern
before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121179 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-07 20:41:06 +00:00
Evan Cheng
52f21e35e8
Code clean up; no functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121176 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-07 20:11:46 +00:00
Evan Cheng
9801b5c822
Code clean up; no functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121172 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-07 19:59:34 +00:00
Jim Grosbach
5169220624
Encode the literal field for tCMPzi instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121153 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-07 17:48:24 +00:00
Benjamin Kramer
6aa4943599
Add parens to pacify gcc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121142 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-07 15:50:35 +00:00
Jay Foad
40f8f6264d
PR5207: Change APInt methods trunc(), sext(), zext(), sextOrTrunc() and
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zextOrTrunc(), and APSInt methods extend(), extOrTrunc() and new method
trunc(), to be const and to return a new value instead of modifying the
object in place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121120 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-07 08:25:19 +00:00
Owen Anderson
eb6779c5b9
Second attempt at converting Thumb2's LDRpci, including updating the gazillion places that need to know about it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121082 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-07 00:45:21 +00:00
Jim Grosbach
662a816e89
Add fixup for Thumb1 BL/BLX instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121072 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-06 23:57:07 +00:00
Rafael Espindola
179821ac1f
Remove the instruction fragment to data fragment lowering since it was causing
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freed data to be read. I will open a bug to track it being reenabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121028 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-06 19:08:48 +00:00
Owen Anderson
c76c59840b
Revert r121021, which broke the buildbots.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121026 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-06 18:57:40 +00:00
Jim Grosbach
ba3368ceae
Trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121024 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-06 18:47:44 +00:00
Owen Anderson
4c386fc754
Improve handling of Thumb2 PC-relative loads by converting LDRpci (and friends) to Pseudos.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121021 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-06 18:35:51 +00:00
Jim Grosbach
04f74942f2
Encode the register operand of ARM CondCode operands correctly. ARM::CPSR if
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the instruction is predicated, reg0 otherwise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121020 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-06 18:30:57 +00:00
Jim Grosbach
d67641b6f8
The ARM AsmMatcher needs to know that the CCOut operand is a register value,
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not an immediate. It stores either ARM::CPSR or reg0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121018 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-06 18:21:12 +00:00
Evan Cheng
04e2b639c1
Eliminate unneeded #include's.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120971 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-05 23:41:43 +00:00
NAKAMURA Takumi
714e07f75d
ARM/CMakeLists.txt: Add missing MLxExpansionPass.cpp since r120960.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120966 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-05 23:08:57 +00:00
Evan Cheng
167be80ee7
Code clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120965 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-05 23:03:45 +00:00
Evan Cheng
f79ed109ec
Remove an unused variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120964 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-05 23:03:35 +00:00
Evan Cheng
48575f6ea7
Making use of VFP / NEON floating point multiply-accumulate / subtraction is
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difficult on current ARM implementations for a few reasons.
1. Even though a single vmla has latency that is one cycle shorter than a pair
of vmul + vadd, a RAW hazard during the first (4? on Cortex-a8) can cause
additional pipeline stall. So it's frequently better to single codegen
vmul + vadd.
2. A vmla folowed by a vmul, vmadd, or vsub causes the second fp instruction to
stall for 4 cycles. We need to schedule them apart.
3. A vmla followed vmla is a special case. Obvious issuing back to back RAW
vmla + vmla is very bad. But this isn't ideal either:
vmul
vadd
vmla
Instead, we want to expand the second vmla:
vmla
vmul
vadd
Even with the 4 cycle vmul stall, the second sequence is still 2 cycles
faster.
Up to now, isel simply avoid codegen'ing fp vmla / vmls. This works well enough
but it isn't the optimial solution. This patch attempts to make it possible to
use vmla / vmls in cases where it is profitable.
A. Add missing isel predicates which cause vmla to be codegen'ed.
B. Make sure the fmul in (fadd (fmul)) has a single use. We don't want to
compute a fmul and a fmla.
C. Add additional isel checks for vmla, avoid cases where vmla is feeding into
fp instructions (except for the #3 exceptional case).
D. Add ARM hazard recognizer to model the vmla / vmls hazards.
E. Add a special pre-regalloc case to expand vmla / vmls when it's likely the
vmla / vmls will trigger one of the special hazards.
Work in progress, only A+B are enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120960 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-05 22:04:16 +00:00
Bob Wilson
c24130bade
The Thumb tADDrSPi instruction is not valid when the destination is SP.
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Check for that and try narrowing it to tADDspi instead. Radar 8724703.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120892 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-04 04:40:19 +00:00