Eric Christopher
721ef66d17
Invert the meaning of printAliasInstr's return value. It now returns
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true on success and false on failure. Update callers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129722 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-18 21:28:11 +00:00
Sean Callanan
f6d9109124
Small fix to the ARM AsmParser to ensure that a
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superclass variable is instantiated properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129713 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-18 20:20:44 +00:00
Chris Lattner
202a7a1e3f
Add a new bit that ImmLeaf's can opt into, which allows them to duck out of
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the generated FastISel. X86 doesn't need to generate code to match ADD16ri8
since ADD16ri will do just fine. This is a small codesize win in the generated
instruction selector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129692 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-18 06:36:55 +00:00
Chris Lattner
5662bc959a
switch the rest of the x86 immediate patterns over to ImmLeaf,
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simplifying them and exposing more information to tblgen. It would be nice
if other target authors adopted this as well, particularly arm since it has fastisel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129676 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-17 22:12:55 +00:00
Chris Lattner
7ed1391ff6
now that predicates have a decent abstraction layer on them, introduce a new
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kind of predicate: one that is specific to imm nodes. The predicate function
specified here just checks an int64_t directly instead of messing around with
SDNode's. The virtue of this is that it means that fastisel and other things
can reason about these predicates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129675 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-17 22:05:17 +00:00
Chris Lattner
543790673c
Rework our internal representation of node predicates to expose more
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structure and fix some fixmes. We now have a TreePredicateFn class
that handles all of the decoding of these things. This is an internal
cleanup that has no impact on the code generated by tblgen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129670 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-17 21:38:24 +00:00
Chris Lattner
602fc06817
1. merge fast-isel-shift-imm.ll into fast-isel-x86-64.ll
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2. implement rdar://9289501 - fast isel should fold trivial multiplies to shifts
3. teach tblgen to handle shift immediates that are different sizes than the
shifted operands, eliminating some code from the X86 fast isel backend.
4. Have FastISel::SelectBinaryOp use (the poorly named) FastEmit_ri_ function
instead of FastEmit_ri to simplify code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129666 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-17 20:23:29 +00:00
Chris Lattner
0a1c997c27
fix an x86 fast isel issue where we'd completely give up on folding an address
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when we have a global variable base an an index. Instead, just give up on
folding the global variable.
Before we'd geenrate:
_test: ## @test
## BB#0:
movq _rtx_length@GOTPCREL(%rip), %rax
leaq (%rax), %rax
addq %rdi, %rax
movzbl (%rax), %eax
ret
now we generate:
_test: ## @test
## BB#0:
movq _rtx_length@GOTPCREL(%rip), %rax
movzbl (%rax,%rdi), %eax
ret
The difference is even more significant when there is a scale
involved.
This fixes rdar://9289558 - total fail with addr mode formation at -O0/x86-64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129664 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-17 17:47:38 +00:00
Chris Lattner
685090f598
fix an oversight which caused us to compile the testcase (and other
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less trivial things) into a dummy lea. Before we generated:
_test: ## @test
movq _G@GOTPCREL(%rip), %rax
leaq (%rax), %rax
ret
now we produce:
_test: ## @test
movq _G@GOTPCREL(%rip), %rax
ret
This is part of rdar://9289558
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129662 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-17 17:12:08 +00:00
Chris Lattner
dceb52a01b
tidy up and reduce indentation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129661 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-17 17:05:12 +00:00
Eli Friedman
2f108f81c1
Remove working entry from README.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129654 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-17 02:36:27 +00:00
Francois Pichet
6144686af6
MSVC needs the return 0 to compile.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129640 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-16 13:59:23 +00:00
Rafael Espindola
30deafc84a
Put each personality function in a section. This fixes the gnu ld warning:
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error in foo.o; no .eh_frame_hdr table will be created.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129635 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-16 03:51:21 +00:00
Stuart Hastings
c5eecbc4ec
Correct result when a branch condition is live across a block
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boundary. <rdar://problem/8933028>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129634 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-16 03:31:26 +00:00
Johnny Chen
3a96122c4a
Thumb2 BFC was insufficiently encoded.
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rdar://problem/9292717
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129619 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-15 22:52:15 +00:00
Johnny Chen
a704bc9354
A8.6.315 VLD3 (single 3-element structure to all lanes)
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The a bit must be encoded as 0.
rdar://problem/9292625
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129618 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-15 22:49:08 +00:00
Akira Hatanaka
4552c9a3b3
Reverse unnecessary changes made in r129606 and r129608. There is no change in functionality.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129612 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-15 21:51:11 +00:00
Cameron Zwarich
0cb11ac32f
Add ORR and EOR to the CMP peephole optimizer. It's hard to get isel to generate
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a case involving EOR, so I only added a test for ORR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129610 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-15 21:24:38 +00:00
Akira Hatanaka
6c3541d559
Fix lines that exceed 80 columns. There is no change in functionality.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129608 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-15 21:06:38 +00:00
Akira Hatanaka
0bf3dfbef6
Fix lines that have incorrect indentation or exceed 80 columns. There is no change in functionality.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129606 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-15 21:00:26 +00:00
Cameron Zwarich
b485de5d8c
The AND instruction leaves the V flag unmodified, so it falls victim to the same
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problem as all of the other instructions we fold with CMPs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129602 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-15 20:45:00 +00:00
Rafael Espindola
ed7cd9610a
Fix cmake build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129601 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-15 20:34:45 +00:00
Cameron Zwarich
ca3f6a3925
Add missing register forms of instructions to the ARM CMP-folding code. This
...
fixes <rdar://problem/9287901>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129599 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-15 20:28:28 +00:00
Akira Hatanaka
99a2e98edd
Add pass that expands pseudo instructions into target instructions after register allocation. Define pseudos that get expanded into mtc1 or mfc1 instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129594 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-15 19:52:08 +00:00
Evan Cheng
b6a638898a
Increase SubtargetFeatureKV Value and Implies fields to 64 bits since some targets are getting very close to 32 subtarget features. Also teach tablegen to error when there are more than 64 features to guard against undefined behavior. rdar://9282332
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129590 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-15 19:35:46 +00:00
Rafael Espindola
f0adba9a7e
Add 129518 back with a fix for when we are producing eh just because of debug info.
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Change ELF systems to use CFI for producing the EH tables. This reduces the
size of the clang binary in Debug builds from 690MB to 679MB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129571 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-15 15:11:06 +00:00
Chris Lattner
7a2bdde0a0
Fix a ton of comment typos found by codespell. Patch by
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Luis Felipe Strano Moraes!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129558 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-15 05:18:47 +00:00
NAKAMURA Takumi
bcb8c6d09e
Revert r129518, "Change ELF systems to use CFI for producing the EH tables. This reduces the"
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It broke several builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129557 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-15 03:35:57 +00:00
Evan Cheng
9eec66e604
Fix another fcopysign lowering bug. If src is f64 and destination is f32, don't
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forget to right shift the source by 32 first. rdar://9287902
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129556 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-15 01:31:00 +00:00
Johnny Chen
188ce9c78b
For t2BFI, both Inst{26} and Inst{5} "should" be 0.
...
Ref: I.1 Instruction encoding diagrams and pseudocode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129552 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-15 00:35:08 +00:00
Michael J. Spencer
4babeeeeed
Add 3DNow! intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129551 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-15 00:32:41 +00:00
Johnny Chen
de29a52940
The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions
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(single element or n-element structure to all lanes).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129550 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-15 00:10:45 +00:00
Evan Cheng
06b2a60ef9
Follow up on r127913. Fix Thumb revsh isel. rdar://9286766
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129548 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-14 23:27:44 +00:00
Johnny Chen
cd695fdac1
Add sanity checkings for Thumb2 Load/Store Register Exclusive family of operations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129531 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-14 19:13:28 +00:00
Chris Lattner
b8295f7a0e
move PR9661 out to here.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129527 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-14 18:47:18 +00:00
Rafael Espindola
3dae6e7333
Change ELF systems to use CFI for producing the EH tables. This reduces the
...
size of the clang binary in Debug builds from 690MB to 679MB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129518 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-14 15:18:53 +00:00
Michael J. Spencer
9a0bac41b3
Fix whitespace and tabs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129517 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-14 14:33:36 +00:00
Chris Lattner
df2ef9015f
add a minor missed dag combine that is blocking mid-level optimization
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improvements, that will lead to fixing PR6627.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129504 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-14 04:21:42 +00:00
Bill Wendling
d336de318e
As Dan pointed out, movzbl, movsbl, and friends are nicer than their alias
...
(movzx/movsx) because they give more information. Revert that part of the patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129498 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-14 01:46:37 +00:00
Bill Wendling
c6df9883da
Have the X86 back-end emit the alias instead of what's being aliased. In most
...
cases, it's much nicer and more informative reading the alias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129497 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-14 01:11:51 +00:00
Bill Wendling
eef965f04b
Add an option to not print the alias of an instruction. It defaults to "print
...
the alias".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129485 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13 23:36:21 +00:00
Johnny Chen
e8d087ad35
Thumb disassembler did not handle tBRIND (indirect branch) properly.
...
rdar://problem/9280370
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129480 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13 21:59:01 +00:00
Johnny Chen
6c7e4147dc
Check for unallocated instruction encodings when disassembling Thumb Branch instructions (tBcc and t2Bcc).
...
rdar://problem/9280470
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129471 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13 21:35:49 +00:00
Johnny Chen
471d73d5d3
The LDR*T/STR*T (unpriviledged load/store) operations don't take SP or PC as Rt.
...
rdar://problem/9279440
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129469 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13 21:04:32 +00:00
Cameron Zwarich
5af60ce2a8
Fix a typo in an ARM-specific DAG combine. This fixes <rdar://problem/9278274>.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129468 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13 21:01:19 +00:00
Cameron Zwarich
1335022e19
Fix a regression caused by r102515 where explicit alignment on globals is
...
ignored. There was a test to catch this, but it was just blindly updated in
a large change. This fixes another part of <rdar://problem/9275290>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129466 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13 20:36:04 +00:00
Johnny Chen
9bb386a933
Check the corner cases for t2LDRSHi12 correctly and mark invalid encodings as such.
...
rdar://problem/9276651
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129462 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13 19:46:05 +00:00
Johnny Chen
119af20c7b
Fix a bug where for t2MOVCCi disassembly, the TIED_TO register operand was not properly handled.
...
rdar://problem/9276427
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129456 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13 17:51:02 +00:00
Johnny Chen
6e3ccc3c85
Forgot to add this change for http://llvm.org/viewvc/llvm-project?view=rev&revision=129387 .
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129451 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13 16:56:08 +00:00
Cameron Zwarich
eb04a33dc7
Fix an obvious problem with an alignment computation. AsmPrinter actually does
...
the max itself, so it is not easy to write a test case for this, but I added a
test case that would fail if the code in AsmPrinter were removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129432 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13 09:02:43 +00:00