Commit Graph

112950 Commits

Author SHA1 Message Date
Justin Bogner
bf67bfe6bb InstrProf: Make CounterMappingRegions less confusing to construct
Creating empty and expansion regions is awkward with the current API.
Expose static methods to make this simpler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228075 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 23:59:33 +00:00
Arnaud A. de Grandmaison
f041861302 [PBQP] Provide more information in the debug prints
Based on a patch by Jonas Paulsson

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228068 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 23:40:24 +00:00
Philip Reames
c81fa9543f Use ImmutableCallSite for statepoint verification.
Patch by: Igor Laevsky

"This change generalizes statepoint verification to use ImmutableCallSite instead of CallInst. This will allow to easily implement invoke statepoint verification (in a following change)."

Differential Revision: http://reviews.llvm.org/D7308



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228064 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 23:18:47 +00:00
Adam Nemet
6daac09e80 [LV] Split off memcheck block really at the first check
I've noticed this while trying to move addRuntimeCheck to LoopAccessAnalysis.

I think that the intention was to early exit from the overflow checking before
the code for the memchecks.  This is the entire reason why we compute
FirstCheckInst but then we don't use that as the splitting instruction but the
final check.  Looks like an oversight.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228056 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 22:45:39 +00:00
Chandler Carruth
2e49ac01a6 [x86] Fix signed vs. unsigned comparison.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228055 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 22:43:30 +00:00
Simon Pilgrim
ae43f39965 Fixed unused variable warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228054 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 22:39:28 +00:00
Colin LeMahieu
318defeca7 [Hexagon] Marking a bunch of non-encoded instructions with isCodeGenOnly = 1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228050 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 22:09:51 +00:00
Hans Wennborg
e0621f8f69 [CMake] add_llvm_library: don't use .imp suffix for import libraries on Windows (PR22334)
This was added in r188351 to fix a naming conflict between the
profile_rt-static and profile_rt-shared who both ended up in
lib/profile_rt.lib.

The change also affected other libraries (like libclang), and
users are reporting that they find it surprising that there's
no longer a libclang.lib. Since the profile_rt naming conflict
doesn't seem to exist any more, I think we can remove this.

Differential Revision: http://reviews.llvm.org/D7391

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228049 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 22:08:20 +00:00
Arnaud A. de Grandmaison
85829ef385 [PBQP] Constify Graph::getEdgeNode1Id and Graph::getEdgeNode2Id
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228048 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 22:02:45 +00:00
Simon Pilgrim
3d04e48cb6 [X86][SSE] psrl(w/d/q) and psll(w/d/q) bit shifts for SSE2
Patch to match cases where shuffle masks can be reduced to bit shifts. Similar to byte shift shuffle matching from D5699.

Differential Revision: http://reviews.llvm.org/D6649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228047 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 21:58:29 +00:00
Bill Schmidt
8c775a4e7b [PowerPC] Implement the vpopcnt instructions for POWER8
Patch by Kit Barton.

Add the vector population count instructions for byte, halfword, word,
and doubleword sizes.  There are two major changes here:

    PPCISelLowering.cpp: Make CTPOP legal for vector types.
    PPCRegisterInfo.td: Added v2i64 to the VRRC register
      definition. This is needed for the doubleword variations of the
      integer ops that were added in P8. 

Test Plan

Test the instruction vpcnt* encoding/decoding in ppc64-encoding-vmx.s

Test the generation of the vpopcnt instructions for various vector
data types.  When adding the v2i64 type to the Vector Register set, I
also needed to add the appropriate bit conversion patterns between
v2i64 and the existing vector types.  Testing for these conversions
were also added in the test case by passing a different vector type as
a parameter into the test functions.  There is also a run step that
will ensure the vpopcnt instructions are generated when the vsx
feature is disabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228046 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 21:58:23 +00:00
Kostya Serebryany
04e540582b [fuzzer] Add proper dependensices to the fuzzer tests
Summary: Make sure that FileCheck is built when running check-fuzzer

Test Plan:
run on bot:
lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fuzzer

Reviewers: samsonov

Reviewed By: samsonov

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7387

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228045 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 21:57:32 +00:00
Chandler Carruth
2e3524ec17 [x86] Add two truly horrific test cases for the new vector shuffle
lowering. I'm prepping patches to improve these, and this will let the
delta of those patches show the improvement. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228044 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 21:56:28 +00:00
Chandler Carruth
d5a61c2958 [x86] Update the indent and layout of some tests in this file. NFC
This is just to remove voise from using the update_llc_test_checks
script.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228043 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 21:56:24 +00:00
Duncan P. N. Exon Smith
1602e58745 AsmParser: Recognize DW_TAG_* constants
Recognize `DW_TAG_` constants in assembly, and output it by default for
`GenericDebugNode`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228042 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 21:56:01 +00:00
Duncan P. N. Exon Smith
6adbfa3815 IR: Assembly and bitcode for GenericDebugNode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228041 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 21:54:14 +00:00
Marek Olsak
90eef42c8e R600/SI: Remove the -CHECK suffix from all FileCheck prefixes in LIT tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228040 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 21:53:27 +00:00
Marek Olsak
f34625adbd R600/SI: Remove useless patterns in VALU which are already covered by SALU
Also remove hasPostISelHook=1 from V_LSHL_B32. It's defined by InstSI already.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228039 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 21:53:08 +00:00
Marek Olsak
f8cf57cb0c R600/SI: Rewrite VOP1InstSI to contain a pseudo and _si opcode
What this does is that if you accidentally select these instructions on VI,
the code generation will fail, because the pseudo -> _vi mapping will be
undefined.

The idea is to be able to catch possible future bugs easily.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228038 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 21:53:05 +00:00
Marek Olsak
e1a8ca95be R600/SI: Fix B64 VALU shifts on VI
SI only has standard versions. VI only has REV versions.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228037 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 21:53:01 +00:00
Justin Bogner
a378f917af InstrProf: Remove CoverageMapping::HasCodeBefore, it isn't used
It's not entirely clear to me what this field was meant for, but it's
always false. Remove it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228034 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 21:35:36 +00:00
Chandler Carruth
dc5e49a1c4 [x86] Tweak my update script to use test case function names starting
with 'stress' to indicate that the specific output isn't interesting and
relax them to only check the last instruction (a ret).

I've updated the one test case that really uses this to name the one
'stress_test' which was actually producing output we can directly check.
With this, the script doesn't introduce noise when run over the v16 test
file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228033 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 21:26:45 +00:00
Duncan P. N. Exon Smith
5ff000f15e Support: Add string => unsigned mapping for DW_TAG
Add `dwarf::getTag()` to translate from `StringRef` to `unsigned`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228031 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 21:16:49 +00:00
Duncan P. N. Exon Smith
b3d53c6065 Support: Re-implement dwarf::TagString() using a .def file, NFC
Also re-implements the `dwarf::Tag` enumerator.  I've moved the mock
tags into the enumerator since there's no other way to do this.  Really
they shouldn't be used at all (they're just a hack to identify
`MDNode`s, but we have a class hierarchy for that now).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228030 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 21:13:16 +00:00
Duncan P. N. Exon Smith
17e8d42c63 Support: Stop stringifying DW_TAG_{lo,hi}_user
`dwarf::TagString()` shouldn't stringify `DW_TAG_lo_user` or
`DW_TAG_hi_user`.  These aren't actual tags; they're markers for the
edge of vendor-specific tag regions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228029 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 21:08:33 +00:00
Simon Pilgrim
4855886269 Fixed signed/unsigned comparison warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228027 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 20:54:01 +00:00
Colin LeMahieu
3c159ed1a0 [Hexagon] Converting XTYPE/SHIFT intrinsics. Cleaning out old intrinsic patterns and updating tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228026 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 20:40:52 +00:00
Simon Pilgrim
b559573571 Fixed unused variable warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228025 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 20:38:52 +00:00
Daniel Berlin
403050abcc Allow PRE to insert no-cost phi nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228024 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 20:37:08 +00:00
Simon Pilgrim
646722d55f [X86][SSE] Added general integer shuffle matching for MOVQ instruction
This patch adds general shuffle pattern matching for the MOVQ zero-extend instruction (copy lower 64bits, zero upper) for all 128-bit integer vectors, it is added as a fallback test in lowerVectorShuffleAsZeroOrAnyExtend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228022 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 20:09:18 +00:00
Colin LeMahieu
861e105e61 [Hexagon] Updating XTYPE/PRED intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228019 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 19:43:59 +00:00
Kostya Serebryany
32a12b924e [fuzzer] update the include line to use the new header name
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228018 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 19:42:05 +00:00
Jingyue Wu
2918efd551 Add straight-line strength reduction to LLVM
Summary:
Straight-line strength reduction (SLSR) is implemented in GCC but not yet in
LLVM. It has proven to effectively simplify statements derived from an unrolled
loop, and can potentially benefit many other cases too. For example,

LLVM unrolls

  #pragma unroll
  foo (int i = 0; i < 3; ++i) {
    sum += foo((b + i) * s);
  }

into

  sum += foo(b * s);
  sum += foo((b + 1) * s);
  sum += foo((b + 2) * s);

However, no optimizations yet reduce the internal redundancy of the three
expressions:

  b * s
  (b + 1) * s
  (b + 2) * s

With SLSR, LLVM can optimize these three expressions into:

  t1 = b * s
  t2 = t1 + s
  t3 = t2 + s

This commit is only an initial step towards implementing a series of such
optimizations. I will implement more (see TODO in the file commentary) in the
near future. This optimization is enabled for the NVPTX backend for now.
However, I am more than happy to push it to the standard optimization pipeline
after more thorough performance tests.

Test Plan: test/StraightLineStrengthReduce/slsr.ll

Reviewers: eliben, HaoLiu, meheff, hfinkel, jholewinski, atrick

Reviewed By: jholewinski, atrick

Subscribers: karthikthecool, jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D7310

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228016 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 19:37:06 +00:00
Colin LeMahieu
30f48c7dc4 [Hexagon] Updating XTYPE/PERM intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228015 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 19:36:59 +00:00
Simon Pilgrim
71a4e9522e [X86][AVX2] Enabled shuffle matching for the AVX2 zero extension (128bit -> 256bit) vpmovzx* instructions.
Differential Revision: http://reviews.llvm.org/D7251

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228014 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 19:34:09 +00:00
Rafael Espindola
f2e11261d4 Fix duplicated symbol error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228012 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 19:25:53 +00:00
Rafael Espindola
f4e2998eda Fix typo in test/CodeGen/X86/sibcall.ll (pr22331).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228011 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 19:20:26 +00:00
Colin LeMahieu
6217146dce [Hexagon] Adding missing vector multiply instruction encodings. Converting multiply intrinsics and updating tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228010 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 19:15:11 +00:00
Sanjay Patel
9b4cc76745 Merge consecutive 16-byte loads into one 32-byte load (PR22329)
This patch detects consecutive vector loads using the existing 
EltsFromConsecutiveLoads() logic. This fixes:
http://llvm.org/bugs/show_bug.cgi?id=22329

This patch effectively reverts the tablegen additions of D6492 / 
http://reviews.llvm.org/rL224344 ...which in hindsight were a horrible hack.

The test cases that were added with that patch are simply modified to load
from varying offsets of a base pointer. These loads did not match the existing
tablegen patterns.

A happy side effect of doing this optimization earlier is that we can now fold
the load into a math op where possible; this is shown in some of the updated
checks in the test file.

Differential Revision: http://reviews.llvm.org/D7303



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228006 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 18:54:00 +00:00
Sanjay Patel
93e763c5cb remove variable names from comments; NFC
I didn't bother to fix the self-referential definitions and grammar
because my eyes started to bleed.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228004 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 18:47:32 +00:00
Manman Ren
69e4dd1b12 [LTO API] split lto_codegen_compile to lto_codegen_optimize and
lto_codegen_compile_optimized. Also add lto_api_version.

Before this commit, we can only dump the optimized bitcode after running
lto_codegen_compile, but it includes some impacts of running codegen passes,
one example is StackProtector pass. We will get assertion failure when running
llc on the optimized bitcode, because StackProtector is effectively run twice.

After splitting lto_codegen_compile, the linker can choose to dump the bitcode
before running lto_codegen_compile_optimized.

lto_api_version is added so ld64 can check for runtime-availability of the new
API.

rdar://19565500


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228000 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 18:39:15 +00:00
Hans Wennborg
42a7bc535e Fix ProgramFiles path for 64-bit Windows installer
If we are building an 64bit installer on Windows we have to adjust the
Program Files path otherwise it uses the wrong Program Files (x86)
directory. Related CMake bug report
http://public.kitware.com/Bug/view.php?id=14211

Patch by Ismail Dönmez!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227999 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 18:31:29 +00:00
Colin LeMahieu
936986d12d [Hexagon] Converting complex number intrinsics and adding tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227995 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 18:16:28 +00:00
Colin LeMahieu
a3a588d983 [Hexagon] Adding vector intrinsics for alu32/alu and xtype/alu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227993 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 18:01:45 +00:00
Adam Nemet
3fe93fe70a [LoopVectorize] Fix rebase glitch in r227751
LoopVectorizationLegality::{getNumLoads,getNumStores} should forward to
LoopAccessAnalysis now.

Thanks to Takumi for noticing this!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227992 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 17:59:53 +00:00
Jingyue Wu
ef46291cb3 Remove usernames from TODOs, NFC
making the style consistent with the rest


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227991 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 17:57:38 +00:00
Marek Olsak
a95296a86e R600/SI: Don't generate non-existent LSHL, LSHR, ASHR B32 variants on VI
This can happen when a REV instruction is commuted.

The trick is not to define the _vi versions of instructions, which has these
consequences:
- code generation will always fail if a pseudo cannot be lowered
  (very useful to catch bugs where an unsupported instruction somehow makes
   it to the printer)
- ability to query if a pseudo can be lowered, which is done in commuteOpcode
  to prevent REV from commuting to non-REV on VI

Tested-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227990 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 17:38:12 +00:00
Marek Olsak
2ea95bd471 R600/SI: Remove VOP2_REV definitions from target-specific instructions
The getCommute* functions are only used with pseudos, so this commit doesn't
change anything.

The issue with missing non-rev versions of shift instructions on VI will fixed
separately.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227989 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 17:38:05 +00:00
Marek Olsak
5e58a1bc29 R600/SI: Trivial instruction definition corrections for VI (v2)
- V_MAC_LEGACY_F32 exists on VI, but it's VOP3-only.

- Define CVT_PK opcodes which are different between SI and VI. These are
  unused. The idea is to define all chip differences.

v2: keep V_MUL_LO_U32

Tested-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227988 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 17:38:01 +00:00
Marek Olsak
f426f1db6e R600/SI: Determine target-specific encoding of READLANE and WRITELANE early v2
These are VOP2 on SI and VOP3 on VI, and their pseudos are neither, which can
be a problem. In order to make isVOP2 and isVOP3 queries behave as expected,
the encoding must be determined first.

This doesn't fix any known issue, but better safe than sorry.

v2: add and use getMCOpcodeFromPseudo

Tested-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227987 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 17:37:57 +00:00