Commit Graph

2263 Commits

Author SHA1 Message Date
Evan Cheng
67ad9db15b Teach LowerBRCOND to recognize (xor (setcc x), 1). The xor inverts the condition. It's normally transformed by the dag combiner, unless the condition is set by a arithmetic op with overflow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63505 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-02 08:07:36 +00:00
Torok Edwin
0c3c0214bc add 2 more testcases for -mattr=-sse (r63495).
--This line, and those below, will be ignaored--

A    test/CodeGen/X86/nosse-error1.ll
A    test/CodeGen/X86/nosse-error2.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63496 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-01 18:24:20 +00:00
Torok Edwin
3f142c36ad Implement -mno-sse: if SSE is disabled on x86-64, don't store XMM on stack for
var-args, and don't allow FP return values


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63495 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-01 18:15:56 +00:00
Duncan Sands
b0d5cdd52e Fix PR3453 and probably a bunch of other potential
crashes or wrong code with codegen of large integers:
eliminate the legacy getIntegerVTBitMask and
getIntegerVTSignBit methods, which returned their
value as a uint64_t, so couldn't handle huge types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63494 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-01 18:06:53 +00:00
Duncan Sands
92abc62399 Fix PR3401: when using large integers, the type
returned by getShiftAmountTy may be too small
to hold shift values (it is an i8 on x86-32).
Before and during type legalization, use a large
but legal type for shift amounts: getPointerTy;
afterwards use getShiftAmountTy, fixing up any
shift amounts with a big type during operation
legalization.  Thanks to Dan for writing the
original patch (which I shamelessly pillaged).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63482 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-31 15:50:11 +00:00
Mon P Wang
95be699a9a Used "-enable-unsafe-fp-math" to allow this transformation - (a * b -c) = c - a *b.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63475 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-31 06:50:54 +00:00
Mon P Wang
a7b6cff99f If unsafe FP optimization is not set, don't allow -(A-B) => B-A because
when A==B, -0.0 != +0.0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63474 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-31 06:07:45 +00:00
Owen Anderson
af399a6ffe XFAIL this test. It only worked before because of a bug in the spill point selection code. Not deleting because
it should be possible to enhance the selection code to handle this in the future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63340 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-29 22:27:56 +00:00
Evan Cheng
d5a4802708 Local register allocator shouldn't assume only the entry and landing pad basic blocks have live-ins.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63323 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-29 18:37:30 +00:00
Dan Gohman
197e88f796 In the case of an extractelement on an insertelement value,
the element indices may be equal if either one is not a
constant.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63311 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-29 16:10:46 +00:00
Evan Cheng
5a3c6a87b0 Exit with nice warnings when register allocator run out of registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63267 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-29 02:20:59 +00:00
Dan Gohman
e5af2d3a22 Make x86's BT instruction matching more thorough, and add some
dagcombines that help it match in several more cases. Add
several more cases to test/CodeGen/X86/bt.ll. This doesn't
yet include matching for BT with an immediate operand, it
just covers more register+register cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63266 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-29 01:59:02 +00:00
Mon P Wang
e91a000889 Fixed lowering of v816 shuffles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63252 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28 23:11:14 +00:00
Bill Wendling
7540561097 Make test platform agnostic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63247 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28 22:20:56 +00:00
Evan Cheng
1632782fe9 The memory alignment requirement on some of the mov{h|l}p{d|s} patterns are 16-byte. That is overly strict. These instructions read / write f64 memory locations without alignment requirement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63195 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28 08:35:02 +00:00
Mon P Wang
f4646d9902 Added sse test patterns for r62979 and r63193.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63194 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28 08:13:56 +00:00
Bill Wendling
ac7de20a49 Add testcase for r63142.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63149 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27 23:00:53 +00:00
Evan Cheng
6a86bd71df Implement multiple with overflow by 2 with an add instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63090 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27 03:30:42 +00:00
Dan Gohman
4e1fae5125 Add a regression test for x86-64 red zone usage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63075 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27 00:40:27 +00:00
Duncan Sands
5bb11b89dd Fix PR3393, which amounts to a bug in the expensive
checking logic.  Rather than make the checking more
complicated, I've tweaked some logic to make things
conform to how the checking thought things ought to
be, since this results in a simpler "mental model".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63048 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26 21:54:18 +00:00
Dan Gohman
4699934647 At Nick Lewycky's request, rename this test with a more informative name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63042 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26 21:36:31 +00:00
Evan Cheng
5b2e5893c6 Enhance logic in X86DAGToDAGISel::PreprocessForRMW which move load inside callseq_start to allow it to be folded into a call. It was not considering the cases where a token factor is between the load and the callseq_start.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26 18:43:34 +00:00
Scott Michel
c9c8b2a804 CellSPU:
- Rename fcmp.ll test to fcmp32.ll, start adding new double tests to fcmp64.ll
- Fix select_bits.ll test
- Capitulate to the DAGCombiner and move i64 constant loads to instruction
  selection (SPUISelDAGtoDAG.cpp).

  <rant>DAGCombiner will insert all kinds of 64-bit optimizations after
  operation legalization occurs and now we have to do most of the work that
  instruction selection should be doing twice (once to determine if v2i64
  build_vector can be handled by SelectCode(), which then runs all of the
  predicates a second time to select the necessary instructions.) But,
  CellSPU is a good citizen.</rant>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62990 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26 03:31:40 +00:00
Nate Begeman
51a0437b16 Map address space 256 to gs; similar mappings could be supported for the
other x86 segments.  address space 0 is stack/default, 1-255 are reserved for
client use.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62980 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26 01:24:32 +00:00
Torok Edwin
c8ad2d2abf revert this patch for now, because Codegen does still want to generate SSE code,
for example in the case of va-args. XFAIL associated tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62972 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-25 20:21:24 +00:00
Torok Edwin
7f1d5252c7 If user explicitly asks not to use SSE, don't force it. This fixes LLVM part of PR3402.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62967 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-25 17:58:56 +00:00
Evan Cheng
1902a129a5 Private linkage support for PPC / Darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62955 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-25 06:32:01 +00:00
Evan Cheng
d498c8f2c8 Teach 2addr pass to be do more commuting. If both uses of a two-address instruction are killed, but the first operand has a use before and after the def, commute if the second operand does not suffer from the same issue.
%reg1028<def> = EXTRACT_SUBREG %reg1027<kill>, 1                                                                                                                                     
%reg1029<def> = MOV8rr %reg1028                                                                                                                                                      
%reg1029<def> = SHR8ri %reg1029, 7, %EFLAGS<imp-def,dead>                                                                                                                            
insert => %reg1030<def> = MOV8rr %reg1028                                                                                                                                            
%reg1030<def> = ADD8rr %reg1028<kill>, %reg1029<kill>, %EFLAGS<imp-def,dead>                                                                                                         

In this case, it might not be possible to coalesce the second MOV8rr                                                                                                                 
instruction if the first one is coalesced. So it would be profitable to                                                                                                              
commute it:                                                                                                                                                                          
%reg1028<def> = EXTRACT_SUBREG %reg1027<kill>, 1                                                                                                                                     
%reg1029<def> = MOV8rr %reg1028                                                                                                                                                      
%reg1029<def> = SHR8ri %reg1029, 7, %EFLAGS<imp-def,dead>                                                                                                                            
insert => %reg1030<def> = MOV8rr %reg1029                                                                                                                                            
%reg1030<def> = ADD8rr %reg1029<kill>, %reg1028<kill>, %EFLAGS<imp-def,dead>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62954 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-25 03:53:59 +00:00
Dan Gohman
54e853a779 Add a PR comment to this test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62921 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-24 17:32:54 +00:00
Evan Cheng
3e2351fa2a Update test to reflect command line option name change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62836 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-23 05:45:31 +00:00
Dan Gohman
760f86f339 Don't create ISD::FNEG nodes after legalize if they aren't legal.
Simplify x+0 to x in unsafe-fp-math mode. This avoids a bunch of
redundant work in many cases, because in unsafe-fp-math mode,
ISD::FADD with a constant is considered free to negate, so the
DAGCombiner often negates x+0 to -0-x thinking it's free, when
in reality the end result is -x, which is more expensive than x.

Also, combine x*0 to 0.

This fixes PR3374.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62789 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-22 21:58:43 +00:00
Devang Patel
5e3c013f81 Do not use buggy llvm-gcc to generate testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62770 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-22 18:28:11 +00:00
Bill Wendling
708f5a8fb6 Now with RUN line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62716 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 21:28:03 +00:00
Bill Wendling
e3b014a05f Run this through -simplifycfg and -mem2reg to test only what we need to test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62714 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 21:02:27 +00:00
Dan Gohman
764fd0cbc8 Simplify ReduceLoadWidth's logic: it doesn't need several different
special cases after producing the new reduced-width load, because the
new load already has the needed adjustments built into it. This fixes
several bugs due to the special cases, including PR3317.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62692 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 15:17:51 +00:00
Dan Gohman
1ef4d8f7ee Fix a recent regression. ClrOpcode is not set for i8; for i8, if
we want to clear %ah to zero before a division, just use a
zero-extending mov to %al. This fixes PR3366.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62691 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 14:50:16 +00:00
Duncan Sands
bf0fb175ab Let's try to have our cake and eat it to: move
this test into FrontendC to ensure that llvm-gcc
is available; assemble using "llvm-gcc -xassembler"
rather than "as".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62683 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 11:37:31 +00:00
Duncan Sands
74789ea170 Don't rely on grep -w working.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62682 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 09:41:42 +00:00
Scott Michel
d1e8d9c0a5 CellSPU:
- Ensure that (operation) legalization emits proper FDIV libcall when needed.
- Fix various bugs encountered during llvm-spu-gcc build, along with various
  cleanups.
- Start supporting double precision comparisons for remaining libgcc2 build.
  Discovered interesting DAGCombiner feature, which is currently solved via
  custom lowering (64-bit constants are not legal on CellSPU, but DAGCombiner
  insists on inserting one anyway.)
- Update README.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62664 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 04:58:48 +00:00
Evan Cheng
aaf414c92c Favors generating "not" over "xor -1". For example.
unsigned test(unsigned a) {
  return ~a;
}
llvm used to generate:
movl    $4294967295, %eax
xorl    4(%esp), %eax

Now it generates:
movl      4(%esp), %eax
notl      %eax

It's 3 bytes shorter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62661 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 02:09:05 +00:00
Owen Anderson
6cf7c390ec Be more aggressive about renumbering vregs after splitting them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62639 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 00:13:28 +00:00
Chris Lattner
1d5ee5c3b8 Don't bother running the assembler, we don't know that it will be configured
for whatever llc defaults to.  This fixes PR3363


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62619 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-20 21:41:53 +00:00
Evan Cheng
a894ae130b Fix PR3243: a LiveVariables bug. When HandlePhysRegKill is checking whether the last reference is also the last def (i.e. dead def), it should also check if last reference is the current machine instruction being processed. This can happen when it is processing a physical register use and setting the current machine instruction as sub-register's last ref.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62617 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-20 21:25:12 +00:00
Evan Cheng
c99031b02a Add test case for PR3154.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62604 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-20 19:29:54 +00:00
Bill Wendling
20394494cc Testcase for limited precision stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62572 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-20 06:23:59 +00:00
Dan Gohman
f5add58549 Fix a dagcombine to not generate loads of non-round integer types,
as its comment says, even in the case where it will be generating
extending loads. This fixes PR3216.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62557 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-20 01:06:45 +00:00
Evan Cheng
d0deec20f6 Make linear scan's trivial coalescer slightly more aggressive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62547 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-20 00:16:18 +00:00
Dale Johannesen
549170206e Move & restructure test per review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62538 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-19 22:33:12 +00:00
Dan Gohman
dbe664adcd Fix SelectionDAG::ReplaceAllUsesWith to behave correctly when
uses are added to the From node while it is processing From's
use list, because of automatic local CSE. The fix is to avoid
visiting any new uses.

Fix a few places in the DAGCombiner that assumed that after
a RAUW call, the From node has no users and may be deleted.

This fixes PR3018.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62533 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-19 21:44:21 +00:00
Dale Johannesen
1f54f58e64 compile-time fmod was done incorrectly. PR 3316.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62528 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-19 21:17:05 +00:00