Commit Graph

74841 Commits

Author SHA1 Message Date
Jim Grosbach
7d179b59cd ARM tests for LDRSBT assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137271 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 23:08:56 +00:00
Jim Grosbach
5e92159400 ARM tests for LDRSB assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137270 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 23:06:44 +00:00
Jim Grosbach
263bb07135 Add FIXME.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137265 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 22:56:43 +00:00
Andrew Trick
d8a2f3ab91 Cleanup. Remove an extraneous GraphTraits specialization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137264 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 22:55:39 +00:00
Jim Grosbach
de2f526c7c ARM tests for LDRHT assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137263 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 22:55:38 +00:00
NAKAMURA Takumi
9cbb0d2b3c test/CodeGen/X86/opt-shuff-tstore.ll: Add explicit -mtriple=x86_64-linux.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137262 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 22:52:48 +00:00
Jim Grosbach
46b355479f ARM tests for LDRH(register) assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137261 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 22:45:42 +00:00
Jim Grosbach
623a454b0f ARM LDRH(immediate) assembly parsing and encoding support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137260 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 22:42:16 +00:00
Jim Grosbach
c7de52fcff Add FIXME
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137258 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 22:20:38 +00:00
Jim Grosbach
251bf25e7e ARM LDRD(register) assembly parsing and encoding.
Add support for literal encoding of #-0 along the way.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137254 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 21:56:18 +00:00
Devang Patel
b549bcfe6c Distinguish between two copies of one inlined variable. Take 2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137253 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 21:50:54 +00:00
Devang Patel
c722c3d5ff While extending definition range of a debug variable, consult lexical scopes also. There is no point extending debug variable out side its lexical block. This provides 6x compile time speedup in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137250 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 21:25:34 +00:00
Devang Patel
9ce256421a Revert unintentional parts of previous check-in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137249 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 21:16:49 +00:00
Devang Patel
bf47fdb91c Start using LexicalScopes utility. No intetional functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137246 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 20:55:27 +00:00
Jim Grosbach
53642c5335 Fix typo. Not quite sure how that slipped in there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137245 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 20:49:18 +00:00
Jim Grosbach
2fd2b87ded ARM LDRD(immediate) assembly parsing and encoding support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137244 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 20:29:19 +00:00
Eli Friedman
e2d8cf77c8 Changes per Jeffrey's comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137243 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 20:17:43 +00:00
Nadav Rotem
f429767765 Fix the test. Add cpu target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137241 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 19:49:19 +00:00
Nadav Rotem
614061bfb4 When performing a truncating store, it is sometimes possible to rearrange the
data in-register prior to saving to memory.  When we reorder the data in memory
we prevent the need to save multiple scalars to memory, making a single regular
store.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137238 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 19:30:14 +00:00
Devang Patel
103b8e653c Provide utility to extract and use lexical scoping information from machine instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137237 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 19:04:06 +00:00
Owen Anderson
8533ebad6f Add initial support for decoding NEON instructions in Thumb2 mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137236 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 19:01:10 +00:00
David Greene
0d886401b3 Make Record Name an Init
Use an Init (ultimately a StringInit) to represent the Record name.
This allows the name to be composed by standard TableGen operators.
This will enable us to get rid of the ugly #NAME# hack processing and
naturally replace it with operators.  It also increases flexibility
and power of the TableGen language by allowing record identifiers to
be computed dynamically.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137232 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 18:27:46 +00:00
David Greene
0b18d59435 Add getAsUnquotedString
Add a method to return an Init as an unquoted string.  This primarily
affects StringInit where we return the value without surrounding it
with quotes.

This is in preparation for removing the ugly #NAME# hack and replacing
it with standard TabelGen operators.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137231 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 18:27:45 +00:00
Andrew Trick
7cb3dcb927 Comments. Thanks for the spell check Nick!
Also, my apologies for spoiling the autocomplete on SimplifyInstructions.cpp. I couldn't think of a better filename.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137229 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 18:07:05 +00:00
Bruno Cardoso Lopes
6ad251358e The following X86 pattern is incorrect:
def : Pat<(X86Movss VR128:$src1,
                   (bc_v4i32 (v2i64 (load addr:$src2)))),
          (MOVLPSrm VR128:$src1, addr:$src2)>;
This matches a MOVSS dag with a MOVLPS instruction. However, MOVSS will replace only the low 32 bits of the register, while the MOVLPS instruction will replace the low 64 bits. A testcase is added and illustrates the bug and also modified the one that was already present. Patch by Tanya Lattner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137227 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 17:45:17 +00:00
Eli Friedman
1cc5e38830 Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137226 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 17:39:11 +00:00
Owen Anderson
fd9085dca3 Tabs --> spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137225 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 17:38:05 +00:00
Owen Anderson
10cbaab7b7 Cleanups based on Nick Lewycky's feedback.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137224 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 17:36:48 +00:00
Owen Anderson
e66ef2d5f5 Rewrite some ARM InstrInfo functions to be most accepting of arbitrary register subclasses. Hopefully this fixes some buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137223 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 17:21:20 +00:00
Rafael Espindola
f5ade5d39a Add support for the R and Q constraints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137217 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 16:26:42 +00:00
Bob Wilson
21ab6c066d Clarify a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137204 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 05:02:22 +00:00
Andrew Trick
39f40299a6 Invoke SimplifyIndVar when we partially unroll a loop. Fixes PR10534.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137203 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 04:29:49 +00:00
Andrew Trick
bddb7f8210 Cleanup. Make ScalarEvolution an explicit argument of the
SimplifyIndVar utility since it is required.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137202 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 04:22:26 +00:00
Andrew Trick
ea23daa446 SimplifyIndVar: make foldIVUser iterative to fold a chain of operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137199 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 04:01:31 +00:00
Benjamin Kramer
4a1a5eb95b Update CMake build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137198 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 03:51:58 +00:00
Andrew Trick
4b4bb71bcd Added a SimplifyIndVar utility to simplify induction variable users
based on ScalarEvolution without changing the induction variable phis.

This utility is the main tool of IndVarSimplifyPass, but the pass also
restructures induction variables in strange ways that are sensitive to
pass ordering. This provides a way for other loop passes to simplify
new uses of induction variables created during transformation. The
utility may be used by any pass that preserves ScalarEvolution. Soon
LoopUnroll will use it.

The net effect in this checkin is to cleanup the IndVarSimplify pass
by factoring out the SimplifyIndVar algorithm into a standalone utility.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137197 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 03:46:27 +00:00
Andrew Trick
2d31ae3d9d Cleanup. Added LoopBlocksDFS::perform for simple clients.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137195 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 01:59:05 +00:00
Bruno Cardoso Lopes
155a92a491 Fix a bug in vpermilps mask checking. Fix PR10560
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137194 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 01:54:17 +00:00
Peter Collingbourne
e1686b08e4 Remove the build_unwind function from the OCaml bindings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137193 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 01:10:17 +00:00
Peter Collingbourne
59c1ba96ba Preserve the name for this variant of IRBuilder::CreateCall
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137192 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 01:10:08 +00:00
Andrew Trick
306afdf443 Cleanup. Avoid relying on specialization of std::distance.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137191 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 00:49:12 +00:00
Andrew Trick
b1eede1281 Fix the LoopUnroller to handle nontrivial loops and partial unrolling.
These are not individual bug fixes. I had to rewrite a good chunk of
the unroller to make it sane. I think it was getting lucky on trivial
completely unrolled loops with no early exits. I included some fairly
simple unit tests for partial unrolling. I didn't do much stress
testing, so it may not be perfect, but should be usable now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137190 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 00:28:10 +00:00
Owen Anderson
33e57515b1 Push GPRnopc through a large number of instruction definitions to tighten operand decoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137189 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 00:03:03 +00:00
Eric Christopher
8c09e2a701 Update comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137188 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 00:02:39 +00:00
Eric Christopher
125feacf5b clang is the new black.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137187 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 23:59:05 +00:00
Jakob Stoklund Olesen
c66d36028b Trim an unneeded header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137184 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 23:49:21 +00:00
Jakob Stoklund Olesen
c70c2cafe1 Promote VMOVS to VMOVD when possible.
On Cortex-A8, we use the NEON v2f32 instructions for f32 arithmetic. For
better latency, we also send D-register copies down the NEON pipeline by
translating them to vorr instructions.

This patch promotes even S-register copies to D-register copies when
possible so they can also go down the NEON pipeline.  Example:

        vldr.32 s0, LCPI0_0
    loop:
        vorr    d1, d0, d0
    loop2:
        ...
        vadd.f32        d1, d1, d16

The vorr instruction looked like this after regalloc:

    %S2<def> = COPY %S0, %D1<imp-def>

Copies involving odd S-registers, and copies that don't define the full
D-register are left alone.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137182 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 23:41:44 +00:00
Owen Anderson
de317f40f7 Tighten operand checking of register-shifted-register operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137180 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 23:33:27 +00:00
Bruno Cardoso Lopes
d40aa24ebf Add 256-bit support for v8i32, v4i64 and v4f64 ISD::SELECT. Fix PR10556
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137179 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 23:27:13 +00:00
Eli Friedman
8fa281a471 Fix minor typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137177 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 23:26:12 +00:00