Kalle Raiskila
7de8101668
Use i8 as SETCC result type for i1 in SPU.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120092 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-24 12:59:16 +00:00
Kalle Raiskila
702a4046a9
Allow for 'fcmp ogt' in SPU.
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Fix by Visa Putkinen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120090 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-24 11:42:17 +00:00
Benjamin Kramer
c21a821e9f
The srem -> urem transform is not safe for any divisor that's not a power of two.
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E.g. -5 % 5 is 0 with srem and 1 with urem.
Also addresses Frits van Bommel's comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120049 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 20:33:57 +00:00
Jason W Kim
13534672de
Move the ARM reloc constants to Support/ELF.h
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120035 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 19:40:36 +00:00
Bob Wilson
626613d5e8
Recognize sign/zero-extended constant BUILD_VECTORs for VMULL operations.
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We need to check if the individual vector elements are sign/zero-extended
values. For now this only handles constants values. Radar 8687140.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120034 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 19:38:38 +00:00
Benjamin Kramer
b70ebd2aa3
InstCombine: Reduce "X shift (A srem B)" to "X shift (A urem B)" iff B is positive.
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This allows to transform the rem in "1 << ((int)x % 8);" to an and.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120028 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 18:52:42 +00:00
Kalle Raiskila
0cc5b1f60e
Division by pow-of-2 is not cheap on SPU, do it with
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shifts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120022 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 13:27:59 +00:00
Rafael Espindola
beb6898df8
Implement the rex64 prefix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120017 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 11:23:24 +00:00
Rafael Espindola
d93ceeb125
Produce a relocation for pcrel absolute values. Based on a patch by David Meyer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120006 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 07:20:12 +00:00
Wesley Peck
bf17cfa3f9
Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119990 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 03:31:01 +00:00
Rafael Espindola
d80f8d08ce
Remove duplicated constants. Thanks to Jason for noticing it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119985 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-22 21:49:05 +00:00
Benjamin Kramer
93f8455d73
InstCombine: Implement X - A*-B -> X + A*B.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119984 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-22 20:31:27 +00:00
Evan Cheng
ab5c703fdb
Fix epilogue codegen to avoid leaving the stack pointer in an invalid
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state. Previously Thumb2 would restore sp from fp like this:
mov sp, r7
sub, sp, #4
If an interrupt is taken after the 'mov' but before the 'sub', callee-saved
registers might be clobbered by the interrupt handler. Instead, try
restoring directly from sp:
add sp, #4
Or, if necessary (with VLA, etc.) use a scratch register to compute sp and
then restore it:
sub.w r4, r7, #8
mov sp, r7
rdar://8465407
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119977 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-22 18:12:04 +00:00
Kalle Raiskila
d87e571e62
Fix a bug with extractelement on SPU.
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In the attached testcase, the element was
never extracted (missing rotate).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119973 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-22 16:28:26 +00:00
Benjamin Kramer
ce750f0332
Implement the "if (X == 6 || X == 4)" -> "if ((X|2) == 6)" optimization.
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This currently only catches the most basic case, a two-case switch, but can be
extended later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119964 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-22 09:45:38 +00:00
Duncan Sands
3d93893895
Fix a compiler warning about Kind being used uninitialized
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when assertions are disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119962 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-22 09:38:00 +00:00
Eric Christopher
9d89311df8
Pseudos default to 4byte size, let the instruction size field notice
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that branch tables are special.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119954 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 23:38:19 +00:00
Wesley Peck
4b04713423
Implement ELF object file writing support for the MBlaze backend. Its not perfect yet, but it works for many tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119952 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 22:06:28 +00:00
Wesley Peck
46a928b864
Implement branch analysis in the MBlaze backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119951 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 21:53:36 +00:00
Wesley Peck
6e749f31c6
Make it a little bit more explicit that the MBlaze backend only supports upto
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32-bit immediate values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119950 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 21:39:46 +00:00
Wesley Peck
5437ba48ce
Fix an error in the MBlaze delay slot filler where instructions that already
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fill a delay slot are moved to fill a different delay slot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119949 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 21:36:12 +00:00
Chris Lattner
8bc1e45295
apparently tailcalls are better on darwin/x86-64 than on linux?
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119947 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 18:59:20 +00:00
Bill Wendling
dcf0a47b76
More Thumb encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119940 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 11:49:36 +00:00
Bill Wendling
af2b573614
Add encoding for ARM "trap" instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119938 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 11:05:29 +00:00
Bill Wendling
9717fa9f29
The "trap" instruction is one of this which doesn't have a condition code. Hack
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the code to not add a "condition code" if it's trap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119937 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 10:56:05 +00:00
Bill Wendling
7d0affdf02
- Give "trap" the correct encoding, at least according to Darwin's assembler.
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- Add comments saying where the encodings for other instructions came from.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119936 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 10:55:23 +00:00
Chris Lattner
cbf5d74e6a
implement PR8524, apparently mainline gas accepts movq as an alias for movd
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when transfering between i64 gprs and mmx regs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119931 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 08:18:57 +00:00
Chris Lattner
3e41106de4
add some random notes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119925 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 07:05:31 +00:00
Owen Anderson
aa54524a44
Use by-name rather than by-order operand matching for some NEON encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119923 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 06:47:06 +00:00
Chris Lattner
75d8f599e7
optimize:
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void a(int x) { if (((1<<x)&8)==0) b(); }
into "x != 3", which occurs over 100 times in 403.gcc but in no
other program in llvm-test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119922 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 06:44:42 +00:00
Chris Lattner
79a980ad85
tail calls on x86 are implemented.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119920 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 06:10:27 +00:00
Jim Grosbach
0eb49c57f0
BR_JTadd is ARM-only, so use the proper pseudo class to get the predicate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119918 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 01:26:01 +00:00
Bill Wendling
5cc88a205d
A few more thumb instruction MC encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119913 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 22:52:33 +00:00
Eric Christopher
827656dab4
Rewrite address handling to use a structure with all the possible address
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mode variables. Handle frame indexes in load/store and allocas again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119912 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 22:38:27 +00:00
Eric Christopher
13df1a0bac
STRH only needs the additional operand, not t2STRH. Also invert conditional
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to match the one from the load emitter above.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119911 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 22:01:38 +00:00
Anton Korobeynikov
0dbe54e844
Make this compile on case-sensitive file systemsw
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119905 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 16:14:57 +00:00
Anton Korobeynikov
82f58740c7
Move some more hooks to TargetFrameInfo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119904 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 15:59:32 +00:00
Duncan Sands
59d2dad59e
On X86, MEMBARRIER, MFENCE, SFENCE, LFENCE are not target memory intrinsics,
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so don't claim they are. They are allocated using DAG.getNode, so attempts
to access MemSDNode fields results in reading off the end of the allocated
memory. This fixes crashes with "llc -debug" due to debug code trying to
print MemSDNode fields for these barrier nodes (since the crashes are not
deterministic, use valgrind to see this). Add some nasty checking to try
to catch this kind of thing in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119901 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 11:25:00 +00:00
Bill Wendling
a09cc2b429
Add more Thumb add instruction encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119883 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 01:18:47 +00:00
Bill Wendling
95a6d1759d
Add Thumb encodings for some add instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119882 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 01:00:29 +00:00
Bill Wendling
6179c31e07
Add more encodings for Thumb instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119881 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 00:53:35 +00:00
Bill Wendling
20272a7c5a
Have the getAddrMode3OpValue() function in ARMCodeEmitter.cpp produce the same
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value that the one in ARMMCCodeEmitter.cpp does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119878 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 00:26:37 +00:00
Jim Grosbach
078e239f69
Fix ARM LDR* post-indexed operand encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119869 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 23:14:43 +00:00
Bill Wendling
1228038ed9
Encodings for the compare instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119868 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 23:14:32 +00:00
Owen Anderson
b16926940e
The Vm and Vn register fields must be the same for a register-register vmov.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119867 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 23:12:43 +00:00
Evan Cheng
ff96b63d6f
Fix a cut-n-paste-error.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119866 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 23:01:16 +00:00
Jim Grosbach
7b6ab402fe
Operand names
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119864 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:43:08 +00:00
Jim Grosbach
a30a51b16a
trailing whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119863 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:42:55 +00:00
Eric Christopher
b371658083
Don't need to save piecemeal now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119862 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:39:56 +00:00
Eric Christopher
2d630d7bc9
Update comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119861 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:37:58 +00:00