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144 Commits

Author SHA1 Message Date
Evan Cheng
32dfbeada7 EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG like 
(almost) a register copy. However, it always coalesced to the register of the
RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub-
register uses which adds subtle complications to load folding, spiller rewrite,
etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42899 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-12 08:50:34 +00:00
Evan Cheng
f10c973797 If a node that defines a physical register that is expensive to copy. The 
scheduler will try a number of tricks in order to avoid generating the
copies. This may not be possible in case the node produces a chain value
that prevent movement. Try unfolding the load from the node before to allow
it to be moved / cloned.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42625 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 01:39:18 +00:00
Dan Gohman
cb406c2597 Use empty() member functions when that's what's being tested for instead 
of comparing begin() and end().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42585 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-03 19:26:29 +00:00
Evan Cheng
22a529990b If two instructions are both two-address code, favors (schedule closer to 
terminator) the one that has a CopyToReg use. This fixes
2006-05-11-InstrSched.ll with -new-cc-modeling-scheme.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42453 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-28 22:32:30 +00:00
Evan Cheng
74d2fd8dd8 Trim some unneeded fields. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42442 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-28 19:24:24 +00:00
Evan Cheng
42d60274ea - Move getPhysicalRegisterRegClass() from ScheduleDAG to MRegisterInfo. 
- Added ability to emit cross class register copies to the BBRU scheduler.
- More aggressive backtracking.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42375 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-26 21:36:17 +00:00
Evan Cheng
9efce638d3 Allow copyRegToReg to emit cross register classes copies. 
Tested with "make check"!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42346 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-26 06:25:56 +00:00
Evan Cheng
a6fb1b6743 Added major new capabilities to scheduler (only BURR for now) to support physical register dependency. The BURR scheduler can now backtrace and duplicate instructions in order to avoid "expensive / impossible to copy" values (e.g. status flag EFLAGS for x86) from being clobbered. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42284 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-25 01:54:36 +00:00
Evan Cheng
713a98dee8 Use struct SDep instead of std::pair for SUnit pred and succ lists. First step 
in tracking physical register output dependencies.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42125 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-19 01:38:40 +00:00
Evan Cheng
6900132813 Remove dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41899 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-12 23:45:46 +00:00
Chris Lattner
7df31dc89b Teach the dag scheduler to handle inline asm nodes with multi-value immediate operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41386 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-25 00:53:07 +00:00
Evan Cheng
33d5595d66 Do not emit copies for physical register output if it's not used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40722 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-02 05:29:38 +00:00
Evan Cheng
8409747efa Instead of adding copyfromreg's to handle physical definitions. Now isel can 
simply specify them as results and let scheduledag handle them. That
is, instead of
SDOperand Flag = DAG.getTargetNode(Opc, MVT::i32, MVT::Flag, ...)
SDOperand Result = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, Flag)

Just write:
SDOperand Result = DAG.getTargetNode(Opc, MVT::i32, MVT::i32, ...)

And let scheduledag emit the move from X86::EAX to a virtual register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40710 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-02 00:28:15 +00:00
Christopher Lamb
e24f8f1ec9 Teach DAG scheduling how to properly emit subreg insert/extract machine instructions. PR1350 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40520 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-26 08:12:07 +00:00
Dale Johannesen
e7e7d0d7e3 Skeleton of post-RA scheduler; doesn't do anything yet. 
Change name of -sched option and DEBUG_TYPE to
pre-RA-sched; adjust testcases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39816 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-13 17:13:54 +00:00
Evan Cheng
5e2456c959 If the operand is marked M_OPTIONAL_DEF_OPERAND, then it's a def. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38496 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-10 17:52:20 +00:00
Evan Cheng
af825c840e When a node value is only used by a CopyToReg, use the user's dest. This should not be restricted to nodes that produce only a single value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38485 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-10 07:08:32 +00:00
Evan Cheng
991262834d Change CalculateHeights and CalculateDepths to be non-recursive. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37934 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-06 01:37:28 +00:00
Dan Gohman
b5bec2b6f6 Pass a SelectionDAG into SDNode::dump everywhere it's used, in prepration 
for needing the DAG node to print pre-legalize extended value types, and
to get better debug messages with target-specific nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37656 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-19 14:13:56 +00:00
Jeff Cohen
c01a53007a Fix some VC++ warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35224 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 20:43:18 +00:00
Lauro Ramos Venancio
a0a26b7454 Code clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35220 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 20:09:03 +00:00
Lauro Ramos Venancio
8334b9fa3b CopyToReg source operand can be a physical register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35213 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 16:46:44 +00:00
Chris Lattner
95ad943ed5 print target nodes nicely 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34369 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-17 06:38:37 +00:00
Chris Lattner
5d4a9f7731 fix indentation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34307 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-15 18:19:15 +00:00
Chris Lattner
0152829e89 Apply B Scott Michel's patch for PR1184, which improves diagnostics in an 
abort case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34306 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-15 18:17:56 +00:00
Reid Spencer
ac9dcb94dd For PR1195: 
Change use of "packed" term to "vector" in comments, strings, variable
names, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34300 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-15 03:39:18 +00:00
Chris Lattner
831e0374a7 switch the VRBaseMap in the scheduler from an std::map to a DenseMap. This 
speeds up the isel pass from 2.5570s to 2.4722s on kc++ (3.4%).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33879 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-04 08:47:20 +00:00
Jim Laskey
1ee2925742 Make LABEL a builtin opcode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33537 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-26 14:34:52 +00:00
Evan Cheng
de268f7dcf Renamed getTypeAlignmentShift() to getPreferredTypeAlignmentShift(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33482 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-24 07:03:39 +00:00
Evan Cheng
f6d039a039 Remove the DoubleTy special case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33449 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-22 23:13:55 +00:00
Reid Spencer
e5530da208 Compensate for loss of DerivedTypes.h in TargetLowering.h 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33159 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-12 23:31:12 +00:00
Evan Cheng
489a87ca09 CopyToReg source operand can be a register as well. e.g. Copy from GlobalBaseReg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32929 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-05 20:59:06 +00:00
Bill Wendling
832171cb97 Removing even more <iostream> includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32320 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-07 20:04:42 +00:00
Evan Cheng
ba59a1e453 Match TargetInstrInfo changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32098 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-01 21:52:58 +00:00
Evan Cheng
c0f64ffab9 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead 
of opcode and number of operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-27 23:37:22 +00:00
Evan Cheng
7ce4578353 Matches MachineInstr changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31712 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-13 23:36:35 +00:00
Evan Cheng
3ba433a7e8 Add methods to add implicit def use operands to a MI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31675 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-11 10:20:02 +00:00
Evan Cheng
438f7bc67c Add implicit def / use operands to MachineInstr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31633 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 08:43:01 +00:00
Evan Cheng
95f6edeff5 Changes to use operand constraints to process two-address instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31453 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-04 09:44:31 +00:00
Chris Lattner
efa46ce87b handle global address constant sdnodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31323 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-31 20:01:56 +00:00
Evan Cheng
d42a5238a9 Debug tweak. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30959 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-14 08:34:06 +00:00
Evan Cheng
d6594ae54c Added support for machine specific constantpool values. These are useful for 
representing expressions that can only be resolved at link time, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30278 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-12 21:00:35 +00:00
Chris Lattner
09e460662a Completely eliminate def&use operands. Now a register operand is EITHER a 
def operand or a use operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30109 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 02:31:13 +00:00
Chris Lattner
228a18e0f2 switch the SUnit pred/succ sets from being std::sets to being smallvectors. 
This reduces selectiondag time on kc++ from 5.43s to 4.98s (9%).  More
significantly, this speeds up the default ppc scheduler from ~1571ms to 1063ms,
a 33% speedup.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29743 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-17 00:09:56 +00:00
Evan Cheng
3b97acdbdb Reverse the FlaggedNodes after scanning up for flagged preds or else the order would be reversed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29545 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-07 22:12:12 +00:00
Jim Laskey
60f09928a0 Use an enumeration to eliminate data relocations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29249 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-21 20:57:35 +00:00
Jim Laskey
16d42c6ac6 It was pointed out that DEBUG() is only available with -debug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29106 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-11 18:25:13 +00:00
Jim Laskey
e37fe9b3a1 Ensure that dump calls that are associated with asserts are removed from 
non-debug build.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29105 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-11 17:58:07 +00:00
Evan Cheng
8d3af5e7d0 Instructions with variable operands (variable_ops) can have a number required 
operands. e.g.
def CALL32r : I<0xFF, MRM2r, (ops GR32:$dst, variable_ops),
                "call {*}$dst", [(X86call GR32:$dst)]>;
TableGen should emit operand informations for the "required" operands.

Added a target instruction info flag M_VARIABLE_OPS to indicate the target
instruction may have more operands in addition to the minimum required
operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28791 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-15 07:22:16 +00:00
Evan Cheng
4c6f2f9e92 commuteInstruction() does not always create a new MI! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28592 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-31 18:03:39 +00:00