Bill Wendling
d5f323d70b
Remove the unaligned load intrinsics in favor of using native unaligned loads.
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Now that we have a first-class way to represent unaligned loads, the unaligned
load intrinsics are superfluous.
First part of <rdar://problem/8460511>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129401 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12 22:46:31 +00:00
Bill Wendling
6cf6c79e82
The pshufw instruction came about in MMX2 when SSE was introduced. Don't place
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it in with the SSSE3 instructions.
Steward! Could you place this chair by the aft sun deck? I'm trying to get away
from the Astors. They are such boors!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115552 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-04 20:24:01 +00:00
Chris Lattner
591d76ea5a
the immediate field of pshufw is actually an 8-bit field, not a 8-bit field that is sign extended. This fixes PR8288
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115473 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-03 19:09:13 +00:00
Dale Johannesen
0488fb649a
Massive rewrite of MMX:
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The x86_mmx type is used for MMX intrinsics, parameters and
return values where these use MMX registers, and is also
supported in load, store, and bitcast.
Only the above operations generate MMX instructions, and optimizations
do not operate on or produce MMX intrinsics.
MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into
smaller pieces. Optimizations may occur on these forms and the
result casted back to x86_mmx, provided the result feeds into a
previous existing x86_mmx operation.
The point of all this is prevent optimizations from introducing
MMX operations, which is unsafe due to the EMMS problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115243 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-30 23:57:10 +00:00
Dale Johannesen
86097c384f
Add patterns for MMX that use the new intrinsics.
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Enable palignr intrinsic.
These may need adjustment for a new VT in due course.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113233 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 18:10:56 +00:00
Bill Wendling
74f9cb2cac
Revert int_x86_mmx_palignr_b intrinsic to match llvm-gcc's version.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112886 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 22:31:53 +00:00
Bill Wendling
bc54ee9a77
- Change __builtin_ia32_palignr intrinsic type to match the pattern in clang.
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- Add patterns to match the following MMX builtins:
* __builtin_ia32_vec_init_v8qi
* __builtin_ia32_vec_init_v4hi
* __builtin_ia32_vec_init_v2si
* __builtin_ia32_vec_ext_v2si
These builtins do not correspond to a single MMX instruction. They will have
to be lowered -- most likely in the back-end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112881 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 22:26:35 +00:00
Dale Johannesen
97511ceffa
Recommit with changes. Comment out palignr for the
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moment, as there's a testcase that uses it and expects it
to be subject to optimizations; we won't be doing that.
Some adjustments based on feedback from Bill.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112754 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-01 22:43:48 +00:00
Dale Johannesen
6e3665bcd0
Revert 112740, it broke some clang tests somehow...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112744 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-01 21:36:44 +00:00
Dale Johannesen
6a94cbb72e
Add a few more missing MMX operations. This should be it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112740 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-01 21:03:03 +00:00
Dale Johannesen
c88d829c87
Add some MMX intrinsics that duplicate functionality
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available in normal llvm operators. We aren't going to
use those for MMX any more because it's unsafe for the
optimizers to synthesize new MMX instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112685 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-01 00:40:09 +00:00
Chris Lattner
d80c7e1232
Add a new llvm.x86.int intrinsic, allowing access to the
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x86 int and int3 instructions. Patch by Peter Housel!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111831 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-23 19:39:25 +00:00
Bruno Cardoso Lopes
ec1355b17b
Remove rsqrt/sqrt_nr intrinsics since there are no more builtins for them on clang
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110845 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 19:21:05 +00:00
Bruno Cardoso Lopes
1a76359347
Remove AVX 256-bit cast intrinsics now that clang is using __builtin_shufflevector for those
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110772 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 02:15:33 +00:00
Bruno Cardoso Lopes
9fb2ffd568
Remove AVX 256-bit unpack and interleave intrinsics now that clang is using __builtin_shufflevector for those
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110769 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 01:44:11 +00:00
Bruno Cardoso Lopes
b89c631b77
Remove AVX 256-bit shuffle intrinsics now that clang is using __builtin_shufflevector for those
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110767 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 01:18:26 +00:00
Bruno Cardoso Lopes
0115387005
Remove replicate intrinsics, clang will generate shufflevector for those. The shuffles can't be matched by x86 codegen yet, but will soon
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110647 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-10 02:25:35 +00:00
Bruno Cardoso Lopes
77497bf196
Use i32 instead of i8 for dot product intrinsic
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110643 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-10 01:40:05 +00:00
Bruno Cardoso Lopes
d5955f5a23
Fix the last argument type of AVX vblend intrinsics
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110628 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-10 00:00:22 +00:00
Bruno Cardoso Lopes
4945dd8314
Patterns to match AVX 256-bit vzero intrinsics
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110480 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-06 22:10:01 +00:00
Bruno Cardoso Lopes
f6d6df4006
Remove unused AVX intrinsics
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110407 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-06 00:04:07 +00:00
Dan Gohman
7365c091f9
Remove IntrWriteMem, as it's the default. Rename IntrWriteArgMem
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to IntrReadWriteArgMem, as it's for reading as well as writing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110395 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-05 23:36:21 +00:00
Bruno Cardoso Lopes
12cf5018be
Fix a comment typo and add more 256-bit intrinsics
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110177 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-04 01:09:40 +00:00
Bruno Cardoso Lopes
e5c500b37d
Support x86 AVX 256-bit instruction intrinsics. Right now support all of them, but
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as soon as we properly codegen the simple vector operations in clang, remove the
unnecessary builti-ins/intrinsics from clang and llvm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110094 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-03 01:53:41 +00:00
Eric Christopher
7e2f5aaa67
Make sure aeskeygenassist uses an unsigned immediate field.
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Fixes rdar://8017638
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104617 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25 17:33:22 +00:00
Eric Christopher
6d972fd087
Remove the palignr intrinsics now that we lower them to vector shuffles,
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shifts and null vectors. Autoupgrade these to what we'd lower them to.
Add a testcase to exercise this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101851 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20 00:59:54 +00:00
Eric Christopher
b3500fd2f3
Rewrite aesimc handling. It only takes a single input and has a single
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dest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100252 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 23:48:33 +00:00
Eric Christopher
c85eacba27
Fix typo aeskeygenassist -> aeskeygenassist128.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100250 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 23:29:36 +00:00
Eric Christopher
ec306a9771
Add aeskeygenassist intrinsic and rename all of the aes intrinsics to
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aes instead of sse4.2. Add a brief todo for a subtarget flag and rework
the aeskeygenassist instruction to more closely match the docs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100078 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-01 03:05:45 +00:00
Eric Christopher
8258d0b4bf
Remove the pmulld intrinsic and autoupdate it as a vector multiply.
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Rewrite the pmulld patterns, and make sure that they fold in loads of
arguments into the instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99910 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-30 18:49:01 +00:00
Bob Wilson
86afec7730
Reapply Kevin's change 94440, now that Chris has fixed the limitation on
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opcode values fitting in one byte (svn r99494).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99514 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-25 16:36:14 +00:00
Bob Wilson
014dc4e720
Speculatively revert this to see if it fixes buildbot failures.
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--- Reverse-merging r99440 into '.':
U test/MC/AsmParser/X86/x86_32-bit_cat.s
U test/MC/AsmParser/X86/x86_32-encoding.s
U include/llvm/IntrinsicsX86.td
U include/llvm/CodeGen/SelectionDAGNodes.h
U lib/Target/X86/X86InstrSSE.td
U lib/Target/X86/X86ISelLowering.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99450 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-24 23:26:29 +00:00
Kevin Enderby
760c2f34d9
Added the Advanced Encryption Standard (AES) Instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99440 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-24 22:33:33 +00:00
Chris Lattner
ae8f4c4f86
[llvm_void_ty] is no longer needed for result types,
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just use an empty result list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99346 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-23 23:46:07 +00:00
Kevin Enderby
b46b03b36f
Fixed the encoding problems of the crc32 instructions. All had the Operand size
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override prefix and only the r/m16 forms should have had that. Also for variant
one, the AT&T syntax, added suffixes to all forms. Also added the missing
64-bit form for 'CRC32 r64, r/m8'. Plus added test cases for all forms and
tweaked one test case to add the needed suffixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98980 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 20:04:42 +00:00
David Greene
60dd36592f
Revert r92939. These intrinsics get matched to LLVM instructions,
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so removing at Chris' request.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92947 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-07 21:43:58 +00:00
David Greene
0d2856aa19
Add some "missing" instrinsics to make the SSE intrinsic set a bit more
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orthogonal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92939 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-07 19:47:43 +00:00
Eric Christopher
a9256d0780
Remove the gcc builtins from the intrinsics, we'll lower them
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explicitly so we can check arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90199 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-01 03:18:26 +00:00
Sean Callanan
b9e6b34e1e
Recommitting PALIGNR shift width fixes.
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Thanks to Daniel Dunbar for fixing clang intrinsics:
http://llvm.org/viewvc/llvm-project?view=rev&revision=89499
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89500 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 22:28:42 +00:00
Sean Callanan
1bbf6d1a6f
Reverting PALIGNR fix until I figure out how this
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broke the Clang testsuite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89495 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 22:09:28 +00:00
Sean Callanan
201dfa7432
Fixed PALIGNR to take 8-bit rotations in all cases.
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Also fixed the corresponding testcase, and the PALIGNR
intrinsic (tested for correctness with llvm-gcc).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89491 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 21:40:28 +00:00
Eric Christopher
ef1fad533e
Fix PR5315, original patch by Nicolas Capens!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86203 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 00:11:57 +00:00
Eric Christopher
0abee0754b
Add sse4.2 string/text processing intrinsics. We'll select these later.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79037 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-14 20:27:57 +00:00
Eric Christopher
801179579e
Whitespace cleanup.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79036 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-14 20:27:12 +00:00
Eric Christopher
d34ab83c16
Fix some cut and paste-os.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78493 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 20:09:33 +00:00
Eric Christopher
63cd7e557c
Define intrinsics for crc instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78482 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 18:07:59 +00:00
Eric Christopher
71c6753d03
Add support for gcc __builtin_ia32_ptest{z,c,nzc} intrinsics. Lower
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to ptest instruction plus setcc. Revamp ptest instruction. Add test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77407 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 00:28:05 +00:00
Eric Christopher
be9408ec86
Remove intrinsic support for __builtin_ia32_vec_set_v16qi and
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__builtin_ia32_vec_set_v4si as these should be lowered in the
front-end to inserts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76714 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 01:11:48 +00:00
Eric Christopher
248f80d488
Add intrinsic for __builtin_ia32_vec_set_v4si which turns out to be
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pinsrd in sse4.1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76684 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 23:43:14 +00:00
Evan Cheng
236aa8a503
ADDS{D|S}rr_Int and MULS{D|S}rr_Int are not commutable. The users of these intrinsics expect the high bits will not be modified.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65499 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-26 03:12:02 +00:00
Bill Wendling
cdcc3e6e12
Modify the intrinsics pattern to separate out the "return" types from the
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"parameter" types. An intrinsic can now return a multiple return values like
this:
def add_with_overflow : Intrinsic<[llvm_i32_ty, llvm_i1_ty],
[LLVMMatchType<0>, LLVMMatchType<0>]>;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59237 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-13 09:08:33 +00:00
Mon P Wang
607ec1f608
Removed pinsrd and pinsrq intrinsics because the code generator does not support
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them since they map to insert element
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57564 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-15 06:27:16 +00:00
Dale Johannesen
e397acce9d
Fix SSE4.1 roundss, roundsd. While the instructions have
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the same pattern as roundpd/roundps, the Intel compiler
builtins do not: rounds* has an extra operand. Fixes
gcc.target/i386/sse4_1-rounds[sd]-[1234].c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57370 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10 23:51:03 +00:00
Bill Wendling
5e249b4a14
"The original bug was a complaint that _mm_srli_si128 mis-compiled when passed
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a constant vector ("{0x123, 0x456}" syntax). The fix is to simplify the
_mm_srli_si128 macro, and move the "* 8" from the macro into the compiler
back-end. I can't change the existing __builtins because so many people are
using them :-(."
Patch by Stuart Hastings!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56944 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-02 05:56:52 +00:00
Nate Begeman
30a0de94e7
SSE codegen for vsetcc nodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53719 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17 16:51:19 +00:00
Evan Cheng
4e444436f2
Horizontal-add instructions are not commutative.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52363 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-16 21:16:24 +00:00
Evan Cheng
6bd9567a6a
- Add "Commutative" property to intrinsics. This allows tblgen to generate the commuted variants for dagisel matching code.
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- Mark lots of X86 intrinsics as "Commutative" to allow load folding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52353 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-16 20:29:38 +00:00
Evan Cheng
a31593901d
Eliminate x86.sse2.punpckh.qdq and x86.sse2.punpckl.qdq.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51533 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-24 02:56:30 +00:00
Evan Cheng
e716bb1c59
Eliminate x86.sse2.movs.d, x86.sse2.shuf.pd, x86.sse2.unpckh.pd, and x86.sse2.unpckl.pd intrinsics. These will be lowered into shuffles.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51531 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-24 02:14:05 +00:00
Evan Cheng
3cc8f9bfef
Remove x86.sse2.loadh.pd and x86.sse2.loadl.pd. These will be lowered into load and shuffle instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51521 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-24 00:07:06 +00:00
Evan Cheng
22b942aa4d
Add separate intrinsics for MMX / SSE shifts with i32 integer operands. This allow us to simplify the horribly complicated matching code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50601 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-03 00:52:09 +00:00
Evan Cheng
fa5a91a71e
Undo 48570. Correctly match mmx shift instructions with an immediate operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48627 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-21 00:40:09 +00:00
Evan Cheng
dff1dcac6c
Add intrinsics to match mmx shift builtin's with immediate operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48569 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-19 23:38:52 +00:00
Nate Begeman
d254ca2b8e
__builtin_ia32_movntdqa reads memory
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48431 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-16 21:15:47 +00:00
Dale Johannesen
131d5c9f4a
Missed one.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46733 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-05 01:12:10 +00:00
Dale Johannesen
a76619337e
Do not unconditionally redefine vec_ext_v16qi and
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vec_ext_v4si builtins. This is a hack; they should
be defined here, then resolved in the X86 BE.
However there is enough other stuff missing in the
X86 BE for SSE41 that this will do for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46727 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-04 23:27:29 +00:00
Nate Begeman
63ec90a6a8
SSE 4.1 Intrinsics and detection
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46681 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-03 07:18:54 +00:00
Evan Cheng
92b7c1d94e
Fix sse2.psrl.w and sse2.psrl.q definitions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45772 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-09 02:16:44 +00:00
Chris Lattner
234d529e58
remove attribution from a variety of miscellaneous files.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45425 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29 22:59:10 +00:00
Evan Cheng
56bf2f8288
Add a few more missing gcc builtin's.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45278 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-21 01:30:39 +00:00
Evan Cheng
f6cb6eeb5a
Type specification didn't match gcc's.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45260 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-20 09:35:28 +00:00
Evan Cheng
a5cecd0a13
Remove int_x86_sse2_movl_dq. It's replaced with a string compare.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45140 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-18 01:04:25 +00:00
Evan Cheng
a4d6818dbe
These have matching builtin's in 4.2.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45139 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-18 00:52:20 +00:00
Evan Cheng
f9b83fcf95
Bring back int_x86_sse2_movl_dq intrinsic for backward compatibility. Make sure
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it's auto-upgraded to a shufflevector instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45131 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-17 22:33:23 +00:00
Evan Cheng
1d0ba37099
__builtin_ia32_movqv4si is now expanded to a shuffle.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45057 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-15 02:54:12 +00:00
Anders Carlsson
d04764a8ac
All MMX shift instructions took a <2 x i32> vector as the shift amount parameter. Change this to be <1 x i64> instead, which matches the assembler instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45027 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-14 06:38:54 +00:00
Dale Johannesen
c784208a73
Add missing SSE builtins: CVTPD2PI, CVTPS2PI,
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CVTTPD2PI, CVTTPS2PI, CVTPI2PD, CVTPI2PS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43523 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-30 22:15:38 +00:00
Dale Johannesen
6e3a8f3dfb
Fix argument types for PSLLQ, PSRLQ.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43490 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-30 01:44:33 +00:00
Dan Gohman
66018ea1b2
There is no {rsqrt,rcp}{p,s}d.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42190 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-21 15:24:00 +00:00
Bill Wendling
76d708b76f
Adding SSSE3 intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40982 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-10 06:22:27 +00:00
Bill Wendling
6a20cf0776
Add missing SSE builtins:
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__builtin_ia32_cvtss2si64
__builtin_ia32_cvttss2si64
__builtin_ia32_cvtsi642ss
__builtin_ia32_cvtsd2si64
__builtin_ia32_cvttsd2si64
__builtin_ia32_cvtsi642sd
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40411 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-23 03:07:27 +00:00
Chris Lattner
bfcd8038ce
add missing mmx intrinsic
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37099 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16 06:03:49 +00:00
Bill Wendling
69dc5332de
Add the final MMX instructions. Correct a few wrong patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36405 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-24 21:18:37 +00:00
Bill Wendling
bb1ee05253
Add support for our first SSSE3 instruction "pmulhrsw".
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35869 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-10 22:10:25 +00:00
Bill Wendling
71bfd11c67
Adding more MMX instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35638 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03 23:48:32 +00:00
Bill Wendling
823efee633
Add FEMMS and ADDQ. Renamed MMX recipes to prepend the MMX_ to them.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35616 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03 06:00:37 +00:00
Bill Wendling
b94827769a
Add support for integer comparison builtins.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35384 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-27 20:21:31 +00:00
Bill Wendling
b172ab0533
This is dead. DEAD I tells you!!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35291 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-23 22:42:04 +00:00
Bill Wendling
b8440a0c39
PR1260:
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Add final support to get the QT example to compile.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35290 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-23 22:35:46 +00:00
Bill Wendling
02ced83ce7
We generate a shufflevector instruction, so we don't need the builtin
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intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35269 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-22 20:29:26 +00:00
Bill Wendling
a348c56fde
Support added for shifts and unpacking MMX instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35266 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-22 18:42:45 +00:00
Bill Wendling
74027e98f1
Multiplication support for MMX.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35118 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-15 21:24:36 +00:00
Bill Wendling
c1fb0473ed
Adding more arithmetic operators to MMX. This is an almost exact copy of
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the addition. Please let me know if you have suggestions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35055 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-10 09:57:05 +00:00
Bill Wendling
2f88dcdfb3
Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so that
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moves, loads, etc. are recognized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35031 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 22:09:11 +00:00
Bill Wendling
229baffc4e
Add the emms intrinsic for MMX support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34938 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-05 23:09:45 +00:00
Reid Spencer
90668345a1
Convert the intrinsic function definitions to use llvm_i32_ty instead of
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llvm_uint_ty or llvm_int_ty. Similarly for i8, i16 and i64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32802 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-31 22:24:55 +00:00
Evan Cheng
a7fc64222a
Added X86 SSE2 intrinsics which can be represented as vector_shuffles. This is
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a temporary workaround for the 2-wide vector_shuffle problem (i.e. its mask
would have type v2i32 which is not legal).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27964 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-24 23:34:56 +00:00
Evan Cheng
d953947d26
Last few SSE3 intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27711 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14 21:59:03 +00:00
Evan Cheng
f3e1b1d716
Misc. SSE2 intrinsics: clflush, lfench, mfence
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27699 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14 07:43:12 +00:00
Evan Cheng
bb5c43e73d
pcmpeq* and pcmpgt* intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27685 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14 01:39:53 +00:00