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37 Commits

Author SHA1 Message Date
Misha Brukman
20887f8b13 * Instruction definitions moved to SparcV9InstrInfo.td for consistency 
* Defined PHI instruction and SparcV9 subclass of Target


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15615 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-10 18:15:31 +00:00
Misha Brukman
57e177c58b Define the target name so we can use it via TableGen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15604 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-10 15:29:15 +00:00
Misha Brukman
8124020192 Remove ClassPrefix variable as it's no longer used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15586 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-09 19:13:29 +00:00
Misha Brukman
0f5702237b Define the ClassPrefix for SparcV9. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15581 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-09 17:46:49 +00:00
Brian Gaeke
3c95d3a9dc RETURN instructions are not used in the sparc backend. 
When in doubt, stamp it out!!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14558 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-07-02 04:57:35 +00:00
Brian Gaeke
40e7fdc05a Fix encoding of ST*FSR instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14102 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-06-09 21:54:58 +00:00
Brian Gaeke
3ca4fccac5 Fix file header comments and include guards -- many files have been moved or 
renamed since they were last spiffed up, or they just never had proper comments
in the first place.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13148 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-04-25 07:04:49 +00:00
Brian Gaeke
e3d6807ab5 Great renaming: Sparc --> SparcV9 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11826 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-25 18:44:15 +00:00
John Criswell
856ba76200 Added LLVM copyright header. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9321 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-10-21 15:17:13 +00:00
Misha Brukman
640b9280d5 Since we now have TableGen editing modes for VIM and (X)Emacs, we no longer need 
to mark TableGen description files with "C++ mode".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7841 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-08-14 15:16:28 +00:00
Chris Lattner
7cc7d987a4 Transition to using 'let X = y' instead of 'set X = y'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7565 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-08-04 05:03:18 +00:00
Chris Lattner
942e7230e5 We no longer need to preprocess SparcV9.td before sending it through tablegen 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7437 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-07-30 21:00:37 +00:00
Misha Brukman
92aa8ca9c5 * Cleaned up and corrected comments wrt instruction formats 
* Enabled STXFSR instructions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7400 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-07-29 21:21:20 +00:00
Misha Brukman
2988612f1b Elaborated assembly syntax of instructions in the comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7120 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-07-07 22:18:42 +00:00
Misha Brukman
a8fcdd8d04 Properly fix instruction syntax in comments, using `imm' for instructions that 
use an immediate value instead of a register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7072 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-07-02 18:15:43 +00:00
Misha Brukman
69bf93081f Fixed instruction syntax in the comments (specifies how instr is used). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7071 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-07-02 18:02:58 +00:00
Chris Lattner
c901e8bd9e Some preprocessors doen't support // comments and get confused 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6821 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-20 23:14:50 +00:00
Misha Brukman
d36e30e623 * Changed Bcc instructions to behave like BPcc instructions 
* BPA and BPN do not take a %cc register as a parameter
* SLL/SRL/SRA{r,i}5 are there for a reason - they are ONLY 32-bit instructions
* Likewise, SLL/SRL/SRAX{r,i}6 are only 64-bit
* Added WRCCR{r,i} opcodes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6655 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-06 09:52:23 +00:00
Misha Brukman
82c9e55913 The SUB*i instructions belong to a different class than their SUB*r brethren. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6644 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-06 03:34:47 +00:00
Misha Brukman
d4ad1d10bc Do not preset the cc register, the instructions actually use it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6637 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-05 23:30:27 +00:00
Misha Brukman
e77d65a8ed * The textual output of (non-)predicted FP branches is the same. 
* Stop mapping FBcc instructions to deprecated opcodes, map to FBPcc instead.
* Fixed opf in FCMPxy instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6632 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-05 20:51:37 +00:00
Misha Brukman
406d9abc9e All store instructions really want 'rd' in the first field. 
Special cases: STFSRx and STXFSRx - they operate on predefined rd=0 or rd=1, and
expect %fsr as the parameter in assembly. They are disabled (since not used)
until an encoding, both for code generation and output, is chosen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6619 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-05 01:06:10 +00:00
Misha Brukman
d22807a43e Added the 4.7 instruction class and all the FMOVcc instructions in them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6601 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-04 04:48:31 +00:00
Misha Brukman
f5b1d3dcd4 Comment out opcodes currently unused in the Sparc backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6597 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-04 02:57:55 +00:00
Misha Brukman
9dc3ede509 Added instruction format class 3.15 and floating-point compare instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6594 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-04 02:26:14 +00:00
Misha Brukman
2ee9fa11a2 Store instructions are different from other Format 3.1/3.2 instructions in that 
they prefer the destination register to be last. Thus, two new classes were made
for them that accomodate for having this layout of operands (F3_1rd, F3_2rd).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6564 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-03 03:20:14 +00:00
Misha Brukman
534538921d * Added section A.34: Move FP register on int reg condition (FMOVr) 
* Labeled sections that are not currently used in the Sparc backend as not
  requiring completion at this time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6562 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-03 01:16:27 +00:00
Misha Brukman
e085a9d279 Added MOVR (move int reg on register condition), aka comparison with zero. 
None of these instructions are actually used in the Sparc backend, so no changes
were required in the instruction selector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6549 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-02 21:16:54 +00:00
Misha Brukman
eecdb661ec SparcInstr.def: added 'r' and 'i' versions of MOV(F)cc instructions 
SparcInstrSelection.cpp:
* Fixed opcodes to return correct 'i' version since the two functions are each
  only used in one place.
* Changed name of function to have an 'i' in the name to signify that they each
  return an immediate form of the opcode.
* Added a warning if either of the functions is ever used in a context which
  requires a register-version opcode.

SparcV9_F4.td: fixed class F4_3, added F4_4 and notes that F4_{1,2} need fixing
SparcV9.td: added the MOV(F)cc instructions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6548 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-02 20:55:14 +00:00
Misha Brukman
26343a5642 * Added casts to/from floating-point to integers. 
* Changed // comments to #ifdef 0 to maintain syntax highlighting.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6546 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-02 19:08:37 +00:00
Misha Brukman
286903909f * Put back into action SLL/SRL/SRA{r,i}6 instructions 
* Fixed page numbers referring to the Sparc manual


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6460 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-31 06:24:29 +00:00
Misha Brukman
f3453d1695 Fixed the namespace to match SparcInternals.h; added notes on some missing 
sections of instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6448 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-30 20:15:59 +00:00
Misha Brukman
25f36306ff Fixed to use the correct format of the instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6390 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-29 04:53:56 +00:00
Misha Brukman
dafa504341 * Broke up SparcV9.td into separate files as it was getting unmanageable 
* Added some Format 4 classes, but not instructions
* Added notes on missing sections with FIXMEs
* Added RDCCR instr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6388 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-29 03:31:43 +00:00
Misha Brukman
8996f44f7a Fixed ordering of elements in instructions: although the binary instructions 
list (rd, rs1, imm), in that order (bit-wise), the actual assembly syntax is
instr rd, imm, rs1, and that is how they are constructed in the instruction
selector. This fixes the discrepancy.

Also fixed some comments along the same lines and fixed page numbers referring
to where instructions are described in the Sparc manual.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6384 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-28 17:49:29 +00:00
Misha Brukman
998800cb87 Added definitions for a bunch of floating-point instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6356 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-27 20:03:29 +00:00
Misha Brukman
fd6b30ec89 Added the initial version of the TableGen description for the Sparc backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6021 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-07 21:52:39 +00:00