Commit Graph

80016 Commits

Author SHA1 Message Date
Jim Grosbach
871a2051f7 Narrow test further. Make bot and test happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149650 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03 00:26:07 +00:00
Jim Grosbach
00e403abe3 Tidy up. Trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149649 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03 00:07:04 +00:00
Jim Grosbach
f374486659 Restrict InstCombine from converting varargs to or from fixed args.
More targetted fix replacing d0e277d272.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149648 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03 00:00:55 +00:00
Jim Grosbach
d5917f0b4d Revert "Disable InstCombine unsafe folding bitcasts of calls w/ varargs."
This reverts commit d0e277d272.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149647 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03 00:00:50 +00:00
Jakob Stoklund Olesen
478a8a02bc Require non-NULL register masks.
It doesn't seem worthwhile to give meaning to a NULL register mask
pointer. It complicates all the code using register mask operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149646 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 23:52:57 +00:00
Daniel Dunbar
2e5b88e3cb build/make: Ensure make clean removes the LLVMBuild makefile fragment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149643 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 23:27:34 +00:00
Daniel Dunbar
8979f4e711 build/Make: Add missing dependency, LLVMBuild makefile fragment implicitly depends on Makefile.config.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149642 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 23:27:32 +00:00
Jakob Stoklund Olesen
42865588d7 Add pseudo-registers for pairs, triples, and quads of D registers.
NEON loads and stores accept single and double spaced pairs, triples,
and quads of D registers.  This patch adds new register classes to
accurately model those constraints:

  Dn, Dn+1    Dn, Dn+2
  ----------------------
  DPair       DPairSpc
  DTriple     DTripleSpc
  DQuad       DQuadSpc

Also extend the existing QQ and QQQQ register classes to contains all Q
pairs and quads instead of just the aligned ones.

These new register classes will make it possible to accurately model
constraints on NEON loads and stores, and we can get rid of all the NEON
pseudo-instructions.  The late scheduler will be able to accurately
model instruction dependencies from the explicit operands.

This more than doubles the number of ARM registers, but the backend
passes are quite good at handling this. The llc -O0 compile time only
regresses by 1.5%.  Future work on register mask operands will recover
this regression.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149640 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 22:45:32 +00:00
Matt Beaumont-Gay
6ab8949cc1 Unix line endings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149615 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 19:00:49 +00:00
Benjamin Kramer
ded681d272 BBVectorize: Simplify code, no functionality change.
Also silences warnings about bodyless for loops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149612 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 18:52:15 +00:00
Hal Finkel
35564dc3ae Minor changes from review.
As suggested by Nick Lewycky, the tree traversal queues have been changed to SmallVectors and the associated loops have been rotated. Also, an 80-col violation was fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149607 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 17:29:39 +00:00
NAKAMURA Takumi
7a73925c50 Move test/CodeGen/Generic/2012-02-01-CoalescerBug.ll to CodeGen/ARM, for now. It requires TARGETS=arm.
I cannot reproduce a fixed issue with other targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149604 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 11:44:58 +00:00
Elena Demikhovsky
0f1ead47a0 Minor change in signature of the getZeroVector()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149601 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 09:20:18 +00:00
Elena Demikhovsky
dcabc7bca9 Optimization for SIGN_EXTEND operation on AVX.
Special handling was added for v4i32 -> v4i64 and v8i16 -> v8i32
extensions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149600 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 09:10:43 +00:00
Francois Pichet
1ae52f686c Unbreak the MSVC build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149599 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 08:36:09 +00:00
Lang Hames
eec68e7ffa Re-apply the coalescer fix from r149147. Commit r149597 should have fixed the llvm-gcc and clang self-host issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149598 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 08:01:53 +00:00
Lang Hames
50a36f7102 Set EFLAGS correctly in EmitLoweredSelect on X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149597 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 07:48:37 +00:00
Lang Hames
d88710a3e0 Break as soon as the MustMapCurValNos flag is set - no need to reiterate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149596 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 06:55:45 +00:00
Hal Finkel
5d4e18bc39 Vectorize long blocks in groups.
Long basic blocks with many candidate pairs (such as in the SHA implementation in Perl 5.14; thanks to Roman Divacky for the example) used to take an unacceptably-long time to compile. Instead, break long blocks into groups so that no group has too many candidate pairs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149595 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 06:14:56 +00:00
Lang Hames
02e08d5b4d PR11868. The previous loop in LiveIntervals::join would sometimes fall over if
more than two adjacent ranges needed to be merged. The new version should be
able to handle an arbitrary sequence of adjancent ranges.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149588 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 05:37:34 +00:00
Akira Hatanaka
3f5b107a4b Set the correct stack pointer register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149585 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 03:17:04 +00:00
Akira Hatanaka
590baca06c Expand EHSELECTION and EHSELECTION nodes. Set the correct exception pointer and
selector registers.
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149584 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 03:13:40 +00:00
Akira Hatanaka
1ad175e7e0 Add DWARF numbers of 64-bit registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149583 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 02:56:14 +00:00
Eric Christopher
9b3cd4890d Regen one last time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149576 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 01:11:30 +00:00
Dylan Noblesmith
32cf80bd01 autoconf: fix build/src dir confusion
This was the cause of the silent failure to generate
clang's config.h. My bad.

Fix on r149563 / r149568.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149574 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 00:54:18 +00:00
Eric Christopher
ac89865faf Regenerate again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149569 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 00:19:05 +00:00
Dylan Noblesmith
db6caea4f8 autoconf: restore old clang-srcdir behavior
Keep the string empty when unspecified. Undoes
part of r149563.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149568 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 00:17:33 +00:00
Eric Christopher
63c0951999 Regenerate configure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149567 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 00:16:55 +00:00
Dylan Noblesmith
8d6dd0f807 autoconf: honor --with-clang-srcdir
configure was silently failing to produce anything in the case
where clang wasn't at tools/clang/, resulting in compilation
errors much later in the build when config.h didn't exist.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149563 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 00:11:14 +00:00
Pete Cooper
af39368988 Typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149562 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 23:43:12 +00:00
Rafael Espindola
6ac40af2de Fix the cmake build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149561 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 23:40:51 +00:00
Andrew Trick
922d314e8f Instruction scheduling itinerary for Intel Atom.
Adds an instruction itinerary to all x86 instructions, giving each a default latency of 1, using the InstrItinClass IIC_DEFAULT.

Sets specific latencies for Atom for the instructions in files X86InstrCMovSetCC.td, X86InstrArithmetic.td, X86InstrControl.td, and X86InstrShiftRotate.td. The Atom latencies for the remainder of the x86 instructions will be set in subsequent patches.

Adds a test to verify that the scheduler is working.

Also changes the scheduling preference to "Hybrid" for i386 Atom, while leaving x86_64 as ILP.

Patch by Preston Gurd!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149558 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 23:20:51 +00:00
Jakob Stoklund Olesen
521804a1f7 Move ARM subreg index compositions to the SubRegIndex itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149557 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 23:16:43 +00:00
Jakob Stoklund Olesen
b5af2d943e Specify SubRegIndex components on the index itself.
It is simpler to define a composite index directly:

  def ssub_2 : SubRegIndex<[dsub_1, ssub_0]>;
  def ssub_3 : SubRegIndex<[dsub_1, ssub_1]>;

Than specifying the composite indices on each register:

  CompositeIndices = [(ssub_2 dsub_1, ssub_0),
                      (ssub_3 dsub_1, ssub_1)] in ...

This also makes it clear that SubRegIndex composition is supposed to be
unique.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149556 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 23:16:41 +00:00
Andrew Trick
ebf8c27cae fix cmake
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149553 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 22:28:29 +00:00
Jakob Stoklund Olesen
ee599209e6 Fix a bug in the TopoOrderRC comparison function.
The final tie breaker comparison also needs to return +/-1, or 0.
This is not a less() function.

This could cause otherwise identical super-classes to be ordered
unstably, depending on what the system qsort routine does with a bad
compare function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149549 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 22:19:26 +00:00
Mon P Wang
845b1899b6 Avoid creating an extract element to an illegal type after LegalizeTypes has run.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149548 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 22:15:20 +00:00
Andrew Trick
ee498d3254 VLIW specific scheduler framework that utilizes deterministic finite automaton (DFA).
This new scheduler plugs into the existing selection DAG scheduling framework. It is a top-down critical path scheduler that tracks register pressure and uses a DFA for pipeline modeling.

Patch by Sergei Larin!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149547 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 22:13:57 +00:00
Jakob Stoklund Olesen
f18a9a2314 Avoid emitting empty arrays, they're not standard C++.
It's only by luck that we haven't produced any yet, and clang refuses to
compile them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149546 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 22:12:51 +00:00
Chad Rosier
c2348d5c08 Tidy up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149521 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 18:45:51 +00:00
Dylan Noblesmith
bb7cd0cf31 cmake: make BUILD_SHARED_LIBS a visible option
It could only be specified on the commandline, and wouldn't show
up as an option in the GUI or when invoked via `cmake -i` at all.

This also tells CMake that it's a BOOL, rather than "UNINITIALIZED".



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149506 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 14:49:39 +00:00
NAKAMURA Takumi
3a14d0f0fd test/CodeGen/X86/avx-minmax.ll: Relax expressions for Win32 targets. YMM arguments are passed as indirect on Win32 x64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149505 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 14:35:29 +00:00
Dylan Noblesmith
06db458bca autoconf: generate clang's private config.h header
The CMake build already generated one. Follows clang r149497.

This brings us one step closer to compiling and configuring clang
separately from LLVM using the autoconf build, too.

(I lack the right version of autoconf et al. to regen, but it
was a simple change, so I just updated configure manually.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149498 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 14:06:21 +00:00
Elena Demikhovsky
1766971769 Passing AVX 256-bit structures in Win64 was wrong.
Fixed Win64 calling conventions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149494 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 10:46:14 +00:00
Elena Demikhovsky
732525758f Shortened code in shuffle masks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149493 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 10:33:05 +00:00
Elena Demikhovsky
3ae98150e3 Optimization for "truncate" operation on AVX.
Truncating v4i64 -> v4i32 and v8i32 -> v8i16 may be done with set of shuffles.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149485 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 07:56:44 +00:00
Stepan Dyatkovskiy
24473120a2 SwitchInst refactoring.
The purpose of refactoring is to hide operand roles from SwitchInst user (programmer). If you want to play with operands directly, probably you will need lower level methods than SwitchInst ones (TerminatorInst or may be User). After this patch we can reorganize SwitchInst operands and successors as we want.

What was done:

1. Changed semantics of index inside the getCaseValue method:
getCaseValue(0) means "get first case", not a condition. Use getCondition() if you want to resolve the condition. I propose don't mix SwitchInst case indexing with low level indexing (TI successors indexing, User's operands indexing), since it may be dangerous.
2. By the same reason findCaseValue(ConstantInt*) returns actual number of case value. 0 means first case, not default. If there is no case with given value, ErrorIndex will returned.
3. Added getCaseSuccessor method. I propose to avoid usage of TerminatorInst::getSuccessor if you want to resolve case successor BB. Use getCaseSuccessor instead, since internal SwitchInst organization of operands/successors is hidden and may be changed in any moment.
4. Added resolveSuccessorIndex and resolveCaseIndex. The main purpose of these methods is to see how case successors are really mapped in TerminatorInst.
4.1 "resolveSuccessorIndex" was created if you need to level down from SwitchInst to TerminatorInst. It returns TerminatorInst's successor index for given case successor.
4.2 "resolveCaseIndex" converts low level successors index to case index that curresponds to the given successor.

Note: There are also related compatability fix patches for dragonegg, klee, llvm-gcc-4.0, llvm-gcc-4.2, safecode, clang.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149481 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 07:49:51 +00:00
Andrew Trick
11e4329154 Add pass printer passes in the right place.
The pass pointer should never be referenced after sending it to
schedulePass(), which may delete the pass. To fix this bug I had to
clean up the design leading to more goodness.

You may notice now that any non-analysis pass is printed. So things like loop-simplify and lcssa show up, while target lib, target data, alias analysis do not show up. Normally, analysis don't mutate the IR, but you can now check this by using both -print-after and -print-before. The effects of analysis will now show up in between the two.

The llc path is still in bad shape. But I'll be improving it in my next checkin. Meanwhile, print-machineinstrs still works the same way. With print-before/after, many llc passes that were not printed before now are, some of these should be converted to analysis. A few very important passes, isel and scheduler, are not properly initialized, so not printed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149480 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 07:16:20 +00:00
Andrew Trick
19c51a9b3e whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149479 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 07:16:17 +00:00
Craig Topper
a1902a18cd Don't create VBROADCAST nodes if any nodes use the chain result from the load. Fixes PR11900.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149478 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 06:51:58 +00:00