Vikram S. Adve
49cab03c81
Renamed opIsDef to opIsDefOnly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6340 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 00:03:17 +00:00
Chris Lattner
3501feab81
Rename MachineInstrInfo -> TargetInstrInfo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5272 91177308-0d34-0410-b5e6-96231b3b80d8
2003-01-14 22:00:31 +00:00
Chris Lattner
b708944fc2
* Implement rudimentary output of the constant pool
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* Implement support for MRMS?m instructions
* Add Arg64 support
* Add support for frame indexes and constant pool indexes
*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5225 91177308-0d34-0410-b5e6-96231b3b80d8
2003-01-13 00:35:03 +00:00
Chris Lattner
0285a33761
* Convert to a MachineFunctionPass
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* Don't take a TM as a ctor parameter
* Print [X - Y] instead of [X + -Y] when possible
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5180 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-28 20:25:38 +00:00
Chris Lattner
eca1f639eb
Add printer support for Pseudo instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5150 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-25 05:09:01 +00:00
Chris Lattner
facc9fb9ba
Add support for the bswap instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5114 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-23 23:46:00 +00:00
Chris Lattner
f0eb7beb66
Give passes nice names!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5059 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-15 21:13:40 +00:00
Chris Lattner
d909683591
Use MachineOperand::isFoo methods instead of our own global functions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5033 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-15 08:01:39 +00:00
Chris Lattner
3faae2dbc2
Print X86 PHI nodes in a sane manner
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5003 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 09:59:26 +00:00
Brian Gaeke
95780cccef
InstSelectSimple.cpp: Give promote32 a comment. Add initial
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implementation of getReg() for arguments.
MachineCodeEmitter.cpp: Fix using EBP with index, scale and no
displacement (whew!) due to Chris.
Printer.cpp: Fix printing out index and scale in memory references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4998 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 07:56:18 +00:00
Chris Lattner
a0f38c867c
Rename MemArg* to Arg*
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4979 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 03:51:55 +00:00
Brian Gaeke
86764d778e
Target/X86/Printer.cpp: Add sizePtr function, and use it instead of
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" <SIZE> PTR " string when emitting assembly.
Target/X86/X86InstrInfo.def: Tidy up a bit:
Squashed everything down to 118 chars wide, wrapping lines so that
comment is at the same point on each line. Rename "NoImpRegs" as
"NoIR". (most instructions have NoImpRegs twice on a line, so this
saves 10 columns).
Also, annotate various instructions with flags for size of memory operand.
(MemArg16, MemArg32, MemArg64, etc.)
Target/X86/X86InstrInfo.h: Define flags for size of memory operand.
(MemArg16, MemArg32, MemArg64, etc.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4932 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-05 08:30:40 +00:00
Chris Lattner
ac573f61b4
Fix bogus assertion failures
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4919 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-04 17:32:52 +00:00
Chris Lattner
6d66944388
Avoid bad assertion
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4918 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-04 17:28:40 +00:00
Chris Lattner
dbf30f7b02
Add support for referencing global variables/functions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4907 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-04 06:45:19 +00:00
Chris Lattner
ea1ddab58e
Split the machine code emitter completely out of the printer
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4882 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-03 06:34:06 +00:00
Chris Lattner
a5855c829b
Remove comment
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Remove handling of OtherFrm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4867 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-02 21:40:46 +00:00
Chris Lattner
f8bafe8fdb
Add rawfrm flags
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4841 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-01 23:25:59 +00:00
Chris Lattner
1d53ce4067
Handle cmp Reg, 0 correctly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4819 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 23:30:00 +00:00
Chris Lattner
128a7a96f0
Fix off by one bug
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4816 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 22:48:15 +00:00
Chris Lattner
47b4a9b2e0
Minor code cleanups
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4814 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 21:04:50 +00:00
Chris Lattner
1804233ca5
Implement printing of store instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4813 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 21:03:39 +00:00
Chris Lattner
3d3067bf6b
The big change here is to handle printing/emission of X86II::MRMSrcMem
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instructions. Right now the only users are load instructions, and Misha's
spill code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4812 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 20:44:15 +00:00
Chris Lattner
675dd2cc47
Add printing support for /0 /1 type instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4803 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 17:09:01 +00:00
Chris Lattner
77875d88d0
Support Registers of the form (B8+ rd) for example
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4798 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 02:00:20 +00:00
Chris Lattner
233ad71051
Implement printing more, implement opcode output more
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4796 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 01:33:44 +00:00
Chris Lattner
644e1abae4
Print another class of instructions correctly, giving us: xorl EDX, EDX
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for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4793 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 00:30:01 +00:00
Misha Brukman
e1f0d8113a
Check not only for MO_VirtualRegister, but MO_MachineRegister as well when
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printing out assembly. After all, we want the real thing too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4783 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-20 18:56:41 +00:00
Chris Lattner
f9f6088e17
Start trying to print instructions more correctly. For now we also print out the opcode for each instruction as well.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4743 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-18 06:56:51 +00:00
Chris Lattner
927dd095c4
Arrange to have a TargetMachine available in X86InstrInfo::print
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4734 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 23:20:37 +00:00
Chris Lattner
dbb61c6445
Reorganize printing interface a bit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4728 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 22:53:13 +00:00
Brian Gaeke
6559bb96a9
include/llvm/CodeGen/MachineInstrBuilder.h: Add addClobber() inline
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convenience method. Fix typo in comment.
lib/Target/X86/InstSelectSimple.cpp: Explicitly specify some implicit uses.
Use MOVZX/MOVSX instead of MOV instructions with sign extend instructions.
Take out LEAVE instructions.
32-bit IDIV and DIV use CDQ, not CWQ (CWQ is a typo).
Fix typo in comment and remove some FIXME comments.
lib/Target/X86/Printer.cpp: Include X86InstrInfo.h and llvm/Function.h.
Add some simple code to Printer::runOnFunction to iterate over
MachineBasicBlocks and call X86InstrInfo::print().
lib/Target/X86/X86InstrInfo.def: Make some more instructions with
implicit defs "Void". Add more sign/zero extending "move" insns
(movsx, movzx).
lib/Target/X86/X86RegisterInfo.def: Add EFLAGS as a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4707 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-14 22:32:30 +00:00
Chris Lattner
b4f68ed32e
Convert backend to use passes, implement X86TargetMachine
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4421 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-29 22:37:54 +00:00
Chris Lattner
75276f150e
Initial stab at MachineInstr'ication
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4367 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-28 23:55:19 +00:00
Chris Lattner
726140821f
Initial checkin of X86 backend.
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We can instruction select exactly one instruction 'ret void'. Wow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4284 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-25 22:55:53 +00:00