Let the generic token alias definitions handle the data subtype
suffices. We don't need explicit versions for each.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148718 91177308-0d34-0410-b5e6-96231b3b80d8
The value from the operands isn't right yet, but we weren't encoding it at
all previously. The parser needs to twiddle the values when building the
instruction.
Partial for: rdar://10558523
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147170 91177308-0d34-0410-b5e6-96231b3b80d8
Data type suffix aliasing. Previously handled via lots of instruction
aliases. Cleanup of those forthcoming.
rdar://10435076
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146007 91177308-0d34-0410-b5e6-96231b3b80d8
Combined destination and first source operand for f32 variant of the VMUL
(by scalar) instruction.
rdar://10522016
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145842 91177308-0d34-0410-b5e6-96231b3b80d8
Make it easier to deal with aliases for instructions that do require a suffix
but accept more specific variants of the same size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144588 91177308-0d34-0410-b5e6-96231b3b80d8
Canonicallize on the non-suffixed form, but continue to accept assembly that
has any correctly sized type suffix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144583 91177308-0d34-0410-b5e6-96231b3b80d8
These immediate operands all use the same simple logic for rendering to
MCInst, so have them share the method for doing so.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144439 91177308-0d34-0410-b5e6-96231b3b80d8
More cleanup of the general indexed addressing T2 instructions. Still more to
do, especially for stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139272 91177308-0d34-0410-b5e6-96231b3b80d8
Adjust encoding of writeback load/store instructions to better reflect the
way the operand types are represented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139270 91177308-0d34-0410-b5e6-96231b3b80d8
Thumb one requires that many arithmetic instruction forms have an 'S'
suffix. For Thumb2, the whether the suffix is required or precluded depends
on whether the instruction is in an IT block. Use target parser predicates
to check for these sorts of context-sensitive constraints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137746 91177308-0d34-0410-b5e6-96231b3b80d8
This new disassembler can correctly decode all the testcases that the old one did, though
some "expected failure" testcases are XFAIL'd for now because it is not (yet) as strict in
operand checking as the old one was.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137144 91177308-0d34-0410-b5e6-96231b3b80d8
Memory operand parsing is a bit haphazzard at the moment, in no small part
due to the even more haphazzard representations of memory operands in the .td
files. Start cleaning that all up, at least a bit.
The addressing modes in the .td files will be being simplified to not be
so monolithic, especially with regards to immediate vs. register offsets
and post-indexed addressing. addrmode3 is on its way with this patch, for
example.
This patch is foundational to enable going back to smaller incremental patches
for the individual memory referencing instructions themselves. It does just
enough to get the basics in place and handle the "make check" regression tests
we already have.
Follow-up work will be fleshing out the details and adding more robust test
cases for the individual instructions, starting with ARM mode and moving from
there into Thumb and Thumb2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136845 91177308-0d34-0410-b5e6-96231b3b80d8
