Commit Graph

3753 Commits

Author SHA1 Message Date
Chris Lattner
d6c84720df change the scope node to include a list of children to be checked
instead of to have a chained series of scope nodes.  This makes
the generated table smaller, improves the efficiency of the
interpreter, and make the factoring optimization much more 
reasonable to implement.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97160 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-25 19:00:39 +00:00
Dan Gohman
aa9d854b33 Revert r97064. Duncan pointed out that bitcasts are defined in
terms of store and load, which means bitcasting between scalar
integer and vector has endian-specific results, which undermines
this whole approach.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97137 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-25 15:20:39 +00:00
Dan Gohman
8566963713 Make LoopSimplify change conditional branches in loop exiting blocks
which branch on undef to branch on a boolean constant for the edge
exiting the loop. This helps ScalarEvolution compute trip counts for
loops.

Teach ScalarEvolution to recognize single-value PHIs, when safe, and
ForgetSymbolicName to forget such single-value PHI nodes as apprpriate
in ForgetSymbolicName.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97126 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-25 06:57:05 +00:00
Jakob Stoklund Olesen
657baec0af Create a stack frame on ARM when
- Function uses all scratch registers AND
- Function does not use any callee saved registers AND
- Stack size is too big to address with immediate offsets.

In this case a register must be scavenged to calculate the address of a stack
object, and the scavenger needs a spare register or emergency spill slot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97071 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-24 22:43:17 +00:00
Bob Wilson
e742bb53a3 Check for comparisons of +/- zero when optimizing less-than-or-equal and
greater-than-or-equal SELECT_CCs to NEON vmin/vmax instructions.  This is
only allowed when UnsafeFPMath is set or when at least one of the operands
is known to be nonzero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97065 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-24 22:15:53 +00:00
Dan Gohman
c382bc3c0f Make getTypeSizeInBits work correctly for array types; it should return
the number of value bits, not the number of bits of allocation for in-memory
storage.

Make getTypeStoreSize and getTypeAllocSize work consistently for arrays and
vectors.

Fix several places in CodeGen which compute offsets into in-memory vectors
to use TargetData information.

This fixes PR1784.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97064 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-24 22:05:23 +00:00
Daniel Dunbar
cfe30effbb Speculatively revert r97011, "Re-apply 96540 and 96556 with fixes.", again in
the hopes of fixing PPC bootstrap.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97040 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-24 17:05:47 +00:00
Dan Gohman
e832693acb When forming SSE min and max nodes for UGE and ULE comparisons, it's
necessary to swap the operands to handle NaN and negative zero properly.

Also, reintroduce logic for checking for NaN conditions when forming
SSE min and max instructions, fixed to take into consideration NaNs and
negative zeros. This allows forming min and max instructions in more
cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97025 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-24 06:52:40 +00:00
Chris Lattner
736a6ea3a2 Change the scheduler from adding nodes in allnodes order
to adding them in a determinstic order (bottom up from 
the root) based on the structure of the graph itself.

This updates tests for some random changes, interesting
bits: CodeGen/Blackfin/promote-logic.ll no longer crashes.
I have no idea why, but that's good right?

CodeGen/X86/2009-07-16-LoadFoldingBug.ll also fails, but
now compiles to have one fewer constant pool entry, making
the expected load that was being folded disappear.  Since it
is an unreduced mass of gnast, I just removed it.

This fixes PR6370


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97023 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-24 06:11:37 +00:00
Jim Grosbach
f9a4b7653d LowerCall() should always do getCopyFromReg() to reference the stack pointer.
Machine instruction selection is much happier when operands are in virtual
registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97012 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-24 01:43:03 +00:00
Evan Cheng
97e6b8390b Re-apply 96540 and 96556 with fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97011 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-24 01:42:31 +00:00
Jakob Stoklund Olesen
c3027f769a DIV8r must define %AX since X86DAGToDAGISel::Select() sometimes uses it
instead of %AL/%AH.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97006 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-24 00:39:35 +00:00
Jakob Stoklund Olesen
450986db96 Remember to handle sub-registers when moving imp-defs to a rematted instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96995 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-23 22:44:02 +00:00
Jakob Stoklund Olesen
dcfe5f30b5 Keep track of phi join registers explicitly in LiveVariables.
Previously, LiveIntervalAnalysis would infer phi joins by looking for multiply
defined registers. That doesn't work if the phi join is implicitly defined in
all but one of the predecessors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96994 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-23 22:43:58 +00:00
Wesley Peck
a70f28ce7d Adding the MicroBlaze backend.
The MicroBlaze is a highly configurable 32-bit soft-microprocessor for
use on Xilinx FPGAs. For more information see:
http://www.xilinx.com/tools/microblaze.htm
http://en.wikipedia.org/wiki/MicroBlaze

The current LLVM MicroBlaze backend generates assembly which can be
compiled using the an appropriate binutils assembler.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96969 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-23 19:15:24 +00:00
Richard Osborne
78700b0c55 Lower BR_JT on the XCore to a jump into a series of jump instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96942 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-23 13:25:07 +00:00
Evan Cheng
c6feeb7fa9 These should not have been committed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96827 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-22 23:37:48 +00:00
Chris Lattner
48eb39b1ab no need to run llvm-as here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96826 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-22 23:34:12 +00:00
Evan Cheng
6e5dfd4bf5 Instcombine constant folding can normalize gep with negative index to index with large offset. When instcombine objsize checking transformation sees these geps where the offset seemingly point out of bound, it should just return "i don't know" rather than asserting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96825 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-22 23:34:00 +00:00
Dan Gohman
0e488b3d1c Canonicalize ConstantInts to the right operand of commutative
operators.

The test difference is just due to the multiplication operands
being commuted (and thus requiring a more elaborate match). In
optimized code, that expression would be folded.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96816 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-22 22:43:23 +00:00
Dan Gohman
fc90d4c0f4 Actually enable the -enable-unsafe-fp-math tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96796 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-22 18:53:26 +00:00
Arnold Schwaighofer
9265275a9a Mark the return address stack slot as mutable when moving the return address
during a tail call. A parameter might overwrite this stack slot during the tail
call. 

The sequence during a tail call is:
1.) load return address to temp reg
2.) move parameters (might involve storing to return address stack slot)
3.) store return address to new location from temp reg

If the stack location is marked immutable CodeGen can colocate load (1) with the
store (3).

This fixes bug 6225.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96783 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-22 16:18:09 +00:00
Dan Gohman
8ce05daf54 Remove the logic for reasoning about NaNs from the code that forms
SSE min and max instructions. The real thing this code needs to be
concerned about is negative zero.

Update the sse-minmax.ll test accordingly, and add tests for
-enable-unsafe-fp-math mode as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96775 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-22 04:03:39 +00:00
Dan Gohman
278f958c61 When emitting an instruction which depends on both a post-incremented
induction variable value and a loop-variant value, don't force the
insert position to be at the post-increment position, because it may
not be dominated by the loop-variant value. This fixes a
use-before-def problem noticed on PPC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96774 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-22 03:59:54 +00:00
Chris Lattner
728ea19ece add some no-unwinds, other minor cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96756 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 20:33:20 +00:00
Chris Lattner
25e0f91d05 add a triple so that this doesn't fail due to linux/ppc register printing
syntax.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96748 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 19:27:38 +00:00
Chris Lattner
ad14fcc4c2 filecheckize and add nouwinds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96745 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 18:53:28 +00:00
Anton Korobeynikov
455080ff10 IT turns out that during jumpless setcc lowering eq and ne were swapped.
This fixes PR6348

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96734 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 12:28:58 +00:00
Chris Lattner
f1c6428164 fix and un-xfail X86/vec_ss_load_fold.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96720 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 04:53:34 +00:00
Chris Lattner
7f6de7df46 temporarily disable this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96717 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 03:24:41 +00:00
Dan Gohman
aae01f17a6 Check for overflow when scaling up an add or an addrec for
scaled reuse.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96692 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-19 19:32:49 +00:00
Charles Davis
5dfa26795d Add support for the 'alignstack' attribute to the x86 backend. Fixes PR5254.
Also, FileCheck'ize a test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96686 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-19 18:17:13 +00:00
Duncan Sands
3eba667081 Revert commits 96556 and 96640, because commit 96556 breaks the
dragonegg self-host build.  I reverted 96640 in order to revert
96556 (96640 goes on top of 96556), but it also looks like with
both of them applied the breakage happens even earlier.  The
symptom of the 96556 miscompile is the following crash:

  llvm[3]: Compiling AlphaISelLowering.cpp for Release build
  cc1plus: /home/duncan/tmp/tmp/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:4982: void llvm::SelectionDAG::ReplaceAllUsesWith(llvm::SDNode*, llvm::SDNode*, llvm::SelectionDAG::DAGUpdateListener*): Assertion `(!From->hasAnyUseOfValue(i) || From->getValueType(i) == To->getValueType(i)) && "Cannot use this version of ReplaceAllUsesWith!"' failed.
  Stack dump:
  0.	Running pass 'X86 DAG->DAG Instruction Selection' on function '@_ZN4llvm19AlphaTargetLowering14LowerOperationENS_7SDValueERNS_12SelectionDAGE'
  g++: Internal error: Aborted (program cc1plus)

This occurs when building LLVM using LLVM built by LLVM (via
dragonegg).  Probably LLVM has miscompiled itself, though it
may have miscompiled GCC and/or dragonegg itself: at this point
of the self-host build, all of GCC, LLVM and dragonegg were built
using LLVM.  Unfortunately this kind of thing is extremely hard
to debug, and while I did rummage around a bit I didn't find any
smoking guns, aka obviously miscompiled code.

Found by bisection.

r96556 | evancheng | 2010-02-18 03:13:50 +0100 (Thu, 18 Feb 2010) | 5 lines

Some dag combiner goodness:
Transform br (xor (x, y)) -> br (x != y)
Transform br (xor (xor (x,y), 1)) -> br (x == y)
Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm"

r96640 | evancheng | 2010-02-19 01:34:39 +0100 (Fri, 19 Feb 2010) | 16 lines

Transform (xor (setcc), (setcc)) == / != 1 to
(xor (setcc), (setcc)) != / == 1.

e.g. On x86_64
  %0 = icmp eq i32 %x, 0
  %1 = icmp eq i32 %y, 0
  %2 = xor i1 %1, %0
  br i1 %2, label %bb, label %return
=>
	testl   %edi, %edi
	sete    %al
	testl   %esi, %esi
	sete    %cl
	cmpb    %al, %cl
	je      LBB1_2



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96672 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-19 11:30:41 +00:00
Evan Cheng
97a35fc3a7 Transform (xor (setcc), (setcc)) == / != 1 to
(xor (setcc), (setcc)) != / == 1.

e.g. On x86_64
  %0 = icmp eq i32 %x, 0
  %1 = icmp eq i32 %y, 0
  %2 = xor i1 %1, %0
  br i1 %2, label %bb, label %return
=>
	testl   %edi, %edi
	sete    %al
	testl   %esi, %esi
	sete    %cl
	cmpb    %al, %cl
	je      LBB1_2


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96640 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-19 00:34:39 +00:00
Dan Gohman
1b7bf18def When determining the set of interesting reuse factors, consider
strides in foreign loops. This helps locate reuse opportunities
with existing induction variables in foreign loops and reduces
the need for inserting new ones. This fixes rdar://7657764.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96629 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-19 00:05:23 +00:00
Mon P Wang
1c40e188c5 getSplatIndex assumes that the first element of the mask contains the splat index
which is not always true if the mask contains undefs. Modified it to return
the first non undef value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96621 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-18 22:33:18 +00:00
Jakob Stoklund Olesen
352d352c02 Always normalize spill weights, also for intervals created by spilling.
Moderate the weight given to very small intervals.

The spill weight given to new intervals created when spilling was not
normalized in the same way as the original spill weights calculated by
CalcSpillWeights. That meant that restored registers would tend to hang around
because they had a much higher spill weight that unspilled registers.

This improves the runtime of a few tests by up to 10%, and there are no
significant regressions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96613 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-18 21:33:05 +00:00
Dan Gohman
49d7f8d341 Make CodePlacementOpt detect special EH control flow by
checking whether AnalyzeBranch disagrees with the CFG
directly, rather than looking for EH_LABEL instructions.
EH_LABEL instructions aren't always at the end of the
block, due to FP_REG_KILL and other things. This fixes
an infinite loop compiling MultiSource/Benchmarks/Bullet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96611 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-18 21:25:53 +00:00
Chris Lattner
7954926aeb remove empty file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96573 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-18 06:29:06 +00:00
Bob Wilson
9f6c4c141f Use NEON vmin/vmax instructions for floating-point selects.
Radar 7461718.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96572 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-18 06:05:53 +00:00
Evan Cheng
89bb7b5640 Some dag combiner goodness:
Transform br (xor (x, y)) -> br (x != y)
Transform br (xor (xor (x,y), 1)) -> br (x == y)
Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm"


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96556 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-18 02:13:50 +00:00
Dan Gohman
2a5431e004 Don't check for comments, which vary between subtargets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96434 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-17 01:08:57 +00:00
Dan Gohman
968cb939e5 Don't attempt to divide INT_MIN by -1; consider such cases to
have overflowed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96428 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-17 00:41:53 +00:00
Chris Lattner
ca0aacc5aa roundss is an sse 4 thing, fix the test on non-sse41 builders
like llvm-gcc-x86_64-darwin10-selfhost


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96417 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-17 00:29:06 +00:00
Dale Johannesen
4a12de72b0 Make g5 target explicit; scheduling affects register choice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96413 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 23:25:23 +00:00
Chris Lattner
92d3ada814 fix rdar://7653908, a crash on a case where we would fold a load
into a roundss intrinsic, producing a cyclic dag.  The root cause
of this is badness handling ComplexPattern nodes in the old dagisel
that I noticed through inspection.  Eliminate a copy of the of the
code that handled ComplexPatterns by making EmitChildMatchCode call
into EmitMatchCode.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96408 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 22:35:06 +00:00
Dale Johannesen
55f9adf543 Adjust register numbers in tests to compensate for the
new lack of R2.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96407 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 22:31:31 +00:00
Chris Lattner
5583b83dd4 filecheckize
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96404 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 22:13:43 +00:00
Evan Cheng
ae3ecf9603 Look for SSE and instructions of this form: (and x, (build_vector c1,c2,c3,c4)).
If there exists a use of a build_vector that's the bitwise complement of the mask,
then transform the node to
(and (xor x, (build_vector -1,-1,-1,-1)), (build_vector ~c1,~c2,~c3,~c4)).

Since this transformation is only useful when 1) the given build_vector will
become a load from constpool, and 2) (and (xor x -1), y) matches to a single
instruction, I decided this is appropriate as a x86 specific transformation.
rdar://7323335


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96389 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 21:09:44 +00:00
David Greene
8939b0d8a9 Add support for emitting non-temporal stores for DAGs marked
non-temporal.  Fix from r96241 for botched encoding of MOVNTDQ.

Add documentation for !nontemporal metadata.

Add a simpler movnt testcase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96386 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 20:50:18 +00:00