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1800 Commits

Author SHA1 Message Date
Chris Lattner
cdbaeb52ae CSRet allows varargs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28409 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-19 21:34:04 +00:00
Chris Lattner
778ae71f37 Add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28401 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-19 20:55:31 +00:00
Chris Lattner
c11ab17a8e Split the SSE readme items out into their own README. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28400 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-19 20:51:43 +00:00
Chris Lattner
2420d81247 Split FP-stack notes out of the main readme. Next up: splitting out SSE. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28399 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-19 20:45:52 +00:00
Chris Lattner
de050a7509 Particularly ugly code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28397 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-19 19:41:33 +00:00
Evan Cheng
6de0163201 These can be transformed into lea as well. Not that we use this feature 
currently...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28393 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-19 18:43:41 +00:00
Evan Cheng
09e3c80984 - Use exact-width integer types, e.g. int32_t, to avoid confusion. 
- Fix a couple of minor bugs in i16immSExt8 and i16immZExt8.
- Added loadiPTR fragment used for indirect jumps and calls.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28392 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-19 18:40:54 +00:00
Evan Cheng
fc8feb184e Explicitly specify MOV32mi can only be used store 32-bit GV, etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28390 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-19 07:30:36 +00:00
Chris Lattner
3f705e660a add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28383 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-18 17:38:16 +00:00
Evan Cheng
751458dac9 ImmMask should be 3 for a two-bit field; Compact X86II 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28381 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-18 06:27:15 +00:00
Evan Cheng
0f3ac8d8d4 getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28378 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-18 00:12:58 +00:00
Evan Cheng
af78ef526d Use generic iPTR instead i32 to represent pointer type. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28371 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 21:21:41 +00:00
Evan Cheng
c8999f2a0a Another entry 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28370 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 21:20:51 +00:00
Evan Cheng
c01d497255 Remove PointerType from class Target 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28368 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 21:20:27 +00:00
Evan Cheng
4ac8974d02 Should pass by reference. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28357 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 19:07:40 +00:00
Evan Cheng
4dfa85d1df Another entry 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28356 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 19:05:31 +00:00
Chris Lattner
aa9406b0c4 Implement the custom lowering hook right, returning values for all of the 
arguments at once.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28327 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 17:14:26 +00:00
Chris Lattner
e7746c9084 Fix a bug I introduced yesterday, which broke functions with *no* arguments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28326 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 17:08:35 +00:00
Evan Cheng
069287d460 X86 integer register classes naming changes. Make them consistent with FP, vector classes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28324 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 07:21:53 +00:00
Chris Lattner
8c0c10c2b9 Add a chain to FORMAL_ARGUMENTS. This is a minimal port of the X86 backend, 
it doesn't currently use/maintain the chain properly.  Also, make the
X86ISelLowering.cpp file 80-col clean.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28320 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 06:45:34 +00:00
Chris Lattner
98d0d7d6f0 More coverity fixes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28266 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 21:14:20 +00:00
Chris Lattner
03ea4c8326 Dead variable 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28265 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 21:12:22 +00:00
Evan Cheng
0bbac9ffd1 Remove dead code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28261 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 19:03:56 +00:00
Owen Anderson
07000c6f01 Refactor a bunch of includes so that TargetMachine.h doesn't have to include 
TargetData.h.  This should make recompiles a bit faster with my current
TargetData tinkering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28238 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 06:33:49 +00:00
Evan Cheng
f4df680ad4 Add MOV16_rm / MOV32_rm and MOV16_mr / MOV32_mr to isLoadFromStackSlot and isStoreToStackSlot 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28223 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-11 07:33:49 +00:00
Evan Cheng
8399c5cbe4 Remove a completed entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28199 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-09 06:54:05 +00:00
Chris Lattner
7faec9b93a Implement MASM sections correctly, without a "has masm sections flag" and a bunch of special case code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28194 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-09 05:33:48 +00:00
Chris Lattner
c9260a1556 MASM doesn't have one of these. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28190 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-09 05:21:47 +00:00
Chris Lattner
e7027d5339 Preserve prior behavior 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28187 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-09 05:15:24 +00:00
Chris Lattner
dad9c5a14f Fix the MASM asmprinter's lies. It does not want to emit code to .text/.data 
it wants it emitted to _text/_data.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28185 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-09 05:12:53 +00:00
Chris Lattner
4632d7a570 Split SwitchSection into SwitchTo{Text|Data}Section methods. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28184 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-09 04:59:56 +00:00
Chris Lattner
9fd868ae0a Another bad case I noticed 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28177 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-08 21:39:45 +00:00
Chris Lattner
8ef67ac3c3 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28176 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-08 21:24:21 +00:00
Evan Cheng
403be7eafc Fixing truncate. Previously we were emitting truncate from r16 to r8 as 
movw. That is we promote the destination operand to r16. So
        %CH = TRUNC_R16_R8 %BP
is emitted as
        movw %bp, %cx.

This is incorrect. If %cl is live, it would be clobbered.
Ideally we want to do the opposite, that is emitted it as
        movb ??, %ch
But this is not possible since %bp does not have a r8 sub-register.

We are now defining a new register class R16_ which is a subclass of R16
containing only those 16-bit registers that have r8 sub-registers (i.e.
AX - DX). We isel the truncate to two instructions, a MOV16to16_ to copy the
value to the R16_ class, followed by a TRUNC_R16_R8.

Due to bug 770, the register colaescer is not going to coalesce between R16 and
R16_. That will be fixed later so we can eliminate the MOV16to16_. Right now, it
can only be eliminated if we are lucky that source and destination registers are
the same.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28164 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-08 08:01:26 +00:00
Evan Cheng
74811450b2 Typo's 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28158 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-07 10:10:20 +00:00
Jeff Cohen
d43b18d9e4 Fix some loose ends in MASM support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28148 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 21:27:14 +00:00
Chris Lattner
80a7ecc923 Teach the X86 backend about non-i32 inline asm register classes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28139 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 00:29:37 +00:00
Chris Lattner
7660ebc90a Print *some* grouping around inline asm blocks so we know where they are. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28133 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 21:48:50 +00:00
Chris Lattner
bd04aa5796 Teach the code generator to use cvtss2sd as extload f32 -> f64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28131 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 21:35:18 +00:00
Evan Cheng
4713724eda Need extload patterns after Chris' DAG combiner changes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28127 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 08:23:07 +00:00
Evan Cheng
8f7f7125e9 Better implementation of truncate. ISel matches it to a pseudo instruction 
that gets emitted as movl (for r32 to i16, i8) or a movw (for r16 to i8). And
if the destination gets allocated a subregister of the source operand, then
the instruction will not be emitted at all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28119 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 05:40:20 +00:00
Chris Lattner
8b915b4ed2 Remove and simplify some more machineinstr/machineoperand stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28105 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 18:16:01 +00:00
Chris Lattner
2d90ac7ca6 Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28104 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 18:05:43 +00:00
Chris Lattner
e53f4a055f Move some methods out of MachineInstr into MachineOperand 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28102 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 17:52:23 +00:00
Chris Lattner
63b3d7113d There shalt be only one "immediate" operand type! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28099 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 17:21:20 +00:00
Jeff Cohen
10efcfabf1 Make external globals public; other minor cleanup. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28096 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 16:20:22 +00:00
Jeff Cohen
a6e24d8caf Make Intel syntax the default when LLVM is built with VC++. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28095 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 16:19:27 +00:00
Chris Lattner
4efeab208c Remove a bunch more dead V9 specific stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28094 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 01:26:39 +00:00
Chris Lattner
ea50fabfd4 Remove a bunch more SparcV9 specific stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28093 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 01:15:02 +00:00
Chris Lattner
34fb2cad46 Remove some more V9-specific stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28092 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 00:49:59 +00:00