Commit Graph

96024 Commits

Author SHA1 Message Date
Tim Northover
adadf887cb X86: FrameIndex addressing modes do have a base register.
When selecting the DAG (add (WrapperRIP ...), (FrameIndex ...)), X86 code had
spotted the FrameIndex possibility and was working out whether it could fold
the WrapperRIP into this.

The test for forming a %rip version is notionally whether we already have a
base or index register (%rip precludes both), but we were forgetting to account
for the register that would be inserted later to access the frame.

rdar://problem/15024520

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190995 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-19 11:33:53 +00:00
Andrew Trick
abe68f5917 Revert "Encapsulate PassManager debug flags to avoid static init and cxa_exit."
Working on a better solution to this.

This reverts commit 7d4e9934e7.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190990 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-19 06:02:43 +00:00
Andrew Trick
7d4e9934e7 Encapsulate PassManager debug flags to avoid static init and cxa_exit.
This puts all the global PassManager debugging flags, like
-print-after-all and -time-passes, behind a managed static. This
eliminates their static initializers and, more importantly, exit-time
destructors.

The only behavioral change I anticipate is that tools need to
initialize the PassManager before parsing the command line in order to
export these options, which makes sense. Tools that already initialize
the standard passes (opt/llc) don't need to do anything new.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190974 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 23:31:16 +00:00
Andrew Trick
2cccc6220c whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190973 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 23:31:10 +00:00
Reed Kotler
c1fe3e3b33 Fix two issues regarding Got pointer (GP) setup.
1) make sure that the first two instructions of the sequence cannot
separate from each other. The linker requires that they be sequential.
If they get separated, it can still work but it will not work in all
cases because the first of the instructions mostly involves the hi part
of the pc relative offset and that part changes slowly. You would have
to be at the right boundary for this to matter.
2) make sure that this sequence begins  on a longword boundary. 
There appears to be a bug in binutils which makes some of these calculations
get messed up if the instruction sequence does not begin on a longword
boundary. This is being investigated with the appropriate binutils folks.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190966 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 22:46:09 +00:00
Adrian Prantl
0a4371a207 Debug info: Get rid of the VLA indirection hack in FastISel.
Use the DIVariable::isIndirect() flag set by the frontend instead of
guessing whether to set the machine location's indirection bit.
Paired commit with CFE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190961 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 22:08:59 +00:00
Preston Gurd
51279d45f7 Attempt to fix llvm-ppc64-linux2 buildbot failure by adding
-march=x86 to SLM test.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190958 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 21:39:33 +00:00
Preston Gurd
7d03cc8715 Verify that llvm can generate the prefetchw instruction when the CPU is
Atom Silvermont.

Patch by Sriram Murali.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190957 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 21:08:09 +00:00
Galina Kistanova
d139e02e9b Remove empty dir.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190952 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 18:39:38 +00:00
Galina Kistanova
5e7acc63e0 Remove empty dir.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190948 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 17:58:41 +00:00
Filip Pizlo
b4b9b3b24c Make DynamicLibrary use ManagedStatic. This is pretty simple and should just work as
advertised - but it does have the caveat that calls to DynamicLibrary::AddSymbol will 
"reset" if you shutdown llvm and try to come back for seconds.  This is a subtle 
behavior change, but I'm assuming that nobody is affected by it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190946 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 16:40:14 +00:00
Chandler Carruth
69f99bf3a3 More XCore TTI cleanup -- remove an unused private field flagged by
-Wunused-private-field with Clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190941 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 14:11:11 +00:00
Chandler Carruth
89ec610f76 Name the XCore target-specific subdirectories canonically.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190940 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 14:08:30 +00:00
Kostya Serebryany
ac04abaf5a [asan] call __asan_stack_malloc_N only if use-after-return detection is enabled with the run-time option
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190939 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 14:07:14 +00:00
NAKAMURA Takumi
fa7b1e24e5 A couple of tests, in llvm/test/Transforms/*/xcore, are XCore-specific. They should be excluded when XCore is not built.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190938 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 13:56:16 +00:00
NAKAMURA Takumi
8c03d6a9e8 Target/XCore/CMakeLists.txt: Add XCoreTargetTransformInfo.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190937 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 12:59:41 +00:00
Robert Lytton
d072d1b2a3 Prevent LoopVectorizer and SLPVectorizer running if the target has no vector registers.
XCore target: Add XCoreTargetTransformInfo
This is where getNumberOfRegisters() resides, which in turn returns the
number of vector registers (=0).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190936 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 12:43:35 +00:00
Andrea Di Biagio
af96481135 Re-add tests from r179291 which were accidentally removed by r181177.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190934 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 12:06:59 +00:00
Richard Sandiford
e2d6f91d63 [SystemZ] Add unsigned compare-and-branch instructions
For some reason I never got around to adding these at the same time as
the signed versions.  No idea why.

I'm not sure whether this SystemZII::BranchC* stuff is useful, or whether
it should just be replaced with an "is normal" flag.  I'll leave that
for later though.

There are some boundary conditions that can be tweaked, such as preferring
unsigned comparisons for equality with [128, 256), and "<= 255" over "< 256",
but again I'll leave those for a separate patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190930 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 09:56:40 +00:00
Joey Gouly
8634b0ee47 'svn add' the test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190929 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 09:46:49 +00:00
Joey Gouly
a4d46d7fc6 [ARMv8] Add CRC instructions.
Patch by Bradley Smith!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190928 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 09:45:55 +00:00
Filip Pizlo
163df38bdf Revert r190921. It broke Windows.
I'll roll it back in when I have a chance to look at it in detail.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190923 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 06:37:55 +00:00
Filip Pizlo
e77ea6b07e Make DynamicLibrary use ManagedStatic. This is pretty simple and should just work as
advertised - but it does have the caveat that calls to DynamicLibrary::AddSymbol will 
"reset" if you shutdown llvm and try to come back for seconds.  This is a subtle 
behavior change, but I'm assuming that nobody is affected by it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190921 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 06:03:27 +00:00
Craig Topper
4284855391 Prevent extra calls to ToggleFeature for Feature64Bit and FeatureCMOV if they've already been enabled. The extra call ends up clearing the bit in FeatureBits since its a 'toggle'. Can't prove that anything was broken because of this since I don't think the FeatureBits for these are used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190920 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 06:01:53 +00:00
Craig Topper
773c07606e Fix X86 subtarget to not overwrite the autodetected features by calling InitMCProcessorInfo right after detecting them. Instead add a new function that only updates the scheduling model and call that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190919 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 05:54:09 +00:00
Craig Topper
b8f54d86f2 Revert accidental commit I had to make to get the test case in PR17268 to still work correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190917 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 04:10:17 +00:00
Craig Topper
4acd20a20b Lift alignment restrictions for load/store folding on VINSERTF128/VEXTRACTF128. Fixes PR17268.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190916 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 03:55:53 +00:00
David Blaikie
0b956507ca ifndef NDEBUG-out an asserts-only constant committed in r190863
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190905 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 00:11:27 +00:00
Matt Arsenault
2334b0e802 Fix a constant folding address space place I missed.
If address space 0 was smaller than the address space
in a constant inttoptr/ptrtoint pair, the wrong mask size
would be used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190899 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-17 23:23:16 +00:00
Reid Kleckner
28860823ad COFF: Ensure that objects produced by LLVM link with /safeseh
Summary:
We indicate that the object files are safe by emitting a @feat.00
absolute address symbol.  The address is presumably interpreted as a
bitfield of features that the compiler would like to enable.  Bit 0 is
documented in the PE COFF spec to opt in to "registered SEH", which is
what /safeseh enables.

LLVM's object files are safe by default because LLVM doesn't know how to
produce SEH handlers.

Reviewers: Bigcheese

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D1691

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190898 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-17 23:18:05 +00:00
Matt Arsenault
c61c811621 Missed using check type enum in one place
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190897 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-17 23:15:35 +00:00
Matt Arsenault
53bb26f61c Use function's argument instead of the global flag.
For now it happens the argument is always the same.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190896 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-17 22:45:57 +00:00
Matt Arsenault
4f67afc3d6 FileCheck refactor: use enum instead of bunch of bools
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190893 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-17 22:30:02 +00:00
Quentin Colombet
5383a37747 Revert the load slicing done in r190870.
To avoid regressions with bitfield optimizations, this slicing should take place
later, like ISel time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190891 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-17 22:01:26 +00:00
Reid Kleckner
3168868bb9 COFF: Emit all MCSymbols rather than filtering out some of them
In particular, this means we emit non-external symbols defined to
variables, such as aliases or absolute addresses.

This is needed to implement /safeseh, and it appears there was some
confusion about what symbols to emit previously.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190888 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-17 21:24:44 +00:00
Reid Kleckner
4157d68ece COFF: Remove ExportSection, which has been dead since r114823
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190887 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-17 21:24:02 +00:00
Eric Christopher
2bc3cd83b3 Move variable into assert to avoid unused variable warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190886 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-17 21:13:57 +00:00
Matt Arsenault
3e1c40de7f Cleanup handling of constant function casts.
Some of this code is no longer necessary since int<->ptr casts are no
longer occur as of r187444.

This also fixes handling vectors of pointers, and adds a bunch of new
testcases for vectors and address spaces.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190885 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-17 21:10:14 +00:00
Bill Schmidt
3789209b79 [PowerPC] Add a FIXME.
Documenting a design choice to generate only medium model sequences for TLS
addresses at this time.  Small and large code models could be supported if
necessary.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190883 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-17 20:22:05 +00:00
Bill Schmidt
5bd1dfa2b5 [PowerPC] Fix problems with large code model (PR17169).
Large code model on PPC64 requires creating and referencing TOC entries when
using the addis/ld form of addressing.  This was not being done in all cases.
The changes in this patch to PPCAsmPrinter::EmitInstruction() fix this.  Two
test cases are also modified to reflect this requirement.

Fast-isel was not creating correct code for loading floating-point constants
using large code model.  This also requires the addis/ld form of addressing.
Previously we were using the addis/lfd shortcut which is only applicable to
medium code model.  One test case is modified to reflect this requirement.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190882 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-17 20:03:25 +00:00
Arnold Schwaighofer
65457b679a Costmodel: Add support for horizontal vector reductions
Upcoming SLP vectorization improvements will want to be able to estimate costs
of horizontal reductions. Add infrastructure to support this.

We model reductions as a series of (shufflevector,add) tuples ultimately
followed by an extractelement. For example, for an add-reduction of <4 x float>
we could generate the following sequence:

 (v0, v1, v2, v3)
   \   \  /  /
     \  \  /
       +  +

 (v0+v2, v1+v3, undef, undef)
    \      /
 ((v0+v2) + (v1+v3), undef, undef)

 %rdx.shuf = shufflevector <4 x float> %rdx, <4 x float> undef,
                           <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
 %bin.rdx = fadd <4 x float> %rdx, %rdx.shuf
 %rdx.shuf7 = shufflevector <4 x float> %bin.rdx, <4 x float> undef,
                          <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
 %bin.rdx8 = fadd <4 x float> %bin.rdx, %rdx.shuf7
 %r = extractelement <4 x float> %bin.rdx8, i32 0

This commit adds a cost model interface "getReductionCost(Opcode, Ty, Pairwise)"
that will allow clients to ask for the cost of such a reduction (as backends
might generate more efficient code than the cost of the individual instructions
summed up). This interface is excercised by the CostModel analysis pass which
looks for reduction patterns like the one above - starting at extractelements -
and if it sees a matching sequence will call the cost model interface.

We will also support a second form of pairwise reduction that is well supported
on common architectures (haddps, vpadd, faddp).

 (v0, v1, v2, v3)
  \   /    \  /
 (v0+v1, v2+v3, undef, undef)
    \     /
 ((v0+v1)+(v2+v3), undef, undef, undef)

  %rdx.shuf.0.0 = shufflevector <4 x float> %rdx, <4 x float> undef,
        <4 x i32> <i32 0, i32 2 , i32 undef, i32 undef>
  %rdx.shuf.0.1 = shufflevector <4 x float> %rdx, <4 x float> undef,
        <4 x i32> <i32 1, i32 3, i32 undef, i32 undef>
  %bin.rdx.0 = fadd <4 x float> %rdx.shuf.0.0, %rdx.shuf.0.1
  %rdx.shuf.1.0 = shufflevector <4 x float> %bin.rdx.0, <4 x float> undef,
        <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
  %rdx.shuf.1.1 = shufflevector <4 x float> %bin.rdx.0, <4 x float> undef,
        <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
  %bin.rdx.1 = fadd <4 x float> %rdx.shuf.1.0, %rdx.shuf.1.1
  %r = extractelement <4 x float> %bin.rdx.1, i32 0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190876 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-17 18:06:50 +00:00
Arnold Schwaighofer
3c94006742 SLPVectorizer: Don't vectorize phi nodes that use invoke values
We can't insert an insertelement after an invoke. We would have to split a
critical edge. So when we see a phi node that uses an invoke we just give up.

radar://14990770

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190871 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-17 17:03:29 +00:00
Quentin Colombet
0119f3df9c [InstCombiner] Slice a big load in two loads when the elements are next to each
other in memory.

The motivation was to get rid of truncate and shift right instructions that get
in the way of paired load or floating point load.
E.g.,
Consider the following example:
struct Complex {
  float real;
  float imm;
};

When accessing a complex, llvm was generating a 64-bits load and the imm field
was obtained by a trunc(lshr) sequence, resulting in poor code generation, at
least for x86.

The idea is to declare that two load instructions is the canonical form for
loading two arithmetic type, which are next to each other in memory.

Two scalar loads at a constant offset from each other are pretty
easy to detect for the sorts of passes that like to mess with loads. 

<rdar://problem/14477220>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190870 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-17 16:57:34 +00:00
Preston Gurd
2ff37c701e Remove unused code, which had been commented out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190869 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-17 16:53:36 +00:00
Serge Pavlov
496f02481d Added documentation to getMemsetStores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190866 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-17 16:24:42 +00:00
Ben Langmuir
215585920f Add llvm.x86.* intrinsics for Intel SHA Extensions
Add llvm.x86.* intrinsics for all of the Intel SHA Extensions instructions, as
well as tests. Also remove mayLoad and hasSideEffects, which can be inferred
from the instruction patterns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190864 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-17 13:44:39 +00:00
Kostya Serebryany
671c3ba921 [asan] inline the calls to __asan_stack_free_* with small sizes. Yet another 10%-20% speedup for use-after-return
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190863 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-17 12:14:50 +00:00
Joey Gouly
dc0de80f24 [ARM] Fix the deprecation of MCR encodings that map to CP15{ISB,DSB,DMB}.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190862 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-17 09:54:57 +00:00
Stepan Dyatkovskiy
80361492ae Bugfix for PR17099:
Wrong cast operation.
MergeFunctions emits Bitcast instead of pointer-to-integer operation.
Patch fixes MergeFunctions::writeThunk function. It replaces
unconditional Bitcast creation with "Value* createCast(...)" method, that
checks operand types and selects proper instruction.
See unit-test as example.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190859 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-17 09:36:11 +00:00
Elena Demikhovsky
8e5fae2b1b AVX-512: Converted to Unix style
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190851 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-17 07:34:34 +00:00