Jakob Stoklund Olesen
5a57168a55
Mark the standard pseudos as isPseudo = 1.
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The difference between isPseudo and isCodeGenOnly is a bit murky, but
isCodeGenOnly should eventually go away. It is used for instructions
that are clones of real instructions with slightly different properties.
The standard pseudo-instructions never mirror real instructions, so they
are definitely in the isPseudo category.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141567 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10 18:51:33 +00:00
Bruno Cardoso Lopes
9d2fa87816
The Mips specific function for instruction cache invalidation cannot be
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compiled on mips32r1 processors because it uses synci and rdhwr instructions
which are supported only on mips32r2, so I replaced this function with the
call to function cacheflush which works for both mips32r1 and mips32r2.
Patch by Sasa Stankovic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141564 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10 18:41:02 +00:00
Benjamin Kramer
a86a58695d
X86: Add patterns for the movbe instruction (mov + bswap, only available on atom)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141563 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10 18:34:56 +00:00
Jakob Stoklund Olesen
a0ed0c0fcd
Insert dummy ED table entries for pseudo-instructions.
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The table is indexed by opcode, so simply removing pseudo-instructions
creates a wrong mapping from opcode to table entry.
Add a test case for xorps which has a very high opcode that exposes this
problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141562 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10 18:30:16 +00:00
Bill Wendling
eba564ceac
Revert r141365. It was causing MultiSource/Benchmarks/MiBench/consumer-lame to
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hang, and possibly SPEC/CINT2006/464_h264ref.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141560 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10 18:27:30 +00:00
Owen Anderson
042aadd8ee
MCAtom extending methods need to extend the range of the atom as well.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141557 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10 18:09:38 +00:00
Bill Wendling
475fa2608c
Mark the llvm.eh.sjlj.functioncontext intrinsic as reading memory so that fast
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isel doesn't ignore it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141548 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10 17:08:47 +00:00
Benjamin Kramer
d226ed71f2
llvm-objdump: Take ownership of MCInstrInfos.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141535 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10 13:10:09 +00:00
Benjamin Kramer
1a9908daeb
llvm-nm: Don't leak bitcode buffers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141534 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10 13:10:04 +00:00
Benjamin Kramer
5d53ff54c0
XFAIL tblgen tests on leak checkers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141533 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10 13:09:59 +00:00
Bill Wendling
8129d21396
When getting the number of bits necessary for addressing mode
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ARMII::AddrModeT1_s, we need to take into account that if the frame register is
ARM::SP, then the number of bits is 8. If it's not ARM::SP, then the number of
bits is 5.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141529 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10 07:24:23 +00:00
Craig Topper
1f104804bf
Put a bunch of calls to ToggleFeature behind proper if statements.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141527 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10 05:34:02 +00:00
Chad Rosier
29b9d7e4ea
Fix a regression from r138445. If we're loading from the frame/base pointer
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the tADDrSPi instruction can't be used. Make sure we're updating the opcode
to tADDi3 in all cases.
rdar://10254707
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141523 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10 01:03:35 +00:00
Justin Holewinski
68226a4d46
PTX: Print .ptr kernel attributes if PTX version >= 2.2
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141508 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-09 15:42:02 +00:00
Craig Topper
da394041c4
Add Ivy Bridge 16-bit floating point conversion instructions for the X86 disassembler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141505 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-09 07:31:39 +00:00
Jakob Stoklund Olesen
b7994fedcb
Prevent potential NOREX bug.
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A GR8_NOREX virtual register is created when extrating a sub_8bit_hi
sub-register:
%vreg2<def> = COPY %vreg1:sub_8bit_hi; GR8_NOREX:%vreg2 %GR64_ABCD:%vreg1
TEST8ri_NOREX %vreg2, 1, %EFLAGS<imp-def>; GR8_NOREX:%vreg2
If such a live range is ever split, its register class must not be
inflated to GR8. The sub-register copy can only target GR8_NOREX.
I dont have a test case for this theoretical bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141500 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 20:20:03 +00:00
Jakob Stoklund Olesen
ed74482704
Add TEST8ri_NOREX pseudo to constrain sub_8bit_hi copies.
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In 64-bit mode, sub_8bit_hi sub-registers can only be used by NOREX
instructions. The COPY created from the EXTRACT_SUBREG DAG node cannot
target all GR8 registers, only those in GR8_NOREX.
TO enforce this, we ensure that all instructions using the
EXTRACT_SUBREG are GR8_NOREX constrained.
This fixes PR11088.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141499 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 18:28:28 +00:00
Jakob Stoklund Olesen
a55f6575ae
Add missing test case for r141410.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141498 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 18:06:54 +00:00
Benjamin Kramer
70b582ab9c
Include direct.h for _mkdir on mingw32 too.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141495 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 15:49:19 +00:00
Che-Liang Chiou
3ae9cf5ba4
Revert r141079: tblgen: add preprocessor as a separate mode
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141492 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 12:39:26 +00:00
Nicolas Geoffray
f8557957fb
Always check if a method or a type exist before trying to create it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141490 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 11:56:36 +00:00
NAKAMURA Takumi
48f248ad5f
lib/Object: Suppress warnings on gcc-4.3.4 cygwin
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141485 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 11:22:53 +00:00
NAKAMURA Takumi
017449d64b
lib/DebugInfo/DWARFDebugLine.cpp: De-Unicode-ify.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141484 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 11:22:47 +00:00
NAKAMURA Takumi
3a79eac5b8
Whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141483 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 11:22:41 +00:00
Anton Korobeynikov
2d4b60f3a4
Disable ABS optimization for Thumb1 target, we don't have necessary instructions there.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141481 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 08:38:45 +00:00
Akira Hatanaka
4391bb75ec
Simplify definition of FP move instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141476 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 03:50:18 +00:00
Akira Hatanaka
c9289f6a71
Define classes and multiclasses for FP binary instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141475 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 03:38:41 +00:00
Akira Hatanaka
bfca0798cf
Define multiclasses for FP-to-FP instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141474 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 03:29:22 +00:00
Akira Hatanaka
a8de1c1be0
Define classes for FP unary instructions and multiclasses for FP-to-fixed point
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conversion instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141473 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 03:19:38 +00:00
Andrew Trick
861a410cb6
Unit test for LSR phi reuse in r141442.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141472 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 02:34:51 +00:00
Akira Hatanaka
cb518ee5dd
Add patterns for unaligned load and store instructions and enable the
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instruction selector to generate them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141471 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 02:24:10 +00:00
Andrew Trick
94794dd8d3
Add an extra safety check in front of the optimization in r141442.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141470 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 02:16:39 +00:00
Bill Wendling
d5d1700972
Use the code that lowers the arguments and spills any values which are alive
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across unwind edges. This is for the back-end which expects such things.
The code is from the original SjLj EH pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141463 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 00:56:47 +00:00
Peter Collingbourne
0be07d39b1
Add clang-tblgen to OPTIONAL_DIRS when building native tools for the
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cross build, so that a native version of clang-tblgen is available.
Should unbreak Clang cross build.
Also disable Polly for the native tool build, since it depends on
external libraries which may not be available, and it isn't required
anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141454 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 00:27:38 +00:00
Michael J. Spencer
27781b78e1
llvm-objdump: Add relocation and archive support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141451 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 00:18:30 +00:00
Michael J. Spencer
880545e5d7
PathV2: Add simplified version of exists that returns false on error.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141450 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 00:18:12 +00:00
Michael J. Spencer
c6500a5d77
Object: Add support for opening stdin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141449 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 00:17:58 +00:00
Michael J. Spencer
5861893c25
Object: constize Archive.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141448 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 00:17:45 +00:00
Jim Grosbach
051fee0312
Enable ARM mode VDUP(scalar) tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141447 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07 23:57:03 +00:00
Jim Grosbach
460a90540b
ARM NEON assembly parsing and encoding for VDUP(scalar).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141446 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07 23:56:00 +00:00
Andrew Trick
c570191060
LSR should only reuse phis that match its formula.
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Fixes rdar://problem/5064068
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141442 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07 23:46:21 +00:00
Eli Friedman
9eb6b4d91b
Fix APInt::operator*= so that it computes the correct result for large integers where there is unsigned overflow. Fix APFloat::toString so that it doesn't depend on the incorrect behavior in common cases (and computes the correct result in some rare cases). Fixes PR11086.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141441 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07 23:40:49 +00:00
Nick Lewycky
d2fdb4a285
Don't emit the symbol table entry for the .symtab_shndx section either.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141440 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07 23:29:53 +00:00
Nick Lewycky
4a8d43e9a7
Remove extraneous curlies. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141439 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07 23:28:32 +00:00
Jim Grosbach
21ff17ce1b
ARM prefix asmparser operand kind enums for readability.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141438 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07 23:24:09 +00:00
Bill Wendling
2acf638216
Take all of the invoke basic blocks and make the dispatch basic block their new
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successor. Remove the old landing pad from their successor list, because it's
now the successor of the dispatch block. Now that the landing pad blocks are no
longer the destination of invokes, we can mark them as normal basic blocks
instead of landing pads.
This more closely resembles what the CFG is actually doing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141436 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07 23:18:02 +00:00
Bill Wendling
fbf5f1b72b
Add a bool value to set the IsLandingPad flag to.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141435 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07 23:06:01 +00:00
Bill Wendling
f1083d4139
Take the code that was emitted for the llvm.eh.dispatch.setup intrinsic and emit
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it with the new SjLj emitter stuff. This way there's no need to emit that
kind-of-hacky intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141419 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07 22:08:37 +00:00
Bill Wendling
ce370cfd89
Thread the chain through the eh.sjlj.setjmp intrinsic, like it's documented to
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do. This will be useful later on with the new SJLJ stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141416 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07 21:25:38 +00:00
Nick Lewycky
b3429d34b6
Don't emit a shstrtabindex in the reserved range. Spotted by inspection and
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patch by Cary Coutant!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141413 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07 20:58:24 +00:00