Bill Wendling
e23e00ddea
Change names from RA to something unique to get rid of naming conflicts with
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certain linkers...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36944 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-08 19:02:46 +00:00
Evan Cheng
56184904cd
Eliminate MarkVirtRegAliveInBlock recursion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36943 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-08 19:00:00 +00:00
Evan Cheng
c2cd2b29f5
Forgot a check.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36910 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-07 21:36:06 +00:00
Evan Cheng
59d5b68dff
Enable a couple of xforms:
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- (store (bitconvert v)) -> (store v) if resultant store does not require
higher alignment
- (bitconvert (load v)) -> (load (bitconvert*)v) if resultant load does not
require higher alignment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36908 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-07 21:27:48 +00:00
Dale Johannesen
7d33b4c59b
Handle some non-exit blocks in tail merging.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36907 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-07 20:57:21 +00:00
Duncan Sands
4fee7034d5
Parameter attributes on invoke calls were being lost due to the wrong
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attribute index being used. Fix proposed by Anton Korobeynikov, who
asked me to implement and commit it for him. This is PR1398.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36906 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-07 20:49:28 +00:00
Anton Korobeynikov
b682448ebd
Detabify
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36891 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-06 20:14:21 +00:00
Nick Lewycky
ecd94c804a
Fix typo in comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36873 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-06 13:37:16 +00:00
Duncan Sands
3194f57541
Use the personality function that was registered with MMI rather than
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hardwiring in the C++ one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36789 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-05 20:27:00 +00:00
Chris Lattner
b464c44679
Propagate alignment/volatility in two places.
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Implement support for expanding a bitcast from an illegal vector type to
a legal one (e.g. 4xi32 -> 4xf32 in SSE1). This fixes PR1371 and
CodeGen/X86/2007-05-05-VecCastExpand.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36787 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-05 19:39:05 +00:00
Duncan Sands
01dfdcd84b
Spelling fix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36781 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-05 16:32:57 +00:00
Anton Korobeynikov
2a07e2f4df
Emit sections/directives in the proper order. This fixes PR1376. Also,
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some small cleanup was made.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36780 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-05 09:04:50 +00:00
Duncan Sands
3b346368de
A bitcast of a global variable may have been constant folded to a GEP -
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handle this case too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36745 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-04 17:12:26 +00:00
Evan Cheng
a7d4a04d24
Don't create indexed load / store with zero offset!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36716 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03 23:52:19 +00:00
Chris Lattner
75c7d2bd55
Allow i/s to match (gv+c). This fixes CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll
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and PR1382
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36672 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03 16:54:34 +00:00
Devang Patel
1997473cf7
Drop 'const'
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36662 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03 01:11:54 +00:00
Anton Korobeynikov
6ad8256d76
Properly set arguments bitwidth of EHSELECT node
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36654 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-02 22:15:48 +00:00
Devang Patel
3e15bf33e0
Use 'static const char' instead of 'static const int'.
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Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36652 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-02 21:39:20 +00:00
Lauro Ramos Venancio
c718288f49
Fix build error.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36648 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-02 20:37:47 +00:00
Anton Korobeynikov
79dda2b048
Fix couple of bugs connected with eh info:
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1. Correct output offsets on Linux
2. Fix "style" of personality function. It shouldn't be indirect.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36633 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 22:23:12 +00:00
Devang Patel
794fd75c67
Do not use typeinfo to identify pass in pass manager.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36632 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 21:15:47 +00:00
Evan Cheng
8e33473321
If call frame is not part of stack frame and no dynamic alloc, eliminateFrameIndex() must adjust SP offset with size of call frames.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36625 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 09:01:42 +00:00
Evan Cheng
498f55989a
Forgot about chain result; also UNDEF cannot have multiple values.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36622 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 08:53:39 +00:00
Nate Begeman
7bf1c272ab
llvm bug #1350 , parts 1, 2, and 3.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36618 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 05:57:02 +00:00
Evan Cheng
5c3885ce8e
Under normal circumstances, when a frame pointer is not required, we reserve
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argument space for call sites in the function immediately on entry to the
current function. This eliminates the need for add/sub sp brackets around call
sites. However, this is not always a good idea. If the "call frame" is large and
the target load / store instructions have small immediate field to encode sp
offset, this can cause poor codegen. In the worst case, this can make it
impossible to scavenge a register if the reserved spill slot is pushed too far
apart from sp / fp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36607 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 00:52:08 +00:00
Evan Cheng
45a7ca9b23
* Only turn a load to UNDEF if all of its outputs have no uses (indexed loads
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produce two results.)
* Do not touch volatile loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36604 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 00:38:21 +00:00
Chris Lattner
77edc4b1b0
Fix PR1228 and CodeGen/Generic/2007-04-30-LandingPadBranchFolding.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36602 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-30 23:35:00 +00:00
Chris Lattner
c11ce86943
print isLandingPad() for MBBs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36600 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-30 23:12:53 +00:00
Chris Lattner
e7cf56aeee
Continue refactoring inline asm code. If there is an earlyclobber output
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register, preallocate all input registers and the early clobbered output.
This fixes PR1357 and CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36599 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-30 21:11:17 +00:00
Evan Cheng
e47e75b461
Updates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36594 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-30 18:42:09 +00:00
Chris Lattner
bf996f1d5e
refactor GetRegistersForValue to take OpInfo as an argument instead of various
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pieces of it. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36592 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-30 17:29:31 +00:00
Chris Lattner
3ff90dc1c8
refactor some code, no functionality change
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36590 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-30 17:16:27 +00:00
Chris Lattner
1f6f4c7346
Clean up multi-line asam string printing. Instead of printing:
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# InlineAsm Start
subfc r3,r5,r4
subfze r4,r3
# InlineAsm End
print:
# InlineAsm Start
subfc r3,r5,r4
subfze r4,r3
# InlineAsm End
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36589 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-30 17:00:18 +00:00
Chris Lattner
6995cf6015
generalize aggregate handling
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36568 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-29 18:58:03 +00:00
Anton Korobeynikov
c6c98af9e5
Implement review feedback
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36564 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-29 18:02:48 +00:00
Chris Lattner
09e4b7e1b7
memory operands that have a direct operand should have their stores created
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before the copies into physregs are done. This avoids having flag operands
skip the store, causing cycles in the dag at sched time. This fixes infinite
loops on these tests:
test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll for PR1308
test/CodeGen/PowerPC/2007-01-29-lbrx-asm.ll
test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll
test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll for PR828
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36547 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-28 21:12:06 +00:00
Chris Lattner
c83994e5d4
eliminate more redundant constraint type analysis
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36546 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-28 21:03:16 +00:00
Chris Lattner
2a600be226
merge constraint type analysis stuff together.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36545 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-28 21:01:43 +00:00
Chris Lattner
0c58340aea
Significant refactoring of the inline asm stuff, to support future changes.
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No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36544 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-28 20:49:53 +00:00
Anton Korobeynikov
a80e1181b7
Implement review feedback. Aliasees can be either GlobalValue's or
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bitcasts of them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36537 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-28 13:45:00 +00:00
Chris Lattner
44b2c5098f
memory inputs to an inline asm are required to have an address available.
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If the operand is not already an indirect operand, spill it to a constant
pool entry or a stack slot.
This fixes PR1356 and CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36536 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-28 06:42:38 +00:00
Chris Lattner
f2f3cd5129
Fix CodeGen/Generic/2007-04-27-LargeMemObject.ll and
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CodeGen/Generic/2007-04-27-InlineAsm-X-Dest.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36534 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-28 06:08:13 +00:00
Chris Lattner
b017318122
Fix this to match change to InlineAsm class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36524 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-28 04:05:59 +00:00
Chris Lattner
eb7f34f2cb
Fix incorrect legalization of EHSELECTOR. This fixes
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CodeGen/Generic/2007-04-14-EHSelectorCrash.ll and PR1326
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36510 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 17:12:52 +00:00
Evan Cheng
4c6cfad85e
Expand UINT_TO_FP in turns of SINT_TO_FP when UINTTOFP_* libcalls are not available.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36501 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 07:33:31 +00:00
Chris Lattner
99f9a77c49
improve EH global handling, patch by Duncan Sands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36499 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 01:20:11 +00:00
Chris Lattner
64c0f84c72
enable Anton's shift/and switch lowering stuff! It now passes ppc bootstrap
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successfully! woohoo...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36496 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-26 21:09:43 +00:00
Anton Korobeynikov
ab8fd40403
Fixx off-by-one bug, which prevents llvm-gcc bootstrap on ppc32
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36490 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-26 20:44:04 +00:00
Dan Gohman
edc1d15984
Fix a typo in a comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36485 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-26 19:40:56 +00:00
Evan Cheng
faa510726f
Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36483 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-26 19:00:32 +00:00
Evan Cheng
8e29b2192b
Minor bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36473 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-26 08:24:22 +00:00
Evan Cheng
05350288a6
Be careful when to add implicit kill / dead operands. Don't add them during / post reg-allocation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36458 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-26 01:40:09 +00:00
Evan Cheng
6c087e5585
Match MachineFunction::UsedPhysRegs changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36452 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 22:13:27 +00:00
Evan Cheng
505e5510a2
Change UsedPhysRegs from array bool to BitVector to save some space. Setting / getting its states now go through MachineFunction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36451 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 22:10:09 +00:00
Evan Cheng
ade31f9f07
Clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36449 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 21:34:08 +00:00
Evan Cheng
e96f50142e
Data structure change to improve compile time (especially in debug mode).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36447 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 19:34:00 +00:00
Evan Cheng
c1a3520580
This was lefted out. Fixed sumarray-dbl.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36445 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 18:33:21 +00:00
Anton Korobeynikov
8b0a8c84da
Implement aliases. This fixes PR1017 and it's dependent bugs. CFE part
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will follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36435 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 14:27:10 +00:00
Evan Cheng
24a3cc4c83
Fix for PR1306.
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- A register def / use now implicitly affects sub-register liveness but does
not affect liveness information of super-registers.
- Def of a larger register (if followed by a use later) is treated as
read/mod/write of a smaller register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36434 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 07:30:23 +00:00
Evan Cheng
92efbfcd2d
Clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36431 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 07:18:20 +00:00
Chris Lattner
ea84c5ee95
support for >4G stack frames
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36425 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 04:30:24 +00:00
Chris Lattner
a401b1e1c5
support > 4G stack objects
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36422 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 04:20:54 +00:00
Chris Lattner
6266c18ea1
allow support for 64-bit stack objects
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36420 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 04:08:28 +00:00
Chris Lattner
964dd86054
Be more careful about folding op(x, undef) when we have vector operands.
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This fixes CodeGen/X86/2007-04-24-VectorCrash.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36413 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 00:00:45 +00:00
Bill Wendling
95b3955034
Assertion when using a 1-element vector for an add operation. Get the
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real vector type in this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36402 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-24 21:13:23 +00:00
Scott Michel
f147a8d56e
Use '-1U' where '-1UL' is obvious overkill, eliminating gcc warnings about
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tests always being true in the process.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36387 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-24 01:24:20 +00:00
Dale Johannesen
00d56b96e5
modify per review commentary
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36383 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-23 23:33:31 +00:00
Dale Johannesen
19f5469be4
make EmitAlignment work the way Chris says it should
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36368 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-23 19:58:54 +00:00
Christopher Lamb
95c218a83e
PR400 phase 2. Propagate attributed load/store information through DAGs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36356 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-22 23:15:30 +00:00
Lauro Ramos Venancio
2c5c111b6c
X86 TLS: Implement review feedback.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36318 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-21 20:56:26 +00:00
Reid Spencer
c67bdc288a
Revert Christopher Lamb's load/store alignment changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36309 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-21 18:36:27 +00:00
Christopher Lamb
2330e4d4c4
add support for alignment attributes on load/store instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36301 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-21 08:16:25 +00:00
Lauro Ramos Venancio
0d3b67809c
Allow the lowering of ISD::GLOBAL_OFFSET_TABLE.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36290 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-20 23:02:39 +00:00
Lauro Ramos Venancio
b3a0417cad
Implement "general dynamic", "initial exec" and "local exec" TLS models for
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X86 32 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36283 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-20 21:38:10 +00:00
Evan Cheng
f44c72817e
VarInfo::UsedBlocks is no longer used. Remove.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36250 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-18 05:04:38 +00:00
Chris Lattner
61a4c072b9
allow SRL to simplify its operands, as it doesn't demand all bits as input.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36245 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-18 03:06:49 +00:00
Chris Lattner
ec06e9a670
When replacing a node in SimplifyDemandedBits, if the old node used any
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single-use nodes, they will be dead soon. Make sure to remove them before
processing other nodes. This implements CodeGen/X86/shl_elim.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36244 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-18 03:05:22 +00:00
Chris Lattner
0a16a1f738
fix a pasto
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36242 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-18 03:01:40 +00:00
Evan Cheng
faf05bbaea
Don't populate TryAgainList when coalescing only physical registers with virtual registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36240 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-18 02:30:19 +00:00
Evan Cheng
3fefc182a0
Increment use count of new virtuals created during PHI elimination.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36233 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-18 00:36:11 +00:00
Chris Lattner
8c7d2d56bf
Fix a bug in my previous patch, grabbing the shift amount width from the
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wrong operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36223 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 22:53:02 +00:00
Chris Lattner
895c4ab564
Fold (x << c1)>> c2 into a single shift if the bits shifted out aren't used.
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This compiles:
int baz(long long a) { return (short)(((int)(a >>24)) >> 9); }
into:
_baz:
srwi r2, r3, 1
extsh r3, r2
blr
on PPC, instead of:
_baz:
slwi r2, r3, 8
srwi r2, r2, 9
extsh r3, r2
blr
GCC produces:
_baz:
srwi r10,r4,24
insrwi r10,r3,24,0
srawi r9,r3,24
srawi r3,r10,9
extsh r3,r3
blr
This implements CodeGen/PowerPC/shl_elim.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36221 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 21:14:16 +00:00
Evan Cheng
20b0abc24f
Copy coalescing change to prevent a physical register from being pin to a
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long live interval that has low usage density.
1. Change order of coalescing to join physical registers with virtual
registers first before virtual register intervals become too long.
2. Check size and usage density to determine if it's worthwhile to join.
3. If joining is aborted, assign virtual register live interval allocation
preference field to the physical register.
4. Register allocator should try to allocate to the preferred register
first (if available) to create identify moves that can be eliminated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36218 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 20:32:26 +00:00
Evan Cheng
e52eef8e9a
Add a register allocation preference field; add a method to compute size of a live interval.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36216 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 20:25:11 +00:00
Evan Cheng
38b7ca6651
Keep track of number of uses within the function per virtual register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36214 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 20:22:11 +00:00
Chris Lattner
95a5e0507e
SIGN_EXTEND_INREG does not demand its top bits. Give SimplifyDemandedBits
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a chance to hack on it. This compiles:
int baz(long long a) { return (short)(((int)(a >>24)) >> 9); }
into:
_baz:
slwi r2, r3, 8
srwi r2, r2, 9
extsh r3, r2
blr
instead of:
_baz:
srwi r2, r4, 24
rlwimi r2, r3, 8, 0, 23
srwi r2, r2, 9
extsh r3, r2
blr
This implements CodeGen/PowerPC/sign_ext_inreg1.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36212 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 19:03:21 +00:00
Reid Spencer
9a9203b894
Fix problems in the PartSet lowering having to do with incorrect bit width.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36180 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-16 22:21:14 +00:00
Anton Korobeynikov
bed2946a96
Removed tabs everywhere except autogenerated & external files. Add make
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target for tabs checking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36146 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-16 18:10:23 +00:00
Chris Lattner
1c35968d4d
disable switch lowering using shift/and. It still breaks ppc bootstrap for
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some reason. :( Will investigate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36011 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 19:39:41 +00:00
Anton Korobeynikov
e01017bba4
Fix PR1325: Case range optimization was performed in the case it
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shouldn't. Also fix some "latent" bug on 64-bit platforms
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35990 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 13:25:55 +00:00
Chris Lattner
3ff981749b
disable shift/and lowering to work around PR1325 for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35985 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 02:26:56 +00:00
Anton Korobeynikov
8085bcfdca
Fix PR1323 : we haven't updated phi nodes in good manner :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35963 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-13 06:53:51 +00:00
Reid Spencer
df41353497
Make sure intrinsics that are lowered to functions make the function weak
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linkage so we only end up with one of them in a program. These are, after
all overloaded and templatish in nature.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35956 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 21:53:38 +00:00
Reid Spencer
eeedcb6905
Fix bugs in generated code for part_select and part_set so that llc doesn't
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barf when CBE is run with a program that contains these intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35946 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 13:30:14 +00:00
Reid Spencer
37958093c6
Fix a bug in PartSet. The replacement value needs to be zext or trunc to
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the size of the value, not just zext. Also, give better names to two BBs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35945 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 12:46:33 +00:00
Chris Lattner
3a508c94a6
the result of an inline asm copy can be an arbitrary VT that the register
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class supports. In the case of vectors, this means we often get the wrong
type (e.g. we get v4f32 instead of v8i16). Make sure to convert the vector
result to the right type. This fixes CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35944 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 06:00:20 +00:00
Chris Lattner
4829b1c6ab
fold noop vbitconvert instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35943 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 05:58:43 +00:00
Chris Lattner
c2941779c3
Fix weirdness handling single element vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35941 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 04:44:28 +00:00
Reid Spencer
f75b874957
For PR1284:
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Implement the "part_set" intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35938 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 02:48:46 +00:00
Chris Lattner
c24bbaddf8
fix an infinite loop compiling ldecod, notice by JeffC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35910 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-11 16:51:53 +00:00