Commit Graph

112847 Commits

Author SHA1 Message Date
Bill Schmidt
b32d6f455f Further revise too-restrictive test CodeGen/PowerPC/tls-pic.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227980 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 16:33:55 +00:00
Bill Schmidt
f336df5f3f Further revise too-restrictive test CodeGen/PowerPC/tls-pic.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227978 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 16:29:52 +00:00
Bill Schmidt
5114e12df0 Revise too-restrictive test CodeGen/PowerPC/tls-pic.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227977 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 16:24:05 +00:00
Bill Schmidt
1123a81009 [PowerPC] Yet another approach to __tls_get_addr
This patch is a third attempt to properly handle the local-dynamic and
global-dynamic TLS models.

In my original implementation, calls to __tls_get_addr were hidden
from view until the asm-printer phase, at which point the underlying
branch-and-link instruction was created with proper relocations.  This
mostly worked well, but I used some repellent techniques to ensure
that the TLS_GET_ADDR nodes at the SD and MI levels correctly received
input from GPR3 and produced output into GPR3.  This proved to work
badly in the presence of multiple TLS variable accesses, with the
copies to and from GPR3 being scheduled incorrectly and generally
creating havoc.

In r221703, I addressed that problem by representing the calls to
__tls_get_addr as true calls during instruction lowering.  This had
the advantage of removing all of the bad hacks and relying on the
existing call machinery to properly glue the copies in place. It
looked like this was going to be the right way to go.

However, as a side effect of the recent discovery of problems with
linker optimizations for TLS, we discovered cases of suboptimal code
generation with this strategy.  The problem comes when tls_get_addr is
called for the same address, and there is a resulting CSE
opportunity.  It turns out that in such cases MachineCSE will common
the addis/addi instructions that set up the input value to
tls_get_addr, but will not common the calls themselves.  MachineCSE
does not have any machinery to common idempotent calls.  This is
perfectly sensible, since presumably this would be done at the IR
level, and introducing calls in the back end isn't commonplace.  In
any case, we end up with two calls to __tls_get_addr when one would
suffice, and that isn't good.

I presumed that the original design would have allowed commoning of
the machine-specific nodes that hid the __tls_get_addr calls, so as
suggested by Ulrich Weigand, I went back to that design and cleaned it
up so that the copies were properly held together by glue
nodes.  However, it turned out that this didn't work either...the
presence of copies to physical registers kept the machine-specific
nodes from being commoned also.

All of which leads to the design presented here.  This is a return to
the original design, except that no attempt is made to introduce
copies to and from GPR3 during instruction lowering.  Virtual registers
are used until prior to register allocation.  At that point, a special
pass is run that identifies the machine-specific nodes that hide the
tls_get_addr calls and introduces the copies to and from GPR3 around
them.  The register allocator then coalesces these copies away.  With
this design, MachineCSE succeeds in commoning tls_get_addr calls where
possible, and we get nice optimal code generation (better than GCC at
the moment, which does not common these calls).

One additional problem must be dealt with:  After introducing the
mentions of the physical register GPR3, the aggressive anti-dependence
breaker sees opportunities to improve scheduling by selecting a
different register instead.  Flags must be used on the instruction
descriptions to tell the anti-dependence breaker to keep its hands in
its pockets.

One thing missing from the original design was recording a definition
of the link register on the GET_TLS_ADDR nodes.  Doing this was found
to be insufficient to force a stack frame to be created, which led to
looping behavior because two different LR values were stored at the
same address.  This appears to have been an oversight in
PPCFrameLowering::determineFrameLayout(), which is repaired here.

Because MustSaveLR() returns true for calls to builtin_return_address,
this changed the expected behavior of
test/CodeGen/PowerPC/retaddr2.ll, which now stacks a frame but
formerly did not.  I've fixed the test case to reflect this.

There are existing TLS tests to catch regressions; the checks in
test/CodeGen/PowerPC/tls-store2.ll proved to be too restrictive in the
face of instruction scheduling with these changes, so I fixed that
up.

I've added a new test case based on the PrettyStackTrace module that
demonstrated the original problem. This checks that we get correct
code generation and that CSE of the calls to __get_tls_addr has taken
place.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227976 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 16:16:01 +00:00
Sanjay Patel
ec60318bf5 Improve test to actually check for a folded load.
This test was checking for lack of a "movaps" (an aligned load)
rather than a "movups" (an unaligned load). It also included
a store which complicated the checking.

Add specific CPU runs to prevent subtarget feature flag overrides
from inhibiting this optimization.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227972 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 15:37:18 +00:00
Bruno Cardoso Lopes
7df357f552 [X86][MMX] Improve transfer from mmx to i32
Improve EXTRACT_VECTOR_ELT DAG combine to catch conversion patterns
between x86mmx and i32 with more layers of indirection.

Before:
  movq2dq %mm0, %xmm0
  movd %xmm0, %eax
After:
  movd %mm0, %eax

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227969 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 14:46:49 +00:00
Renato Golin
ba4bdb4b1b Adding AArch64 support to ASan instrumentation
For the time being, it is still hardcoded to support only the 39 VA bits
variant, I plan to work on supporting 42 and 48 VA bits variants, but I
don't have access to such hardware at the moment.

Patch by Chrystophe Lyon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227965 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 11:20:45 +00:00
Craig Topper
97494e9718 [X86] Make fxsave64/fxrstor64/xsave64/xsrstor64/xsaveopt64 parseable in AT&T syntax. Also make them the default output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227963 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 11:03:57 +00:00
Craig Topper
c7f2036c2b [X86] Add Requires[In64BitMode] around MOVSX64rr32/MOVSX64rm32. This makes it more strictly mutexed with the ARPL instruction 32-bit mode. Helps with some disassembler changes I'm experimenting with. Should be NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227962 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 11:03:43 +00:00
Eric Christopher
b3f0a42d00 Only access TLOF via the TargetMachine, not TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227949 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 07:22:52 +00:00
Eric Christopher
482e090944 Define a runOnMachineFunction for the Hexagon AsmPrinter and
use it to initialize the subtarget.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227948 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 06:40:22 +00:00
Eric Christopher
4b4315d6f4 Migrate away from using a Subtarget except for the one place we want
to use it. Use the triple to determine OS format bits at the module
level.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227947 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 06:40:19 +00:00
Lang Hames
d54450ef63 [PBQP Regalloc] Pre-spill vregs that have no legal physregs.
The PBQP::RegAlloc::MatrixMetadata class assumes that matrices have at least two
rows/columns (for the spill option plus at least one physreg). This patch
ensures that that invariant is met by pre-spilling vregs that have no physreg
options so that no node (and no corresponding edges) need be added to the PBQP
graph.

This fixes a bug in an out-of-tree target that was identified by Jonas Paulsson.
Thanks for tracking this down Jonas!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227942 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 06:14:06 +00:00
NAKAMURA Takumi
56756c43cd Resurrect initializers for NumLoads and NumStores in LoopVectorizationLegality to suppress undefined behavior.
FIXME: Shall they be managed in LAA?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227940 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 03:55:06 +00:00
Andrew Kaylor
4c76da87e2 Really, really, really don't build llvm-pdbdump on MSVC < 2013.
There was a typo in the last attempt.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227937 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 03:08:25 +00:00
Rafael Espindola
52288fa1e6 Propagate a better error message to the C api.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227934 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 01:53:03 +00:00
Rafael Espindola
d0d95dbf3c Use a non-fatal diag handler in the C API. FIxes PR22368.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227903 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 00:49:57 +00:00
Justin Bogner
68697579bf InstrProf: Simplify RawCoverageMappingReader's API slightly
This is still kind of a weird API, but dropping the (partial) update
of the passed in CoverageMappingRecord makes it a little easier to
understand and use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227900 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 00:20:11 +00:00
Justin Bogner
11f57c9068 InstrProf: Simplify some logic by using ArrayRef::slice (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227898 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-03 00:00:00 +00:00
Alex Rosenberg
cba5c599e8 Revert part of r227437 as it was unnecessary. Thanks to echristo for
pointing this out.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227897 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 23:58:54 +00:00
Eric Christopher
82181dfe51 Migrate to using the subtarget on the machine function and update
all uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227891 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 23:03:45 +00:00
Eric Christopher
439705d6be Use the function template getSubtarget off of the machine function,
and use it in all locations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227890 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 23:03:43 +00:00
Eric Christopher
40445ad91f Use the cached subtarget on the MachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227885 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 22:40:56 +00:00
Eric Christopher
c0663bab1a Remove dead header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227884 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 22:40:54 +00:00
Eric Christopher
dd0c5bb156 Remove dead code in the HexagonMCInst classes. This also fixes
a layering violation in the port and removes calls to getSubtargetImpl.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227883 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 22:40:53 +00:00
Eric Christopher
5b75139406 80-col fixup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227882 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 22:40:51 +00:00
Justin Bogner
0481d781da InstrProf: Remove an unused header (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227881 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 22:38:39 +00:00
Eric Christopher
dd27f99713 Remove dead code in the HexagonMCInst classes. This also fixes
a layering violation in the port and removes calls to getSubtargetImpl.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227880 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 22:28:48 +00:00
Eric Christopher
caf706bf9a 80-col fixup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227879 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 22:28:46 +00:00
Eric Christopher
07980e9ade Remove unused class variables and update all callers/uses from
the HexagonSplitTFRCondSet pass. Use the subtarget off the machine
function at the same time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227878 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 22:28:44 +00:00
Eric Christopher
7ee5bc454a Migrate the HexagonSplitConst32AndConst64 pass from TargetMachine
based getSubtarget to the one cached on the MachineFunction.
Remove unused class variables and update all callers/uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227874 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 22:11:43 +00:00
Eric Christopher
30803daf51 Remove #if'd code and update comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227873 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 22:11:42 +00:00
Eric Christopher
b1427d95e2 Move HexagonMachineScheduler to use the subtarget off of the
MachineFunction and update all uses accordingly including
VLIWResourceModel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227872 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 22:11:40 +00:00
Eric Christopher
848278638c Cache and use the subtarget that owns the target lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227871 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 22:11:36 +00:00
Bruno Cardoso Lopes
d821e0a5cc [X86][MMX] Add tests for MMX extract element
LLVM ToT produces poor MMX code compared to 3.5. However, part of the previous
functionality can be achieved by using -x86-experimental-vector-widening-legalization.
Add tests to be sure we don't regress again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227869 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 22:00:48 +00:00
Bruno Cardoso Lopes
12c944ba10 [X86][MMX] Cleanup shuffle, bitcast and insert element tests
- Merge MMX arg passing test files
- Merge MMX bitcast, insert elt and shuffle tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227867 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 21:56:11 +00:00
Alexei Starovoitov
8ea8f377aa bpf: Use the getSubtarget call off of the MachineFunction rather than the TargetMachine
Summary:
Hi Eric,

this patch cleans up the layering violation that you're fixing across backends.
Anything else I need to fix on bpf backend side?

Thanks

Reviewers: echristo

Reviewed By: echristo

Differential Revision: http://reviews.llvm.org/D7355

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227865 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 21:24:27 +00:00
Jingyue Wu
62d535ff3c Resurrect the assertion removed by r227717
Summary: MSVC can compile "LoopID->getOperand(0) == LoopID" when LoopID is MDNode*.

Test Plan: no regression

Reviewers: mkuper

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D7327

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227853 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 20:41:11 +00:00
Duncan P. N. Exon Smith
48da191fb3 Fix the -Werror build, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227849 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 20:20:56 +00:00
Duncan P. N. Exon Smith
2a11d59014 IR: Allow GenericDebugNode construction from MDString
Allow `GenericDebugNode` construction directly from `MDString`, rather
than requiring `StringRef`s.  I've refactored the `StringRef`
constructors to use these.  There's no real functionality change here,
except for exposing the lower-level API.

The purpose of this is to simplify construction of string operands when
reading bitcode.  It's unnecessarily indirect to parse an `MDString` ID,
lookup the `MDString` in the bitcode reader list, get the `StringRef`
out of that, and then have `GenericDebugNode::getImpl()` use
`MDString::get()` to acquire the original `MDString`.  Instead, this
allows the bitcode reader to directly pass in the `MDString`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227848 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 20:01:03 +00:00
Duncan P. N. Exon Smith
21b88f5f90 IR: Extract DEFINE_MDNODE_GET(), NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227847 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 19:55:21 +00:00
Duncan P. N. Exon Smith
265dc3e4c9 IR: Separate helpers for string operands, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227846 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 19:54:05 +00:00
Lang Hames
41367e252a [Orc] Make OrcMCJITReplacement::addObject calls transfer buffer ownership to the
ObjectLinkingLayer.

There are a two of overloads for addObject, one of which transfers ownership of
the underlying buffer to OrcMCJITReplacement. This commit makes the ownership
transfering version pass ownership down to the ObjectLinkingLayer in order to
prevent the issue described in r227778.

I think this commit will fix the sanitizer bot failures that necessitated the
removal of the load-object-a.ll regression test in r227785, so I'm reinstating
that test.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227845 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 19:51:18 +00:00
Rafael Espindola
d273a682a2 Move simple case earlier and use a continue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227841 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 19:22:51 +00:00
Eric Christopher
c3bbdbba2d Migrate HexagonISelDAGToDAG to setting a subtarget pointer during
runOnMachineFunction. Update all uses of the Subtarget accordingly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227840 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 19:22:03 +00:00
Eric Christopher
7529bb6088 Use the getSubtarget call off of the MachineFunction rather than
the TargetMachine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227839 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 19:22:01 +00:00
Eric Christopher
7698c02bab Remove unused class variables and update calls to get the subtarget
off of the machine function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227837 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 19:05:28 +00:00
Eric Christopher
e4100fc79e Sink queries into asserts since the variable is unused otherwise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227836 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 18:58:24 +00:00
Duncan P. N. Exon Smith
ca8d3bf8af IR: Split out DebugInfoMetadata.h, NFC
Move debug-info-centred `Metadata` subclasses into their own
header/source file.  A couple of private template functions are needed
from both `Metadata.cpp` and `DebugInfoMetadata.cpp`, so I've moved them
to `lib/IR/MetadataImpl.h`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227835 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 18:53:21 +00:00
Eric Christopher
4502a3c3d2 Update CMake build for removed files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227834 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 18:52:49 +00:00