Commit Graph

8635 Commits

Author SHA1 Message Date
Andrew Trick
8adae96fd9 Evict local live ranges if they can be reassigned.
The previous change to local live range allocation also suppressed
eviction of local ranges. In rare cases, this could result in more
expensive register choices. This commit actually revives a feature
that I added long ago: check if live ranges can be reassigned before
eviction. But now it only happens in rare cases of evicting a local
live range because another local live range wants a cheaper register.

The benefit is improved code size for some benchmarks on x86 and armv7.

I measured no significant compile time increase and performance
changes are noise.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187140 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 18:35:19 +00:00
Andrew Trick
6ea2b9608a Allocate local registers in order for optimal coloring.
Also avoid locals evicting locals just because they want a cheaper register.

Problem: MI Sched knows exactly how many registers we have and assumes
they can be colored. In cases where we have large blocks, usually from
unrolled loops, greedy coloring fails. This is a source of
"regressions" from the MI Scheduler on x86. I noticed this issue on
x86 where we have long chains of two-address defs in the same live
range. It's easy to see this in matrix multiplication benchmarks like
IRSmk and even the unit test misched-matmul.ll.

A fundamental difference between the LLVM register allocator and
conventional graph coloring is that in our model a live range can't
discover its neighbors, it can only verify its neighbors. That's why
we initially went for greedy coloring and added eviction to deal with
the hard cases. However, for singly defined and two-address live
ranges, we can optimally color without visiting neighbors simply by
processing the live ranges in instruction order.

Other beneficial side effects:

It is much easier to understand and debug regalloc for large blocks
when the live ranges are allocated in order. Yes, global allocation is
still very confusing, but it's nice to be able to comprehend what
happened locally.

Heuristics could be added to bias register assignment based on
instruction locality (think late register pairing, banks...).

Intuituvely this will make some test cases that are on the threshold
of register pressure more stable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187139 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 18:35:14 +00:00
Rafael Espindola
f204228b78 Current batch of -disable-debug-info-verifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187130 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 17:16:05 +00:00
Tim Northover
c34cb8a0f2 AArch64: add llc-based tests for previous commit.
Better to have tests run even on non-AArch64 platforms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187128 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 16:23:55 +00:00
Richard Sandiford
ea14085be5 [SystemZ] Rework compare and branch support
Before the patch we took advantage of the fact that the compare and
branch are glued together in the selection DAG and fused them together
(where possible) while emitting them.  This seemed to work well in practice.
However, fusing the compare so early makes it harder to remove redundant
compares in cases where CC already has a suitable value.  This patch
therefore uses the peephole analyzeCompare/optimizeCompareInstr pair of
functions instead.

No behavioral change intended, but it paves the way for a later patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187116 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 09:34:38 +00:00
Richard Sandiford
bf99364f81 [SystemZ] Add LOCR and LOCGR
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187113 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 09:11:15 +00:00
Richard Sandiford
cf20e45cc4 [SystemZ] Add LOC and LOCG
As with the stores, these instructions can trap when the condition is false,
so they are only used for things like (cond ? x : *ptr).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187112 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 09:04:52 +00:00
Richard Sandiford
b284e1bf08 [SystemZ] Add STOC and STOCG
These instructions are allowed to trap even if the condition is false,
so for now they are only used for "*ptr = (cond ? x : *ptr)"-style
constructs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187111 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 08:57:02 +00:00
Manman Ren
27ce44d3b4 Debug Info: improve the verifier to check field types.
Make sure the context and type fields are MDNodes. We will generate
verification errors if those fields are non-empty strings.
Fix testing cases to make them pass the verifier.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187106 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 06:43:01 +00:00
Bill Wendling
f245ae5a4a Replace the "NoFramePointerElimNonLeaf" target option with a function attribute.
There's no need to specify a flag to omit frame pointer elimination on non-leaf
nodes...(Honestly, I can't parse that option out.) Use the function attribute
stuff instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187093 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 00:34:29 +00:00
Manman Ren
a280a839f5 Update testing cases to pass debug info verifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187083 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-24 22:23:00 +00:00
Quentin Colombet
e644b7743b Fix a bug in IfConverter with nested predicates.
Prior to this patch, IfConverter may widen the cases where a sequence of
instructions were executed because of the way it uses nested predicates. This
result in incorrect execution.

For instance, Let A be a basic block that flows conditionally into B and B be a
predicated block.
B can be predicated with A.BrToBPredicate into A iff B.Predicate is less
"permissive" than A.BrToBPredicate, i.e., iff A.BrToBPredicate subsumes
B.Predicate.

The IfConverter was checking the opposite: B.Predicate subsumes
A.BrToBPredicate.

<rdar://problem/14379453>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187071 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-24 20:20:37 +00:00
Manman Ren
504a7fb8f9 Debug Info: improve the Finder.
Improve the Finder to handle context of a DIVariable used by DbgValueInst.
Fix testing cases to make them pass the verifier.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187052 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-24 17:10:09 +00:00
Manman Ren
3a0a4d0c5c Update testing cases to pass debug info verifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187049 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-24 15:55:41 +00:00
Manman Ren
3894b57228 Update testing cases to make them pass debug info verification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187016 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-24 01:26:37 +00:00
Tom Stellard
1f67c63cb2 DAGCombiner: Pass the correct type to TargetLowering::isF(Abs|Neg)Free
This commit also implements these functions for R600 and removes a test
case that was relying on the buggy behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187007 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-23 23:55:03 +00:00
Tom Stellard
8ea83d4999 R600: Treat CONSTANT_ADDRESS loads like GLOBAL_ADDRESS loads when necessary
These are really the same address space in hardware.  The only
difference is that CONSTANT_ADDRESS uses a special cache for faster
access.  When we are unable to use the constant kcache for some reason
(e.g. smaller types or lack of indirect addressing) then the instruction
selector must use GLOBAL_ADDRESS loads instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187006 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-23 23:54:56 +00:00
Manman Ren
7894ffd006 Debug Info: improve the Finder.
Improve the Finder to handle context of a DIVariable.
If Scope is a DICompileUnit, add it to the list of CUs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187003 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-23 23:10:00 +00:00
Quentin Colombet
17f99a991f [ARM][ISel] Improve the lowering of vector loads.
When vectors are built from a single value, the ARM lowering issues a
scalar_to_vector node.
This node is then always morphed into a move from the general purpose unit to
the vector unit.
When the value comes from a load, this can be simplified into a vector load to
the right lane.

This patch changes the lowering of insert_vector_elt to expose a vector
friendly pattern in this situation.

This is a step toward fixing <rdar://problem/14170854>.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186999 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-23 22:34:47 +00:00
Tom Stellard
10205d5a73 R600: Add support for 24-bit MAD instructions
Reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186923 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-23 01:48:49 +00:00
Tom Stellard
3f5d63b956 R600: Add support for 24-bit MUL instructions
Reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186922 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-23 01:48:42 +00:00
Tom Stellard
eb643b9b37 R600: Improve support for < 32-bit loads
Reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186921 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-23 01:48:35 +00:00
Tom Stellard
58d3335cb9 R600: Move CONST_ADDRESS folding into AMDGPUDAGToDAGISel::Select()
This increases the number of opportunites we have for folding.  With the
previous implementation we were unable to fold into any instructions
other than the first when multiple instructions were selected from a
single SDNode.

Reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186919 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-23 01:48:24 +00:00
Tom Stellard
a7eea0568c R600: Use KCache for kernel arguments
Reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186918 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-23 01:48:18 +00:00
Tom Stellard
f502c292f6 R600: Use the same compute kernel calling convention for all GPUs
A side-effect of this is that now the compiler expects kernel arguments
to be 4-byte aligned.

Reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186916 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-23 01:48:05 +00:00
Tom Stellard
5864284d71 R600: Use correct LoadExtType when lowering kernel arguments
Reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186915 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-23 01:47:58 +00:00
Tom Stellard
2bb20fd2bf R600: Clean up extended load patterns
Reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186914 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-23 01:47:52 +00:00
Tom Stellard
d7a472c9c6 R600: Expand vector FNEG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186913 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-23 01:47:46 +00:00
Manman Ren
0e29eeec27 Debug Info Finder: use processDeclare and processValue to list debug info
MDNodes used by DbgDeclareInst and DbgValueInst.

Another 16 testing cases failed and they are disabled with
-disable-debug-info-verifier.
A total of 34 cases are disabled with -disable-debug-info-verifier and will be
corrected.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186902 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-23 00:22:51 +00:00
Mihai Popa
0226538292 This adds range checking for "ldr Rn, [pc, #imm]" Thumb
instructions. With this patch:

1. ldr.n is recognized as mnemonic for the short encoding
2. ldr.w is recognized as menmonic for the long encoding
3. ldr will map to either short or long encodings depending on the size of the offset

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186831 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-22 15:49:36 +00:00
Justin Holewinski
3a8ee4ffd7 [NVPTX] Use approximate FP ops when unsafe-fp-math is used, and append
.ftz to instructions if the nvptx-f32ftz attribute is set to "true"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186820 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-22 12:18:04 +00:00
Lang Hames
7b61a70193 Refactor AnalyzeBranch on ARM. The previous version did not always analyze
indirect branches correctly. Under some circumstances, this led to the deletion
of basic blocks that were the destination of indirect branches. In that case it
left indirect branches to nowhere in the code.

This patch replaces, and is more general than either of the previous fixes for
indirect-branch-analysis issues, r181161 and r186461.

For other branches (not indirect) this refactor should have *almost* identical
behavior to the previous version. There are some corner cases where this
refactor is able to analyze blocks that the previous version could not (e.g.
this necessitated the update to thumb2-ifcvt2.ll). 

<rdar://problem/14464830>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186735 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-19 23:52:47 +00:00
Vincent Lejeune
272458bd06 R600: Don't emit empty then clause and use alu_pop_after
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186725 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-19 21:45:15 +00:00
Rafael Espindola
7096831971 s/compiler_used/compiler.used/.
We were incorrectly using compiler_used instead of compiler.used. Unfortunately
the passes using the broken name had tests also using the broken name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186705 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-19 18:44:51 +00:00
Richard Sandiford
6dae7ae765 [SystemZ] Add tests for ALHSIK and ALGHSIK
The insn definitions themselves crept into r186689, sorry.
This should be the last of the distinct-ops instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186690 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-19 16:44:32 +00:00
Richard Sandiford
c7c7e1502a [SystemZ] Add ALRK, AGLRK, SLRK and SGLRK
Follows the same lines as r186686, but much more limited, since we only
use ADD LOGICAL for multi-i64 additions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186689 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-19 16:37:00 +00:00
Richard Sandiford
70d3e71f2e [SystemZ] Add AHIK and AGHIK
I did these as a separate patch because it uses a slightly different
form of RIE layout.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186687 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-19 16:32:12 +00:00
Richard Sandiford
dc05e0bff6 [SystemZ] Add ARK, AGRK, SRK and SGRK
The testsuite changes follow the same lines as for r186683.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186686 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-19 16:26:39 +00:00
Richard Sandiford
52b2774577 [SystemZ] Add NGRK, OGRK and XGRK
Like r186683, but for 64 bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186685 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-19 16:24:22 +00:00
Richard Sandiford
db92fb0716 [SystemZ] Add NRK, ORK and XRK
The atomic tests assume the two-operand forms, so I've restricted them to z10.

Running and-01.ll, or-01.ll and xor-01.ll for z196 as well as z10 shows why
using convertToThreeAddress() is better than exposing the three-operand forms
first and then converting back to two operands where possible (which is what
I'd originally tried).  Using the three-operand form first stops us from
taking advantage of NG, OG and XG for spills.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186683 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-19 16:21:55 +00:00
Richard Sandiford
93c2125c39 [SystemZ] Use SLLK, SRLK and SRAK for codegen
This patch uses the instructions added in r186680 for codegen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186681 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-19 16:12:08 +00:00
Manman Ren
98cd02622d Try to appease the bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186653 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-19 04:56:51 +00:00
Andrew Trick
8594c2377d MI Sched: test case fix for previous checkin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186635 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-19 00:31:31 +00:00
Manman Ren
cd26257c85 Debug Info: enable verifying by default and disable testing cases that fail.
1> Use DebugInfoFinder to find debug info MDNodes.
2> Add disable-debug-info-verifier to disable verifying debug info.
3> Disable verifying for testing cases that fail (will update the testing cases
   later on).
4> MDNodes generated by clang can have empty filename for TAG_inheritance and
   TAG_friend, so DIType::Verify is modified accordingly.

Note that DebugInfoFinder does not list all debug info MDNode.
For example, clang can generate:
metadata !{i32 786468}, which will fail to verify.
This MDNode is used by debug info but not included in DebugInfoFinder.
This MDNode is generated as a temporary node in DIBuilder::createFunction
  Value *TElts[] = { GetTagConstant(VMContext, DW_TAG_base_type) };
  MDNode::getTemporary(VMContext, TElts)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186634 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-19 00:31:03 +00:00
Stephen Lin
cf2ab764db Update to more CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change.
All changes were made by the following bash script:

  find test/CodeGen -name "*.ll" | \
  while read NAME; do
    echo "$NAME"
    grep -q "^; *RUN: *llc.*debug" $NAME && continue
    grep -q "^; *RUN:.*llvm-objdump" $NAME && continue
    grep -q "^; *RUN: *opt.*" $NAME && continue
    TEMP=`mktemp -t temp`
    cp $NAME $TEMP
    sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
    while read FUNC; do
      sed -i '' "s/;\([A-Za-z0-9_-]*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC[:]* *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP
    done
    sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP
    sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP
    sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP
    sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP
    mv $TEMP $NAME
  done

This script catches a superset of the cases caught by the script associated with commit r186280. It initially found some false positives due to unusual constructs in a minority of tests; all such cases were disambiguated first in commit r186621.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186624 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-18 22:47:09 +00:00
Stephen Lin
771e0ab32a Disambiguate function names in some CodeGen tests. (Some tests were using function names that also were names of instructions and/or doing other unusual things that were making the test not amenable to otherwise scriptable pattern matching.) No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186621 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-18 22:29:15 +00:00
Tom Stellard
4e518fd941 R600/SI: Fix crash with VSELECT
https://bugs.freedesktop.org/show_bug.cgi?id=66175

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186616 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-18 21:43:53 +00:00
Tom Stellard
ac85f3f65c R600/SI: Add support for v2f32 loads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186615 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-18 21:43:48 +00:00
Tom Stellard
fc047278c1 R600/SI: Add support for v2f32 stores
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186614 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-18 21:43:42 +00:00
Tom Stellard
f5660aab41 R600: Expand VSELECT for all types
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186613 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-18 21:43:35 +00:00